Abstract: An integrated circuit with a fault reporting structure. The integrated circuit has at least one power MOSFET having a plurality of MOSFET cells with each MOSFET cell having a drain metal and a source metal, and the integrated circuit has a power MOSFET area for routing the drain metals and the source metals of the plurality of MOSFET cells. The fault reporting structure has a metal net routed in the power MOSFET area or in an area above or below the power MOSFET area.

Abstract: An electric system has an input terminal to receive an input voltage, a system output terminal to provide a system voltage, and N charging units for charging N loads respectively. The electric system has an input switch coupled between the input terminal and a first terminal, a switching circuit coupled between the first terminal and the system output terminal. The switching circuit converts the a boost output voltage at the first terminal to the system voltage, or converts the system voltage to the boost output voltage. The electric system further has a voltage control module having N input terminals coupled to the N charging units respectively, the voltage control module senses N charging currents passing through the N charging units respectively, and adjusts the boost output voltage based on the N charging currents.

Abstract: Junction field effect transistors (JFETs) and related manufacturing methods are disclosed herein. A disclosed JFET includes a vertical channel region located in a mesa and a first channel control region located on a first side of the mesa. The first channel control region is at least one of a gate region and a first base region. The JFET also includes a second base region located on a second side of the mesa and extending through the mesa to contact the vertical channel region. The vertical channel can be an implanted vertical channel. The vertical channel can be asymmetrically located in the mesa towards the first side of the mesa.

Abstract: A resonant converter has a primary resonant tank circuit and a secondary resonant tank circuit. An inverter circuit converts an input DC voltage received by the resonant converter at an input voltage node to a pulsating signal that is fed to the primary resonant tank circuit to generate a resonant tank current that flows through a primary winding of a transformer. The resonant tank current induces current in a secondary winding of the transformer. The induced current is rectified by a rectifier and the rectified signal is filtered by an output capacitor to generate an output DC voltage at an output voltage node. The secondary resonant tank circuit is disposed between the input voltage node and the output voltage node to inject odd order harmonics of the operating frequency to the primary tank circuit to shape the resonant tank current.

Abstract: An integrated circuit of a buck-boost converter working in a buck mode with a buck power switching cycle, a boost mode with a boost power switching cycle or a buck-boost mode with a buck-boost power switching cycle. The integrated circuit integrates a first power switch, a second power switch, a third power switch and a fourth power switch, and an output current sensing circuit. The buck-boost power switching cycle consists of a first buck-boost phase, a second buck-boost phase and a third buck-boost phase. The output current sensing circuit samples the current flowing through the first power switch during the second buck-boost phase and the current flowing through the fourth power switch during the third buck-boost phase so as to generate the output current information.

Abstract: A hybrid DC-DC converter includes a converter circuit, a bridge circuit with a bridge path that includes a winding of a transformer, and another bridge circuit with a bridge path that includes another winding of the transformer. Current through the bridge path of the other bridge circuit flows through the converter circuit in one direction and bypasses the converter circuit in the other direction. The converter circuit can operate in buck, boost, or buck-boost mode.

Abstract: A multi-phase voltage converter has a plurality of integrated circuits (ICs), and a controller. Each IC has a power switch, a monitoring pin and a current sense pin. The power switch is controlled to convert an input voltage to an output voltage. The current sense pin is capable of providing a current sense signal representative of a current flowing through the power switch. The controller is capable of providing a clock signal via the monitoring pin, and provides a plurality of data signals via the current sense pin of the plurality of ICs. Each of the plurality of ICs is assigned an identification code based on the clock signal and one of the plurality of data signals.

Abstract: A power converter includes a switch control circuit for driving a high side switch of the power converter comprising the high side switch and a low side switch connected in series. The switch control circuit may have a first terminal for receiving a low side switch driving signal of the low side switch, a second terminal used as a reference ground terminal of the switch control circuit, and a third terminal used as an output terminal to provide a high side switch driving signal, the switch control circuit can draw power from the low side switch driving signal and may not require internal regulators that should sustain high voltage.

Abstract: A power management integrated circuit (PMIC) chip provides power loss protection to an application device. The PMIC chip has several storage pins that each receives a set of storage capacitors that are charged using power from a power source during normal operation. An application device receives power from the power source during normal operation and receives power from an operational set of storage capacitors during power loss. A failing set of storage capacitors is disconnected from an operational set of storage capacitors and from the PMIC chip. The operational set of storage capacitors remains connected to the PMIC chip to provide power loss protection.

Abstract: A power switch device driver with energy recovery is discussed. The power switch device adopts four switches and one inductor with appropriate control to insure the switching speed and save the power loss.

Abstract: A power module has a substrate with a bottom side and a component side. Power converters of the power module are implemented using monolithic integrated circuit (IC) switch blocks that are mounted on the component side of the substrate. The power converters include output inductors that are disposed within the substrate. An end of an output inductor is connected to a switch node of a monolithic IC switch block and another end of the output inductor is connected to an output voltage node of the power module.

Abstract: A LED driving system for driving a LED matrix. The LED driving system includes an interconnection structure having a first surface and a second surface opposite to the first surface and a plurality of driver dies/chips attached to the first surface of the interconnection structure. The LED matrix is divided into a plurality of sub LED matrix sections that are attached to the second surface of the interconnection structure. The interconnection structure is configured to electrically couple each one of the plurality of sub LED matrix sections to a corresponding one driver die/chip in the plurality of driver dies/chips.

Abstract: A gate driver is configured to drive a normally-on device and a normally-off device coupled in series. The gate driver controls the normally-on device in response to a PWM signal, and to control a normally-off device to maintain ON in normal operations. If an under voltage condition of a negative power supply of a first driver used to drive the normally-on device, or a positive power supply of a second driver used to drive the normally-off device, or an input supply voltage is detected, the normally-off device is controlled to be OFF.

Abstract: An LLC resonant converter including a transformer, a switching full-bridge circuit, a resonant circuit, and a bridge rectifier. The switching full-bridge circuit has a first pair of switches and a second pair of switches, with the first pair of switches being connected between a DC input voltage and a second end of a secondary winding of the transformer, the second pair of switches being connected between a DC input voltage and a first end of the secondary winding of the transformer.

Abstract: A field-plate trench FET having a drain region, an epitaxial layer, a source region, a gate conductive layer formed in a trench, a field-plate dielectric layer formed on vertical sidewalls of the trench, a well region formed below the trench, a source contact and a gate contact. When the well region is in direct physical contact with the gate conductive layer, the field-plate trench FET can be used as a normally-on device working depletion mode, and when the well region is electrically isolated from the gate conductive layer by the field-plate layer, the field-plate trench FET can be used as a normally-off device working in an accumulation-depletion mode.

Abstract: The present disclosure describes vertical transistor device and methods of making the same. The vertical transistor device includes substrate layer of first conductivity type, drift layer of first conductivity type formed over substrate layer, body region of second conductivity type extending vertically into drift layer from top surface of drift layer, source region of first conductivity type extending vertically from top surface of drift layer into body region, dielectric region including first and second sections formed over top surface, buried channel region of first conductivity type at least partially sandwiched between body region on first side and first and second sections of dielectric region on second side opposite to first side, gate electrode formed over dielectric region, and drain electrode formed below substrate layer. Dielectric region laterally overlaps with portion of body region. Thickness of first section is uniform and thickness of second section is greater than first section.

Abstract: An inductor has one or more wires and a multipart magnetic core. The multipart magnetic core has magnetic core parts that are adjacent and magnetically coupled. The inductor provides an inductance of at least 40 nH for currents greater than 1 A and less than 60 A, and at least 20 nH for currents of at least 60 A.

Abstract: A 3-D package structure for isolated power module is discussed. The package structure has metal trace in a support layer (e.g. a substrate board), which is covered by two magnetic films from both sides, thus an effective transformer is formed. An IC die which contains a voltage regulator is stacked above the support layer, which significantly reduces the package size.

Abstract: A trans-inductor voltage regulator (TLVR) has regulator blocks and transformers. Secondary windings of the transformers are connected in series with a compensation inductor to form a trans-inductor loop, which is connected to the output voltage of the TLVR instead of to ground. Primary windings of the transformers serve as output inductors of the regulator blocks. The inductance of each output inductor and the output inductance of the TLVR are input to an averaging network of an averaging inductor direct current resistance (DCR) current sense circuit to generate an average sensed voltage. The average sensed voltage is converted to an average sensed current, which is used by a controller to generate control signals that drive the regulator blocks to generate the output voltage of the TLVR.

Abstract: A multi-phase voltage converter has a plurality of integrated circuits (ICs), and a controller. Each IC has a control pin to receive a control signal, a monitoring pin and a temperature sensing circuit, the controller has a monitoring pin connected to the monitoring pin of each of the plurality of ICs to receive a monitoring signal. The temperature sensing circuit is connected to or disconnected from the monitoring pin of the corresponding one of the plurality of ICs in response to the control signal and the monitoring signal.