Patents Assigned to Murata Manufacturing Co., Ltd.
  • Patent number: 11968815
    Abstract: A module comprises: a wiring board; a first component, a second component and a third component mounted on a first main surface; a shield structure mounted on the first main surface; a first sealing resin that seals the first component and the like; and a shield film that covers an upper surface of the first sealing resin and the like, the shield structure including a top side portion and at least one sidewall portion bent from the top side portion and thus extending therefrom, the top side portion including the top side portion's conductive layer and a magnetic layer therein, the sidewall portion including the sidewall portion's conductive layer therein, the top side portion's conductive layer and the sidewall portion's conductive layer being electrically connected to a ground conductor, the magnetic layer in the top side portion being located over the first component.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: April 23, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Tadashi Nomura
  • Patent number: 11967461
    Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately laminated therein, and two end surfaces opposing each other in a length direction, and two side surfaces opposing each other in a width direction, and two external electrodes respectively on the two end surfaces of the multilayer body. At least one of two opposed main surfaces of the multilayer ceramic capacitor includes raised portions provided respectively on one side and another side with a middle portion of the main surface interposed therebetween. The raised portions are each raised to become thicker in the lamination direction from the middle portion toward an outer periphery of the main surface.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: April 23, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yasuyuki Shimada, Akira Tanaka, Shinichi Kokawa
  • Patent number: 11967977
    Abstract: A switch circuit (10) includes: a transistor (T1) switching the conductivity state between a drain terminal (D1) and a source terminal (S1) between being conductive and non-conductive; a transistor (T2) switching the conductivity state between a drain terminal (D2) and a source terminal (S2) between being conductive and non-conductive, the source terminals (S1) and (S2) being connected to a node (N1) and an input/output terminal (120), respectively, and the drain terminals (D1) and (D2) being connected to an input/output terminal (110) and the node (N1) respectively; a transistor (T3) switching the conductivity state between a drain terminal (D3) and a source terminal (S3) between being conductive and non-conductive, the drain terminal (D3) and the source terminal (S3) being arranged along a second path connecting the node (N1) and ground; and a capacitor (C1) placed in the second path and connected in series to the transistor (T3).
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: April 23, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Nobuyasu Beppu
  • Patent number: 11967945
    Abstract: Acoustic resonator devices and filters are disclosed. An acoustic resonator includes a substrate and a single-crystal piezoelectric plate. A back surface of a supported portion of the piezoelectric plate is attached to a surface of the substrate. A portion of the piezoelectric plate forms a diaphragm that spans a cavity in the substrate. An interdigital transducer (IDT) is formed on a front surface of the piezoelectric plate. The IDT includes first and second busbars, and interleaved fingers extending alternately from the first and second busbars. Overlapping portions of the interleaved fingers are disposed on the diaphragm. At least portions of both the first and second busbars are disposed on the supported portion of the piezoelectric plate.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: April 23, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Viktor Plesski, Soumya Yandrapalli, Robert B. Hammond, Bryant Garcia, Patrick Turner, Jesson John, Ventsislav Yantchev
  • Patent number: 11968498
    Abstract: A pressure wave generating element is provided that includes a support and a heat generating layer that is provided on the support and generates heat by energization. Moreover, the heat generating layer includes a fiber with at least a partial metal coating on a surface.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: April 23, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kohei Fukamachi
  • Patent number: 11967943
    Abstract: An acoustic resonator is fabricated by forming a patterned first photoresist mask on a piezoelectric plate at locations of a desired interdigital transducer (IDT) pattern. An etch-stop layer is then deposited on the plate and first photoresist mask. The first photoresist mask is removed to remove parts of the etch-stop and expose the plate. An IDT conductor material is deposited on the etch stop and the exposed plate. A patterned second photoresist mask is then formed on the conductor material at locations of the IDT pattern. The conductor material is then etched over and to the etch-stop to form the IDT pattern which has interleaved fingers on a diaphragm to span a substrate cavity. A portion of the plate and the etch-stop form the diaphragm. The etch-stop and photoresist mask are impervious to this etch. The second photoresist mask is removed to leave the IDT pattern.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: April 23, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Patrick Turner, Ryo Wakabayashi
  • Patent number: 11967941
    Abstract: An acoustic wave device includes a mounting substrate, and an acoustic wave element chip. The mounting substrate includes a first major surface with a bump-mounting electrode land thereon, and a second major surface facing the first major surface. The acoustic wave element chip includes a piezoelectric substrate including a major surface, and a functional electrode and a bump located over the major surface of the piezoelectric substrate. The bump is joined to the bump-mounting electrode land. A heat radiation pattern is located over the first major surface of the mounting substrate and located within a region facing the functional electrode of the acoustic wave element chip. The heat radiation pattern is connected to an internal layer portion of the mounting substrate between the first and second major surfaces, and not electrically connected to the bump-mounting electrode land on the first major surface.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: April 23, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Toshishige Koreeda
  • Patent number: 11967978
    Abstract: A radio-frequency circuit is used in simultaneous transfer of a radio-frequency signal of 4G and a radio-frequency signal of 5G, and includes a first transfer circuit that selectively receives the 4G radio-frequency signal or the 5G radio-frequency signal, and transfers a radio-frequency signal of a first communication band including a first transmission band and a first reception band and a radio-frequency signal of a second communication band including a second transmission band and a second reception band. The first and second transmission bands at least partially overlap. The first transfer circuit includes a first power amplifier that amplifies transmission signals of the first and second communication bands, and a first transmission filter that has a first passband including the first and second transmission bands, and passes the transmission signals of the first and second communication bands output from the first power amplifier.
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: April 23, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Atsushi Ono, Satoshi Tanaka, Hirotsugu Mori
  • Patent number: 11967946
    Abstract: Acoustic resonator devices and methods are disclosed. An acoustic resonator device includes a substrate having a surface and a single-crystal piezoelectric plate having front and back surfaces. A bonding layer is formed on the surface of the substrate. An etch-stop layer is sandwiched between the bonding layer and the back surface of the single crystal piezoelectric plate. A portion of the single crystal piezoelectric plate and the etch-stop layer, but not the bonding layer, forms a diaphragm spanning a cavity in the substrate. An interdigital transducer (IDT) is formed on the front surface of the single-crystal piezoelectric plate with interleaved fingers of the IDT disposed on the diaphragm. The etch-stop layer is impervious to an etch process used to form the cavity.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: April 23, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Patrick Turner
  • Patent number: 11967942
    Abstract: There are disclosed acoustic resonators and radio frequency filter devices. A back surface of a single-crystal piezoelectric plate is attached to a surface of a substrate except for portions of the piezoelectric plate forming a plurality of diaphragms, each of which spans a respective cavity in the substrate. A conductor pattern is formed on the front surface, the conductor pattern including interdigital transducers (IDTs) of one or more pairs of sub-resonators, each pair consisting of two sub-resonators. The IDT of each sub-resonator includes interleaved fingers disposed on a respective diaphragm. The piezoelectric plate and the IDTs are configured such that respective radio frequency signals applied to each IDT excite respective shear primary acoustic modes in the respective diaphragms. The two sub-resonators of each pair of sub-resonators are positioned symmetrically about a central axis.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: April 23, 2024
    Assignee: MURATA MANUFACTURING CO., LTD
    Inventor: Ventsislav Yantchev
  • Patent number: 11965117
    Abstract: A soft magnetic material powder includes soft magnetic material particles, the soft magnetic material particles each include a core formed from an Fe-based soft magnetic material and an insulating film covering the surface of the core, and the insulating film contains an inorganic oxide and a water soluble polymer. A magnetic core includes soft magnetic material particles and a binder bonding the soft magnetic material particles to each other, the soft magnetic material particles each include a core containing an Fe-based soft magnetic material and an insulating film covering the surface of the core, and the insulating film contains an inorganic oxide and a water soluble polymer.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: April 23, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Yuya Ishida
  • Patent number: 11964325
    Abstract: Zinc is added to a metal magnetic alloy powder including iron and silicon. An element is formed using this magnetic material, and a coil is formed inside or on the surface of the element.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: April 23, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Makoto Yamamoto
  • Patent number: 11966803
    Abstract: An RFIC module is provided that includes a base material having a first face and a second face opposite to each other, an RFIC mounted above the first face of the base material, and RFIC-side terminal electrodes that are formed on the first face of the base material and are connected to the RFIC. An insulator film is formed on the surface of the RFIC-side terminal electrode, and conductor films facing the RFIC-side terminal electrode are formed on the insulator film. Moreover, additional capacitances are formed between the RFIC-side terminal electrodes and the conductor films.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: April 23, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Noboru Kato
  • Patent number: 11965229
    Abstract: A metal magnetic particle provided with an oxide layer on a surface of an alloy particle containing Fe and Si. The oxide layer has a first oxide layer, a second oxide layer, a third oxide layer, and a fourth oxide layer. Also, in line analysis of element content by using a scanning transmission electron microscope-energy dispersive X-ray spectroscopy, the first oxide layer is a layer where Fe content takes a local maximum value, the second oxide layer is a layer where Fe content takes a local maximum value, the third oxide layer is a layer where Si content takes a local maximum value, and the fourth oxide layer is a layer where Fe content takes a local maximum value.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: April 23, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takuya Ishida, Makoto Yamamoto, Katsutoshi Uji, Yuya Ishida, Mitsuru Odahara
  • Publication number: 20240128016
    Abstract: A coil component includes a first outer magnetic body, a first outer insulator, a first inner magnetic body, an inner insulator, a second inner magnetic body, a second outer insulator, and a second outer magnetic body stacked sequentially, and a coil in the inner insulator and an internal magnetic body inside the coil. Volumes A, B, C, and D of the first and second outer insulators, the inner insulator, the coil, and the internal magnetic body, respectively, and volume E of the first outer magnetic body, the first inner magnetic body, the second inner magnetic body, and the second outer magnetic body satisfy 0.05?A?0.07, 0.2?B?0.4, 0.01?C?0.08, 0.03?D?0.05, and 0.4?E?0.71, where 0.05B?C?0.2B and A+B+C+D+E=1.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 18, 2024
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Kazunori ANNEN
  • Publication number: 20240128004
    Abstract: A highly reliable multilayer coil component in which the internal stress is further alleviated, and a method for producing the same. The method produces a multilayer coil component that includes an insulator portion, a coil that is embedded in the insulator portion and includes a plurality of coil conductor layers electrically connected to one another, and an outer electrode that is disposed on a surface of the insulator portion and is electrically connected to an extended portion of the coil. The method includes forming a conductive paste layer by using a conductive paste; forming an insulating paste layer by using an insulating paste; forming a multilayer compact that includes the conductive paste layer and the insulating paste layer; and firing the multilayer compact, in which the conductive paste has a PVC of 60% or more and 80% or less (i.e., from 60% to 80%).
    Type: Application
    Filed: December 19, 2023
    Publication date: April 18, 2024
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Makoto HIRAKI, Katsuhisa IMADA, Morihiro HAMANO, Ryouji MIZOBATA
  • Publication number: 20240128995
    Abstract: A radio frequency circuit that supports simultaneous communication using downlink MIMO in a first band and uplink communication in a second band includes first and second power amplifiers connected to first and second antenna terminals, respectively. When a first SRS in the first band is output through the first antenna terminal, the first power amplifier amplifies the first SRS, according to a first deterioration amount of a signal-to-noise ratio in the first band due to distortion of a transmission signal in the second band having leaked in through the first antenna terminal, and when a second SRS in the first band is output through the second antenna terminal, the second power amplifier amplifies the second SRS, according to a second deterioration amount of the signal-to-noise ratio in the first band due to distortion of the transmission signal in the second band having leaked in through the second antenna terminal.
    Type: Application
    Filed: December 6, 2023
    Publication date: April 18, 2024
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Shoji NAGUMO
  • Publication number: 20240126950
    Abstract: A thermal analysis method and apparatus, and a computer program that enable highly accurate heat transfer simulation of a structure or space, while reducing calculation costs. By performing thermal analysis on a structure or space using the calculation meshes generated by initial dividing means, the spatial distribution of heat flux vectors J and temperature gradient vectors ?T are calculated; by calculating the volume integrals of the inner products J·?T of the heat flux vectors J and the temperature gradient vectors ?T for individual partitioned regions and acquiring the absolute values of the volume integrals, thermal management sensitivity indices are calculated for the partitioned regions. Subsequently, partition of calculation meshes and subdivision of partitioned regions are performed on a predetermined number of partitioned regions that indicate greater indices among the calculated thermal management sensitivity indices, for example one partitioned region.
    Type: Application
    Filed: December 21, 2023
    Publication date: April 18, 2024
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Yuu YAMAYOSE, Teruhisa SHIBAHARA, Masataka FUKUNISHI
  • Publication number: 20240128932
    Abstract: A power amplifier circuit includes external input and output terminals; a first power amplifier with first input and output terminals, the first input terminal being connected to the external input terminal, the first output terminal being connected to the external output terminal; a second power amplifier having second input and output terminals, the second input terminal being connected to the external input terminal, the second output terminal being connected to the external output terminal; a power supply terminal that receives a power supply voltage that is supplied to the first power amplifier and controllably supplied to the second power amplifier; and a switch having first and second terminals, the first terminal being connected to the power supply terminal, the second terminal being connected to the second power amplifier.
    Type: Application
    Filed: December 26, 2023
    Publication date: April 18, 2024
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Kenji TAHARA, Yoshiaki SUKEMORI, Kae YAMAMOTO, Ryo WAKABAYASHI
  • Publication number: 20240128014
    Abstract: An inductor component includes first and second internal wiring lines, an interlayer insulating layer between the first and second internal wiring lines and having a first main surface facing the first internal wiring line, a second main surface facing the second internal wiring line, and a via extending between the first main surface and the second main surface, and a via wiring line inserted through the via that electrically connects the first and second internal wiring lines. In a first section including a central axis of the via wiring line, the first main surface includes a first portion in contact with the first internal wiring line. The second main surface includes a second portion that is parallel to the first portion. A straight line that includes the first portion is a first reference line. A straight line that includes the second portion is a second reference line.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 18, 2024
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Keisuke KUNIMORI