Patents Assigned to National University Corporation Tohoku University
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Patent number: 8709939Abstract: A multilevel interconnect structure in a semiconductor device and methods for fabricating the same are described. The multilevel interconnect structure in the semiconductor device includes a first insulating layer formed on a semiconductor wafer, a Cu interconnect layer formed on the first insulating layer, a second insulating layer formed on the Cu interconnect layer, and a metal oxide layer formed at an interface between the Cu interconnect layer and the second insulating layer. The metal oxide layer is formed by immersion-plating a metal, such as Sn or Zn, on the Cu interconnect layer and then heat-treating the plated layer in an oxidizing atmosphere.Type: GrantFiled: October 2, 2012Date of Patent: April 29, 2014Assignees: Semiconductor Technology Academic Research Center, National University Corporation Tohoku UniversityInventors: Junichi Koike, Yoshito Fujii, Jun Iijima, Noriyoshi Shimizu, Kazuyoshi Maekawa, Koji Arita, Ryotaro Yagi, Masaki Yoshimaru
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Patent number: 8691062Abstract: An electrode device for an electrochemical sensor chip includes an insulation sheet having an insulating property and including a top surface and a bottom surface opposite to each other in a thickness direction, and electrode members having a conductivity and held by the insulation sheet with the electrode members piercing the insulation sheet in a thickness direction, one ends of the electrode members located on the top surface side of the insulation sheet being connected to an analyte, the other ends located on the bottom surface side of the insulation sheet being connected to an electrodes of a transducer, at least the one ends of the electrode members being made of a mixture of conductive particles and an insulating material.Type: GrantFiled: December 5, 2011Date of Patent: April 8, 2014Assignees: Japan Aviation Electronics Industry, Limited, National University Corporation Tohoku UniversityInventors: Atsushi Suda, Tatsuo Kimura, Ryota Kunikata, Kumi Inoue, Tomokazu Matsue
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Patent number: 8691061Abstract: An electrode device for an electrochemical sensor chip includes an insulation sheet having an insulating property and including a top surface and a bottom surface opposite to each other in a thickness direction, and electrode members having a conductivity and held by the insulation sheet with the electrode members piercing the insulation sheet in a thickness direction, one ends of the electrode members located on the top surface side of the insulation sheet being connected to an analyte, the other ends located on the bottom surface side of the insulation sheet being connected to an electrodes of a transducer.Type: GrantFiled: December 5, 2011Date of Patent: April 8, 2014Assignees: Japan Aviation Electronics Industry, Limited, National University Corporation Tohoku UniversityInventors: Atsushi Suda, Tatsuo Kimura, Ryota Kunikata, Tomokazu Matsue
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Patent number: 8691017Abstract: A heat equalizer includes a container structure having a heating block in which a working fluid is held for heating and vaporizing a material to be heated, a heater placed at the bottom of the container structure, and a material feed pipe allowing the outside and the inside of the container structure to communicate with each other. In the heating block, as a flow path in which the material to be heated flows, a main header pipe connected to the material feed pipe and extending in the horizontally, and a riser pipe branching from the main header pipe and extending vertically are formed. As a condensation path in which the working fluid is cooled and condensed, condensation holes formed respectively on the opposite sides of the riser pipe and extending horizontally, and a condensation pit formed under the riser pipe are formed. Between the condensation holes and the condensation pit, the main header pipe is placed.Type: GrantFiled: April 11, 2008Date of Patent: April 8, 2014Assignees: National University Corporation Tohoku University, Toshiba Mitsubishi—Electric Industrial Systems CorporationInventors: Tadahiro Ohmi, Masafumi Kitano, Hisaaki Yamakage, Yoshihito Yamada
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Patent number: 8691402Abstract: A perpendicular magnetic recording medium according to which both the thermal stability of the magnetization is good and writing with a magnetic head is easy, and moreover the SNR is improved. In the case of a perpendicular magnetic recording medium comprising a nonmagnetic substrate (1), and at least a nonmagnetic underlayer (2), a magnetic recording layer (3), and a protective layer (4) formed in this order on the nonmagnetic substrate (1), the magnetic recording layer (3) comprises a low Ku region (31) layer having a perpendicular magnetic anisotropy constant (Ku value) of not more than 1×105 erg/cm3, and a high Ku region (32) layer having a Ku value of at least 1×106 erg/cm3. Moreover, the magnetic recording layer (3) is made to have therein nonmagnetic grain boundaries that contain a nonmagnetic oxide and magnetically isolate crystal grains, which are made of a ferromagnetic metal, from one another.Type: GrantFiled: November 2, 2012Date of Patent: April 8, 2014Assignees: Fuji Electric Co., Ltd., National University Corporation Tohoku UniversityInventors: Osamu Kitakami, Yutaka Shimada, Satoshi Okamoto, Takehito Shimatsu, Hajime Aoi, Hiroaki Muraoka, Yoshihisa Nakamura, Hiroyuki Uwazumi, Tadaaki Oikawa
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Patent number: 8679640Abstract: Provided is an Al alloy member with an excellent mechanical strength that is sufficient for use in large-scale manufacturing apparatuses. The Al alloy member is characterized in that, in mass %, Mg concentration is 5.0% or less, Ce concentration is 15% or less, Zr concentration is 0.15% or less, the balance comprises Al and unavoidable impurities, the elements of the unavoidable impurities are respectively 0.01% or less, and the Vickers hardness of the Al alloy member is greater than 30.Type: GrantFiled: July 28, 2009Date of Patent: March 25, 2014Assignees: National University Corporation Tohoku University, Nippon Light Metal Company, Ltd.Inventors: Tadahiro Ohmi, Masafumi Kitano, Minoru Tahara, Hisakazu Ito, Kota Shirai, Masayuki Saeki
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Patent number: 8662471Abstract: There is provided a solenoid valve that realizes space-saving by reducing the size of a dedicated driving power source. There is provided a solenoid valve capable of instantaneously opening and closing that includes an electric double layer capacitor having a low direct current internal resistance and a low equivalent series resistance as a motive power supply. The electric double layer capacitor has single-cell electrical properties including a capacitance of 1 to 5 F, a rated voltage of 21 to 2.7 V, a direct current internal resistance of 0.01 to 0.1?, and an equivalent series resistance at 1 KHz of 0.03 to 0.09?, and includes a polarizable electrode made of glassy carbon having a specific surface area of 1 to 500 m2/g.Type: GrantFiled: March 26, 2009Date of Patent: March 4, 2014Assignees: Fujikin Incorporated, National University Corporation Tohoku UniversityInventors: Tadahiro Ohmi, Kouji Nishino, Tsuyoshi Tanigawa, Michio Yamaji, Nobukazu Ikeda, Ryousuke Dohi
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Patent number: 8648393Abstract: An accumulation mode transistor has an impurity concentration of a semiconductor layer in a channel region at a value higher than 2×1017 cm?3 to achieve a large gate voltage swing.Type: GrantFiled: February 13, 2012Date of Patent: February 11, 2014Assignees: National University Corporation Tohoku University, Foundation for Advancement of International ScienceInventors: Tadahiro Ohmi, Akinobu Teramoto, Rihito Kuroda
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Patent number: 8643106Abstract: A transistor capable of adjusting a threshold value is obtained by adjusting an impurity concentration of a silicon substrate supporting an SOI layer and by controlling a thickness of a buried insulating layer formed on a surface of the silicon substrate in contact with the SOI layer.Type: GrantFiled: June 21, 2007Date of Patent: February 4, 2014Assignees: National University Corporation Tohoku University, Foundation for Advancement of International ScienceInventors: Tadahiro Ohmi, Akinobu Teramoto, Cheng Weitao
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Patent number: 8642187Abstract: A structural member for a manufacturing apparatus has a metal base member mainly composed of aluminum, a high-purity aluminum film formed on the surface of the metal base member, and a nonporous amorphous aluminum oxide passivation film which is formed by anodizing the high-purity aluminum film. A method for producing a structural member for a manufacturing apparatus, includes forming a high-purity aluminum film on the surface of a metal base member mainly composed of aluminum, and anodizing the high-purity aluminum film in a chemical conversion liquid having a pH of 4-10 and containing a nonaqueous solvent, which has a dielectric constant lower than that of water and dissolves water, thereby converting at least a surface portion of the high-purity aluminum film into a nonporous amorphous aluminum oxide passivation film.Type: GrantFiled: December 21, 2007Date of Patent: February 4, 2014Assignees: National University Corporation Tohoku University, Mitsubishi Chemical CorporationInventors: Tadahiro Ohmi, Minoru Tahara, Yasuhiro Kawase
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Publication number: 20140027278Abstract: A magnetron sputtering apparatus for processing a substrate includes a target holding member for holding a target installed to face the substrate and a magnet installed at a side opposite to the substrate across the target. In the magnetron sputtering apparatus, plasma is confined on a surface of the target by forming a magnetic field on the target surface by the magnet, on the target surface, a plasma loop is formed around a region on a loop where a vertical magnetic field component perpendicular to the target does not substantially exist while a horizontal magnetic field component parallel to the target mainly exists, and the horizontal magnetic field component at all position on the loop where the horizontal magnetic field mainly exists is in a range of about 500 Gauss to 1200 Gauss.Type: ApplicationFiled: September 25, 2013Publication date: January 30, 2014Applicants: TOKYO ELECTRON LIMITED, NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITYInventors: Tadahiro Ohmi, Tetsuya Goto, Takaaki Matsuoka
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Patent number: 8633395Abstract: A multilayer wiring board 100 comprises a first wiring region 101 where wirings 103a and insulating layers 104a and 104b are alternately laminated, and a second wiring region 102 where a thickness H2 of an insulating layer 104 is twice or more a thickness H1 of the insulating layer in the first wiring region 101 and a width W2 of a wiring 103b is twice or more a width W1 of the wiring in the first wiring region 101. The first wiring region 101 and the second wiring region 102 are integrally formed on the same board.Type: GrantFiled: May 22, 2009Date of Patent: January 21, 2014Assignees: National University Corporation Tohoku University, Foundation For Advancement of International ScienceInventors: Tadahiro Ohmi, Shigetoshi Sugawa, Hiroshi Imai, Akinobu Teramoto
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Patent number: 8592810Abstract: It is an object of the present invention to stably form an N-doped ZnO-based compound thin film. In the present invention, a gas containing oxygen and nitrogen and a nitrogen gas together with an organometallic material gas are supplied into a low-electron-temperature high-density plasma which is excited by microwave, thereby forming the N-doped ZnO-based compound thin film on a substrate as a film forming object.Type: GrantFiled: October 7, 2010Date of Patent: November 26, 2013Assignees: National University Corporation Tohoku University, Rohm Co., Ltd.Inventors: Tadahiro Ohmi, Hirokazu Asahara, Atsutoshi Inokuchi
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Publication number: 20130307092Abstract: A semiconductor device includes a gate electrode which is formed on a substrate, and contains Al and Zr, a gate insulating film which is formed to cover at least the upper surface of the gate electrode, and contains Al and Zr, and an insulator layer formed on the substrate to surround the gate electrode.Type: ApplicationFiled: July 24, 2013Publication date: November 21, 2013Applicant: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITYInventor: Tadahiro Ohmi
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Patent number: 8575023Abstract: A semiconductor device manufacturing method which achieves a contact of a low resistivity is provided. In a state where a first metal layer in contact with a semiconductor is covered with a second metal layer for preventing oxidation, only the first metal layer is silicided to form a silicide layer with no oxygen mixed therein. As a material of the first metal layer, a metal having a work function difference of a predetermined value from the semiconductor is used. As a material of the second metal layer, a metal which does not react with the first metal layer at an annealing temperature is used.Type: GrantFiled: October 23, 2009Date of Patent: November 5, 2013Assignees: National University Corporation Tohoku University, Foundation for Advancement of International ScienceInventors: Tadahiro Ohmi, Akinobu Teramoto, Tatsunori Isogai, Hiroaki Tanaka
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Patent number: 8568577Abstract: Provided is a magnetron sputtering apparatus that increases an instantaneous plasma density on a target to improve a film forming rate. The magnetron sputtering apparatus includes a substrate to be processed, a target installed to face the substrate and a rotary magnet installed at a side opposite to the substrate across the target. In the magnetron sputtering apparatus, plasma loops are formed on a target surface. The plasma loops are generated, move and disappear in an axis direction of the rotary magnet according to a rotation of the rotary magnet.Type: GrantFiled: April 4, 2008Date of Patent: October 29, 2013Assignees: National University Corporation Tohoku University, Tokyo Electron LimitedInventors: Tadahiro Ohmi, Tetsuya Goto, Takaaki Matsuoka
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Patent number: 8562320Abstract: A resin molding device which molds a resin tube 1 from a molten resin has a tube molding portion 14 and a spindle 15 as jigs which define inner and outer diameters of the resin tube.Type: GrantFiled: March 18, 2008Date of Patent: October 22, 2013Assignees: National University Corporation Tohoku University, Nichias CorporationInventors: Tadahiro Ohmi, Yasuyuki Shirai, Jiro Yamanaka, Kengo Iwahara, Kouji Fukae
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Patent number: 8551830Abstract: There is provided a small-type semiconductor integrated circuit whose circuit area is small and whose wiring length is short. The semiconductor integrated circuit is constructed in a multi-layer structure and is provided with a first semiconductor layer, a first semiconductor layer transistor formed in the first semiconductor layer, a wiring layer which is deposited on the first semiconductor layer and in which metal wires are formed, a second semiconductor layer deposited on the wiring layer and a second semiconductor layer transistor formed in the second semiconductor layer. It is noted that insulation of a gate insulating film of the first semiconductor layer transistor is almost equal with that of a gate insulating film of the second semiconductor layer transistor and the gate insulating film of the second semiconductor layer transistor is formed by means of radical oxidation or radical nitridation.Type: GrantFiled: April 28, 2008Date of Patent: October 8, 2013Assignees: Advantest Corporation, National University Corporation Tohoku UniversityInventors: Tadahiro Ohmi, Koji Kotani, Kazuyuki Maruo, Takahiro Yamaguchi
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Patent number: 8535494Abstract: Provided is a rotary magnet sputtering apparatus which includes a plasma shielding member and an outer wall connected to the ground and which has a series resonant circuit and a parallel resonant circuit between the plasma shielding member and the outer wall. The series resonant circuit has a very low impedance only at its resonant frequency while the parallel resonant circuit has a very high impedance only at its resonant frequency. With this configuration, the impedance between substrate RF power and the plasma shielding member becomes very high so that it is possible to suppress the generation of plasma between a substrate 10 to be processed and the plasma shielding member. Further, since a series resonant circuit is provided between a target and the ground, the RF power is efficiently supplied only to a region where the substrate passes under the target, so that a self-bias voltage is generated.Type: GrantFiled: March 2, 2009Date of Patent: September 17, 2013Assignees: National University Corporation Tohoku University, Tokyo Electron LimitedInventors: Tadahiro Ohmi, Tetsuya Goto, Takaaki Matsuoka
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Publication number: 20130235545Abstract: In a multilayer wiring board 100 having a high-density wiring region and a high-frequency propagation region mounted in the same board, it is possible to propagate a signal frequency of 40 GHz or more in the high-frequency propagation region by using a resin material with a dissipation factor (tan ?) of less than 0.01 as a material of an insulating layer used at least in the high-frequency propagation region. The insulating layer is formed of a polymerizable composition which contains a cycloolefin monomer, a polymerization catalyst, a cross-linking agent, a bifunctional compound having two vinylidene groups, and a trifunctional compound having three vinylidene groups and in which the content ratio of the bifunctional compound and the trifunctional compound is 0.5 to 1.5 in terms of a weight ratio value (bifunctional compound/trifunctional compound).Type: ApplicationFiled: November 10, 2011Publication date: September 12, 2013Applicants: ZEON CORPORATION, NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITYInventors: Tadahiro Ohmi, Tetsuya Goto, Masakazu Hashimoto