Abstract: A circuit for detecting a disconnected input signal line to an integrated circuit includes an emitter follower stage having a transistor whose base is connected to the monitored input signal line, the input signal being transferred to the integrated circuit through the base-emitter path of the emitter follower. A current source transistor connects to the emitter of the emitter follower transistor, the base of the current source transistor being coupled to a voltage supply and a detector circuit, the detector circuit functioning to detect the base-emitter voltage of the current source transistor. The detected voltage provides an indication of whether or not the input signal line is connected to the base of the emitter follower transistor.

Abstract: A gate circuit includes a first group of N resistors connected together at one end to form a first input terminal for receiving an input current, a second group of N-1 resistors connected in series and connecting the other ends of the first group of resistors, N Josephson junction circuits each connected in series with one of the first group of resistors, a specific Josephson junction circuit coupled between a second input terminal and one end of the series connection of the second group of resistors, and an additional resistor connected between the second input terminal and a reference potential.

Abstract: A pattern matching system comparing two patterns A and B, at least one of which is compressed in accordance with a piecewise straight line approximation and is represented by a series of representative vectors, of fewer number than the uncompressed pattern, and a series of extraction points of the representative vectors from the compressed pattern. First a distance is calculated between a segment of the compressed pattern and a point of the second pattern. Also a weighting coefficient is calculated depending on the length of the segment. From the latter two calculations three weighted distances are calculated appropriate to a recursion formula. The recursion formula is integrated by step wise incrementing the indices corresponding to the points of the two pattern. The final value of the recursion calculation is normalized to produce the final composite distance between the two patterns.

Abstract: A voltage detection circuit for comparing an input voltage against a reference voltage, the reference voltage being derived from the threshold voltage of a semiconductor active device which forms a portion of the voltage detection circuit. To make the detection circuit substantially independent of ambient temperature changes, it is constructed as an integrated circuit and includes devices for producing a temperature dependent voltage equal to but of opposite sign to the temperature sensitive voltage component of the reference voltage. The two temperature sensitive voltages cancel each other to thereby permit a temperature independent voltage comparison.

Abstract: A remote time calibrating system has a calibrating station with a reference time and a remote station having a local time, the local time having to be adjusted to coincide with the reference time. The calibrating station receives telemetry signals sent from the remote station, each of the telemetry signals including data indicating the local time of the remote station from which the telemetry signal is transmitted. Responsive to any first difference between the receive reference time and the local transmit time is detected and calculated by taking into account the signal propagation delay of the telemetry signal between the remote station and the calibrating station. Responsive thereto, the local time is calibrated at the remote station.

Abstract: In a data processing system there are provided a main memory device for storing information, a plurality of buffer memory devices including a plurality of blocks for storing a copy of information stored in the main memory device, an arithmetic operation controller including at least one block corresponding to at least one of the blocks of the buffer memory devices for executing instructions including a branch instruction, a branch direction control memory device for storing branch direction information obtained by executing the branch instruction and a preceding controller. The preceding controller comprises a read out means for reading out from the buffer memory devices branch direction information together with a prefetched instruction predicting means for predicting whether a branching will be successful or not.

Abstract: A Josephson pulse generator of the current injection type is composed of a first group of N (N.gtoreq.2) resistors, one end of each being connected together, the other ends of two of the N resistors being connected to first and second nodes. A second group of serially connected N-1 resistors is connected between the first and second nodes and to the other ends of the N-2 resistors in the first group not connected to the first and second nodes. N Josephson junctions are each connected between a reference potential and the other end of a different one of the N resistors. Two additional Josephson junctions, each having one end thereof connected, respectively, to the first node and the second node is provided along with an additional resistor connected between the other end of the Josephson junction connected to the first node and the reference potential.

Abstract: A Josephson memory circuit comprises a closed superconducting loop having a first node and including a first Josephson gate therein, and a first line connected to the node. The circuit also includes a second line provided to electromagnetically couple to the first Josephson gate, a second Josephson gate provided so close to the superconducting loop as to electromagnetically couple to the superconducting loop, and a third line connected to the second Josephson gate and provided to electromagnetically couple to the first Josephson gate.

Abstract: A pattern recognition apparatus for recognizing spoken words of a nonspecific speaker or of a specific speaker. A reference pattern composed of a sequence of feature vectors, each composed of n feature parameters, b.sub.i, is stored. The reference pattern represents a form of average of said words to be recognized as determined by multiple reference speakers speaking the same words or by the specified speaker speaking said words several times. A deviation pattern composed of a sequence of feature vectors composed of n feature parameters, w.sub.i /2, is stored. The deviation pattern is a measure of the deviation from the reference of the repeated utterances of the reference speakers or the specified speaker. An input pattern, representing the utterances of a speaker, is composed of a sequence of feature vectors, each composed of n feature parameters, a.sub.i, and is stored.

Abstract: In a pager receiver comprising a display circuit and an ROM, a controller produces a test mode signal indicative of a test mode in which either the display circuit or the ROM is tested. Responsive to the test mode signal, the ROM supplies the display circuit with a succession of display signals which are previously stored therein and representative of all alphanumeric symbols displayed by the display circuit, so as to test the display circuit. Alternatively, all of contents stored in the ROM are successively sent from the ROM to the display circuit in response to the test mode signal on testing the ROM, so as to inspect the contents. The test mode signal may be delivered from a transmitting end to the controller in the form of a radio calling signal or given to the controller by manual operation. The test mode signal may specify more than two sorts of tests.

Abstract: A compact satellite broadcasting receiver comprises a circular waveguide, a strip-line-shaped probe projected into the circular waveguide, a reflecting element provided downstream of the probe in the circular waveguide and a microwave circuit having a strip line provided around the circular waveguide and connected with the probe. Furthermore, a satellite broadcasting receiver capable of simultaneously receiving two kind of microwaves polarized perpendicularly to each other is realized by joining two compact satellite broadcasting receivers as mentioned above with their strip-line-shaped probes placed at a right angle.

Abstract: In an SAR image processing system of the type wherein an image is reproduced from received data, the reproduced image is obtained on the basis of range compression, range curvature compensation and azimuth compression, the correlation coefficient between two look image signals is determined for each of predetermined relative shift amounts, the relative shift amount K.sub.max giving the maximum correlation coefficient is determined, and an azimuth reference function and range curvature compensation function are generated based on the shift amount K.

Abstract: A modular data processing unit includes first through fourth memories and an arithmetic unit all connected in a recirculating pipeline mode. An interface unit couples an external bus to the pipeline bus at a point between the arithmetic unit and first memory, and the fourth memory provides outputs to either the arithmetic unit or the interface unit. Data, instructions and addresses are transferred to the first memory via the interface unit, which addresses the second memory for storing instructions. In accordance with the output of the second memory, data is stored in the third memory. The arithmetic unit operates on the data in accordance with the instructions, and the fourth memory acts as a buffer for temporarily storing data while awaiting transfer to the arithmetic unit or interface unit. The transfer of data to the arithmetic unit from the fourth memory in addition to the transfer of data between modules, is controlled in accordance with the available storage capacity in the fourth memory.

Abstract: A memory device is disclosed which is automatically and stably set to a predetermined logic state upon the application of power thereto. The memory device comprises a flip-flop having first and second cross-connection points, a state setting transistor coupled between the second cross-connection point and a reference voltage terminal, a voltage detection circuit for detecting the value of a power supply voltage, and a reset circuit responsive to an output signal of the detection circuit for controlling the state setting transistor.

Abstract: A process for fabrication of resist comprising a substrate and an overlying radiation sensitive layer, said overlying layer consisting essentially of a specific polymer or copolymer of vinylnaphthalene.

Abstract: A continuous speech recognition system determines the similarity between input patterns and reference patterns over time such that similarities between previously spoken speech patterns and reference patterns are determined while speech continues to be spoken. Degrees of dissimilarity at arbitrary reference pattern word times are determined asymptotically and are recorded. The minimum degree of dissimilarity is determined and the corresponding word is categorized. Recognition decisions are ultimately made in reverse chronological order.

Abstract: A paging receiver comprises a P-ROM with a built-in decoder for storage of N kinds of information. The stored contents of the P-ROM are read out in series in response to a clock frequency equal to or greater than N times the clock corresponding to the data speed of a received signal. Substantially simultaneous comparison of N kinds of the read-out data with the received signal is effected to determine whether or not the received signal is a paging signal for the own receiver.

Abstract: A semiconductor device in which a logic information can be held stably without being influenced by .alpha.-rays, is disclosed. The major feature of the device resides in that a capacitor is provided at a control terminal of a transistor holding a logic information thereby to increase an effective capacitance of the control terminal.

Abstract: There is provided a voice recognition system comprising a standard pattern memory in which a voice pattern of a predetermined word is stored as a positive reference pattern and also voice patterns of words similar to but different from the first-mentioned word are stored as negative reference patterns, a pattern comparator for calculating dissimilarities of an input voice pattern with respect to the positive reference pattern and negative reference patterns, and a discriminator for providing a coincidence confirmation output signal when the dissimilarity with respect to the positive reference pattern is less than a predetermined threshold value and less than the dissimilarities with respect to the negative reference patterns while otherwise rejecting the result of recognition.

Abstract: In a memory arrangement responsive to a first address signal and comprising a buffer memory for storing a plurality of information groups, each comprising a preselected number of information blocks, and an address array for storing a plurality of second address signals each of which specifies each information block to produce the second address signals equal in number to the preselected number, the first address signal comprises a plurality of fields one of which is a specific field representative of either of first and second operation modes in which the arrangement is operable as cache and local memories, respectively. When the specific field indicates the first mode, the preselected number of the second address signals is compared by a set of comparators with the corresponding fields of the first address signal without masking to derive one of the information blocks of the information group specified by one of the fields.