Abstract: A self-test mechanism within an integrated circuit to automatically interleave evaluation of a clock signal by a clock monitor unit with periodic testing for faulty operation of a clock monitor unit implemented within the integrated circuit for monitoring a clock signal. The mechanism injects faults into the clock monitor unit to evaluate if the clock monitor unit is operating in accordance with its specified operating parameters. The injected faults are intended to cause the clock monitor unit to determine that the clock signal is operating outside of a specified frequency range. If the injected faults do not cause the clock monitor unit to determine that the clock signal is operating both above and below the specified frequency range, then the clock monitor unit is not functioning according to specified operating parameters.

Abstract: A method of tie bar removal is provided. The method includes forming a leadframe including a tie bar and a flag. The tie bar extends from a side rail of the leadframe and has a distal portion at an angle different from a plane of the flag. A semiconductor die is attached to the flag of the leadframe. A molding compound encapsulates the semiconductor die, a portion of the leadframe, and the distal portion of the tie bar. The tie bar is separated from the molding compound with an angled cavity remaining in the molding compound.

Abstract: A transistor includes a trench formed in a semiconductor substrate. A conductive spacer is formed in the trench and offset from a first sidewall of the trench. A dielectric material is formed in the trench and surrounds the conductive spacer. A drift region is formed in the semiconductor substrate adjacent to the first sidewall and a first portion of a second sidewall of the trench. A drain region is formed in the drift region adjacent to a second portion of the second sidewall. A first gate region overlaps a portion of the drift region and is formed separate from the conductive spacer.

Abstract: A method of forming a semiconductor device is provided. The method includes providing a connector structure configured for carrying a signal and providing a semiconductor die. At least a portion of the connector structure and the semiconductor die are encapsulated with an encapsulant. The semiconductor die is interconnected with the connector structure by way of a conductive trace.

Abstract: An integrated circuit (IC) device includes a non-volatile memory device with an array of non-volatile memory cells, and an isolation circuit configured to conduct voltage from an internal voltage supply to one of the memory cells during a hidden write operation to the one of the memory cells, and conduct voltage from an external voltage supply to the one of the memory cells during a non-hidden write operation to the one of the memory cells. Current at the external voltage supply can be monitored external to the IC device during the non-hidden write operation, and current of the internal voltage supply is provided by a capacitor that cannot be monitored external to the IC device during the hidden write operation.

Abstract: Analog-to-digital converters (ADCs) of an integrated circuit includes a first set of ADCs and second set of ADCs in which the ADCs of the first set are of a different type than the ADCs of the second set. On-chip testing of the ADCs includes calibrating an N-bit differential digital-to-analog converter (DAC) and storing a pair of calibration codes for each of 2N possible DAC input codes for the DAC in an on-chip memory. The first set of ADCs is tested using the pairs of calibration codes stored in the on-chip memory and a full N-bit resolution of the DAC. Subsequently, the second set of ADCs is tested using pairs of calibration codes corresponding to a reduced M-bit resolution of the DAC, in which M is less than N. During the testing of the second set of ADCs, a portion of the calibration codes stored in the on-chip memory is overwritten.

Abstract: An apparatus to insure safe behavior in an inverter system. In one embodiment, the apparatus includes a first high side gate driver, a first low side gate driver, a microcontroller configured to control the first high side and low side gate drivers. A voltage regulator provides a supply voltage to the microcontroller. A first pair of high side voltage regulators provide a first pair of high side supply voltages to the first high side gate driver. A first pair of low side voltage regulators provide a first pair of low side supply voltages to the first low side gate driver.

Abstract: A system includes an RF signal source configured to output an RF signal at a first frequency, and a first controller configured to generate a first data signal encoding instructions at a second frequency. A first filter is coupled to the RF signal source. The first filter is a low pass filter having a cutoff frequency between the first frequency and the second frequency. The first filter is configured to couple to a first end of a cable. A second filter is coupled to the first controller. The second filter is a high pass filter having a cutoff frequency between the first frequency and the second frequency. The second filter is configured to couple to the first end of the cable. The system includes an impedance matching network configured to couple to a second end of the cable. A first electrode is coupled to the impedance matching network.

Abstract: A method for direct memory access includes: receiving a direct memory access request designating addresses in a data block to be accessed in a memory; randomizing an order of the addresses the data block is accessed; and accessing the memory at addresses in the randomized order. A system for direct memory access is disclosed.

Abstract: A GPIO includes a transmitter having an output stage connected to the I/O pad and adapted to supply transmit data to an I/O pad in response to output data generated by a low voltage core logic operating within a functional voltage range for transmit operations; a receiver adapted to supply receive data to the low voltage core logic operating within the functional voltage range in response to input data received at the I/O pad for receive operations; a VLV transmitter adapted to supply VLV transmit data to the output stage of the transmitter and not directly to the I/O pad in response to output test data generated by the low voltage core logic; and a VLV receiver adapted to supply VLV receive data to the low voltage core logic operating within a low core supply voltage range in response to input data received from the output stage of the transmitter.

Abstract: One example discloses a first wireless device, including: a band-steering device including a band-detection element and a band-steering element; wherein the band-detection element is configured to receive a first signal from a second wireless device and detect from the first signal if the second device has multi-band capability; and wherein the band-steering element is configured to respond to the first signal by transmitting a second signal to the second device in a preferred band.

Abstract: Various embodiments relate to a method for power save operation by a non-access point (non-AP) multi-link device (MLD), wherein a plurality of links are established between the non-AP MLD and an AP MLD, including: setting, by the non-AP MLD, a QoS capability for a first access category to a first state on all links of the plurality of links that the non-AP MLD operates; transmitting, by the non-AP MLD, a first management frame to the AP MLD, wherein the first management frame is used to request a multi-link setup with the AP MLD, and wherein the first management frame includes a first element that comprises the setting of the QoS capability for the first access category; receiving, by the non-AP MLD, a second management frame from the AP MLD, wherein the second management frame includes information for an association ID (AID) that corresponds to the non-AP MLD, wherein the AID is assigned to the non-AP MLD regardless of the number of links in the plurality of links; and receiving, by the non-AP MLD, a third m

Abstract: A cost-effective process and structure is provided for a thermal dissipation element for semiconductor device packages incorporating antennas that can incorporate RF/EMI shielding from the antenna elements. Certain embodiments provide incorporated antenna element structures as part of the same process. These features are provided using a selectively-plated thermal dissipation structure that is formed to provide shielding around semiconductor device dies that are part of the package. In some embodiments, the thermal dissipation structure is molded to the semiconductor device, thereby permitting a thermally efficient close coupling between a device die requiring thermal dissipation and the dissipation structure itself.

Abstract: Embodiments of a method and an apparatus for wireless communications are disclosed. In an embodiment, a method for wireless communications involves generating a Physical Layer Protocol Data Unit (PPDU) that includes a resource unit (RU), wherein a size of the RU is less than a signal bandwidth and wherein data corresponding to the RU is distributed onto a disjoint set of subcarriers included in a frequency unit, and transmitting the PPDU using the disjoint set of subcarriers in accordance with a power spectrum density (PSD) limit.

Abstract: Radio frequency (RF) packages containing substrates having coefficient of thermal expansion (CTE) matched mount pads are disclosed, as are methods for fabricating RF packages and substrates. In embodiments, the RF package contains a high thermal performance substrate including a metallic base structure, which has a frontside facing a first RF power die and a first die attach region on the frontside of the base structure. A first CTE matched mount pad is bonded to the metallic base structure and covers the first die attach region. The first CTE mount pad has a CTE greater than the CTE of RF power die and less than the CTE of the metallic base structure. An electrically-conductive bonding material attaches the RF power die to the first CTE matched mount pad, while RF circuitry integrated into first RF power die is electrically coupled to the metallic base structure through the mount pad.

Abstract: Various embodiments relate to a method performed by a first wireless device for announcing operating capabilities to a second wireless device, wherein the first wireless device and second wireless device support a first protocol and a second protocol, including: announcing by the first device original capabilities to the second device; receiving an announcement of capabilities from the second device; receiving frames from the second device in PHY Protocol Data Units (PPDUs) following the first protocol and the second protocol; announcing by the first device a change in its capabilities to the second device; and receiving frames from the second device in PPDUs transmitted using the changed capabilities following the first protocol and the second protocol, wherein the change in the capabilities includes a change in a one of a puncture parameter, bandwidth parameter, mode and coding scheme (MCS) parameter, and a number of simultaneous streams (Nss) parameter.

Abstract: A lead-frame assembly is disclosed, for a semiconductor die and comprising a die attach pad and a plurality of elongate leads spaced apart therefrom; wherein each elongate lead has a first proximal end portion, a second distal end portion and a middle portion therebetween; wherein the die attach pad and each of the plurality of elongate leads each comprise a coating-free portion, and a coated portion having a coating material thereon; wherein a part of a perimeter of the die attach pad proximal each lead is comprised in the coating-free portion, and wherein the proximal end portion of each elongate lead is comprised in the coating-free portion. Associated package assemblies and methods are also disclosed.

Abstract: One example discloses a first-device: wherein the first-device is configured to be coupled to a second-device over an IEEE 802.11 communications link; and wherein the first-device is configured to, store a current setup between the first-device and the second-device; identify a unique identifier of the second-device; transmit a request frame to a third-device; wherein at least one of the second-device and third-device is a multi-link-device (MLD); wherein the request frame is configured to request an association with the third-device and includes the unique identifier of the second-device; receive a response frame from the third-device; and wherein the response frame includes an indication that request was successful.

Abstract: The disclosure relates to a system for transmitting Protocol data units (PDUs). Example embodiments include a system comprises a radio link control (RLC) layer for storing a RLC PDU list of RLC Protocol Data Units (PDUs) received from a ProtocolData Convergence Protocol (PDCP) layer. The control layer comprises a transmission block for transmission to a Media Access Layer (MAC) layer in a transmission event, wherein the transmission block is populated with a subset of PDUs in the RLC PDU list. When the transmission block is near a storage limit, the system scans the RLC PDU list for a PDU that best fits a remaining grant of the transmission block to complete population of the transmission block. The control layer further comprises a priority list for storing PDUs of the RLC PDU list scanned by the system that were greater in size than the remaining grant.

Abstract: A modem for a non-standalone network includes a 5G-NR modem and an E-UTRA modem. The 5G-NR modem includes a cell search module which determines first timing information. The first timing information includes first times indicative of the times of receipt of one or more first radio frames from a first 5G-NR base station measured relative to a network time. The 5G-NR modem also provides for the sending of system frame timing difference (SFTD) information for the first base station to a network controller by sending the first timing information to the E-UTRA modem. The E-UTRA modem then determines and forwards the SFTD information using the first timing information and second timing information. The second timing information is determined by the E-UTRA modem and includes second times indicative of the times of receipt of one or more second radio frames from a second E-UTRA base station.