Abstract: In a circuit to provide a high precision delay signal, an oscillator generates oscillator pulses, each with an oscillator period. A counter, in response to an enable signal, counts the oscillator pulses and outputs a count signal. The enable signal is a reference clock signal having a reference-clock period that is greater than the oscillator period. A delay generator delays an input signal to provide a sequence of incrementally delayed delay-signals. A multiplexor, in response to the count signal, selects one of the delayed signals. In another aspect of the invention, a disc controller uses the circuit to provide a high precision delay to a write data signal. Another aspect of the invention provides a method of providing the high precision delay.

Abstract: A method for the conversion of grayscale images with a non-white background into halftone images is disclosed. The illustrated embodiment of the present invention addresses the difficulties current conversion methods have in converting multi-bit grayscale images with a non-white background into single bit halftone images. Through manipulation of the grayscale image data, the edges of text and line art features in the grayscale image data are located and extracted from the non-white background through the use of a weight driven conversion algorithm resulting in more defined halftone images.

Abstract: The location of a bug resulting from processing a sequence of input files is determined by generating a potentially smaller sequence of the files which result in the bug. Such files can include data, instruction, or both. The smaller sequence can be determined by excluding portions from the sequence, and or returning portions to the sequence, and testing the sequence to determine if it results in the bug. In one embodiment of the present invention, excluded and returned portions become successively smaller by about a quotient of two. In another embodiment, individual files are excluded from a sequence of files, preferably in reverse order to their appearance in the sequence of files. The resulting sequence is tested to determine if it results in the bug. If not, the file can be returned to the sequence, and the bug location method continued with another file of the sequence.

Abstract: Method and system for estimating processing time delay &Dgr;td of a selected signal processing device and temperature T of the device. A selected input signal is received by a first sub-system that includes the selected device and by a second sub-system having a controllable time delay, producing first and second sub-system output signals. The first and second sub-system output signals are compared to estimate the time delay of the selected device. A known relationship T=f(&Dgr;td) is used to estimate temperature of the selected device and to determine whether this temperature is higher than a permitted or threshold device operating temperature. First and second signals, having the same or different shape parameters, may be processed by the system, and a statistical average of estimated device time delay can be computed to estimate device temperature.

Abstract: A stochastic screening mask is provided for rendering halftone images. A filter controlled force masking method is used to vary the mask patterns from regularity to randomness. Dot size (amplitude), dot number (frequency), and dot shape are modulated integrally at each gray level during the generation of the mask. The single pixel limit for blue noise making is broken down by this approach. The halftone patterns generated with this method can have visually pleasing blue noise attribute. This new screening method would provide flexible solutions for different types of printing processes.

Abstract: An apparatus for automatically rendering both encoded and unencoded data files comprises a data processor and a decoder. The data processor receives a set of input data from a storage medium, such as an optical storage medium, and determines whether the set of input data is encoded or unencoded. If the input data is encoded, then the data processor provides to the decoder a set of encoded data, and generates an indication signal to cause the decoder to be activated. In response, the decoder decodes the set of encoded data and provides as output a set of decoded data. This decoded data may then be provided to a signal transport mechanism, such as a digital signal bus, to be rendered by a digital device such as a computer, or to a digital to analog converter which converts the decoded data into analog signals for driving an analog device, such as a speaker.

Abstract: Apparatus and method for detecting zero-crossings and correcting asymmetry of an RF signal. The RF signal is first converted into a digital signal having a plurality of samples. Zero-crossings detection is achieved by calculating the differences between neighboring samples, and by determining whether the differences exceed a pre-determined threshold value. Zero-crossings are also detected by comparing the differences to a pre-determined negative threshold value when the differences are negative. If a zero-crossing sample, a sum of the data values of the neighboring samples is used to generate an asymmetry offset value.

Abstract: A method and device for sharpening detected edges in an image to compensate for a corruption that occurs during the scanning and printing processes. Edges are enhanced by increasing the contrast between two sides of an edge region according to the amount of distortion in the image signal at that location. Each pixel in the image is analyzed in the context of neighboring pixels in the image to determine the presence of an edge and the degree of sharpening required. A filter is applied to adjust the intensity value of pixels in an edge region to correct for distortion and to emphasize the edge. The resulting final image contains sharpened edges with little effect on the smooth transition regions of the image.

Abstract: A method and apparatus are disclosed for enabling blocks of various sizes to be read from a storage medium without causing subsequent errors to be experienced by a host. According to one embodiment, the present invention receives information read from a block, and maintains a count of the amount of information received. As the information is received, a determination is made as to whether an indication of the beginning of a subsequent block has been detected. If so, then a determination is made as to whether the current count is within a predetermined guardband. If the current count is not within the guardband, then a buffer page pointer or a block counter is incremented. However, if the current count is within the guardband, then the buffer page pointer or the block counter is not incremented but is rather maintained at its current value.

Abstract: A method and apparatus are disclosed within a DVD player that allows multiple view angles to be displayed on a common display with one view angle designated as a primary view and the remaining view angles being subordinated to the primary view angle. The system and method also provide that any Modifications to the primary view similarly affect the secondary views. Any of the secondary views may be selected at any time to become the primary view whereupon the remaining viewing angles are subordinated and synchronized with the newly selected primary view.

Abstract: System and method for improved formation of a Q-parity checkbyte matrix used for error control for a sequence of message bytes and error control bytes, using an algorithm, rather than a lookup table, to determine the order of the words used for the sequence. Entries of a Reed-Solomon parity check rectangular array are set up sequentially and diagonally, including the syndrome bytes and checkbytes to be used for error detection, so that all matrix entries can be written to, or read from, a computer memory in a stream of bytes whose order is determined by the algorithm without reference to a lookup table.

Abstract: AGC Circuitry for an optical PRML read channel that is insensitive to low frequency disturbances of an RF input signal. The AGC Circuitry includes a VGA amplifier, a low pass filter, an ADC, a baseline Wander Correction Circuit, a digital gain control circuit, and a DAC. The VGA amplifier amplifies the RF input signal to produce a second RF signal. The low pass filter filters the second RF signal to produce a first analog signal. The ADC converts the first analog signal into a digital AGC output signal suitable for decoding. The baseline Wander Correction Circuit removes from the digital AGC output signal effects of low frequency disturbance of the RF input signal to produce a second digital signal. The digital gain control circuit controls the gain of the VGA amplifier by producing a digital gain control signal in response to the second digital signal.

Abstract: Two banks of memory are selectively accessed from a first interface terminal and a second interface terminal through multiplexer circuitry whereby one memory bank can be read by one terminal while the other memory bank is being updated from the other interface terminal. The multiplexer circuitry is controlled by a control register which responds to an operation code whereby either memory bank can be updated while the other memory bank is being read for hardware parameters, for example.

Abstract: A receiver interface for interfacing with an Advanced Technology Attachment Packet Interface (ATAPI) in a first device. The receiver interface includes a converter, a depacketizing circuit, and an ATAPI receiver circuit. The converter converts a first set of signals from a serial bus into a second set of signals. The first set of signals are serial to one another and use low-voltage, differential signaling (LVDS). The first set of signals are adapted to be received on fewer lines and at a faster data rate than possible with an Integrated Disc Electronics (IDE) bus. In contrast, the second set of signals are serial to another and use TTL voltage levels and single-ended signaling. Additionally, the second set of signals use a packet format to represent a packet. The depacketizing circuit disassembles the packet represented by the second set of signals to generate a third set of signals, which are parallel to one another and use TTL, single-ended signaling.

Abstract: A transmission interface compatible with the AT Attachment Packet Interface (ATAPI) that achieves transfer rates greater than those possible with an Integrated Disc Electronics (IDE) bus. The transmission interface includes a transmission ATAPI circuit, a packetizing circuit and a converter. The transmission ATAPI circuit monitors the content of the ATAPI and, when a change is detected, generates a first set of signals representative of that change. The first set of signals are single-ended, parallel to one another and use Transistor-Transistor Logic (TTL) voltage levels. The packetizing circuit packetizes the first set of signals to generate a second set of signals, which representing a packet. The packet payload represents the change in the contents of the ATAPI. The second set of signals are also single-ended, parallel to one another and use TTL voltage levels. The converter converts the second set of signals into a third set of signals and couples these to a serial bus.

Abstract: Method and system for compensating for thermal effects in writing and reading of mark and space characters on a CD-R/RW disk. Character lengths are measured for character triples (preceding mark, preceding space, present mark) on a disk, and a difference &Dgr;L between present mark length and a reference mark length is computed for each of a selected group of combinations of preceding mark lengths and preceding space lengths. Mean values of &Dgr;L are computed for each of these combinations. These mean values are interpreted as estimates of the thermal effects for the disk. Where the number of values of &Dgr;L, for a given combination of preceding mark lengths and preceding space lengths, used to determine a mean value of &Dgr;L is less than a threshold number, a selected algorithm is used to provide an adjusted mean value. Variation of thermal effects with disk write speed is determined and used in accounting for thermal effects. Frequency response effects of mark and space lengths are removed.

Abstract: A multi-block, read-ahead technique permits a DVD player to read and cache DVD data from a DVD source in response to navigation packs (NAV-PCKs) of individual VOBUs to avoid crossing title boundaries, Each VOBU has a NAV-PCK, which specifies the number of blocks in that VOBU. This information can guide the DVD player in performing read-ahead operations aligned to VOBUs, i.e., reading and caching data blocks separately for individual VOBUs. The invention takes advantage of the fact that data blocks within individual VOBUs do not cross title boundaries, and so read-ahead operations aligned to VOBUs avoid reading blocks that cross title boundaries.

Abstract: The waveform generator includes a free-running ring oscillator, an algebra module, a switching module and an output module. The free-running ring oscillator includes a plurality of delay elements connected in a loop and a plurality of taps disposed between the delay elements, with each tap providing a uniquely phased, oscillating transition signal. The algebra module generates an output signal indicating a first rising edge of the arbitrary waveform in response to an input signal. The switching module includes a switch input port in electrical communication with the algebra data output port, a plurality of switch tap input ports in electrical communication with the free-running ring oscillator taps and switch output port. At the switch output port, the switch module provides a first transition signal selected from one of the plurality of free-running ring oscillator taps in response to the signal indicative of a first rising edge received at the switch input port.

Abstract: A method for computing Reed-Solomon error control checkbytes in reduced time and with reduced gate count. Two syndromes, s0 and s1, are computed for a sequence of data elements, using a selected primitive a that satisfies a selected primitive polynomial relation p(&agr;)=0. Each of two checkbytes, c0 and c1, is expressed as a linear combination of the syndromes s0 and s1, where each coefficient of each linear combination is expressed as a single power of the primitive &agr;, which is stored at the checkbyte generator for multiple use. This approach reduces gate count and associated time delay in formation of the usual Reed-Solomon multiplier coefficients.

Abstract: A method and apparatus for the scaling of digital image data for improved image quality on LCD displays is described. An output pixel value is determined from a source pixel array approximately centered at the output pixel location. Edge arrays are generated by comparing the differences in the color component values of adjacent vertical and horizontal pixels to a threshold value. Logic arrays operate on edge arrays to determine if the source pixel array matches predetermined pixel arrangements. Offset values corresponding to the location of the output pixel relative to the center pixel in the source pixel array are calculated. The offset values are modified if a logic array match is found. Offset values are also modified according to a predetermined modifier function. Bilinear interpolation based on the resulting offset values is used to determine the output pixel value.