Patents Assigned to Plastics Logic Limited
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Publication number: 20160035764Abstract: A technique comprising: securing a device substrate (8) to a carrier (1) using one or more adhesive elements (6); forming electronic elements (10) on the device substrate with the device substrate thus secured to the carrier; and thereafter reducing the adhesion strength of at least one of the one or more adhesive elements to facilitate the release of the substrate from the carrier.Type: ApplicationFiled: October 13, 2015Publication date: February 4, 2016Applicant: PLASTIC LOGIC LIMITEDInventor: James WATTS
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Publication number: 20160035763Abstract: A technique comprising: securing a device substrate (8) to a carrier (1) using one or more adhesive elements (6); forming electronic elements (10) on the device substrate with the device substrate thus secured to the carrier; and thereafter reducing the adhesion strength of at least one of the one or more adhesive elements to facilitate the release of the substrate from the carrier.Type: ApplicationFiled: October 13, 2015Publication date: February 4, 2016Applicant: PLASTIC LOGIC LIMITEDInventor: James WATTS
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Patent number: 9223181Abstract: A technique comprising: assembling together a front plane (1) comprising a first flexible substrate (4) supporting a display medium (6a) and a backplane (2) comprising a second flexible substrate (8) supporting an array of electronic elements (9) for controlling said display medium; and creating an electrically conductive connection between first and second conductive elements (5 10) on opposing faces of the frontplane and backplane by sandwiching an electrically conductive structure (3) between the frontplane and backplane in the region of the first and second conductive elements, wherein the conductive structure is at least more flexible than the least flexible one of the front plane and backplane.Type: GrantFiled: June 3, 2011Date of Patent: December 29, 2015Assignee: PLASTIC LOGIC LIMITEDInventors: James Watts, William Reeves, Sharjil Siddique
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Patent number: 9171521Abstract: A technique comprising: determining a correction to a drive voltage for the front plane common electrode of a first display device according to the result of one or more measurements of an optical property for the first display device and the result of one or more measurements of said optical property for one or more other devices including an optical medium having the same optical response as the first display device.Type: GrantFiled: June 3, 2011Date of Patent: October 27, 2015Assignee: PLASTIC LOGIC LIMITEDInventor: Boon Hean Pui
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Patent number: 9130179Abstract: A device comprising an array of transistors, including: patterned conductive layers located at lower and upper levels in a stack of layers on a substrate, which patterned conductive layers define gate conductors and source-drain electrodes of the array of transistors; wherein the stack of layers further comprises a dielectric layer below said lower level, and a further patterned conductive layer below said dielectric layer; and wherein said further patterned conductive layer both provides an electrical function in said array of transistors via said dielectric layer, and defines openings via which the dielectric layer serves to increase the strength of adhesion between the device substrate and the patterned conductive layer at said lower level.Type: GrantFiled: November 25, 2011Date of Patent: September 8, 2015Assignee: PLASTIC LOGIC LIMITEDInventors: Martin Jackson, Catherine Ramsdale, Jerome Joimel
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Publication number: 20150138736Abstract: A flexible electronic reading device, the device comprising a display part and a handle, wherein said display part comprises: a display backplane on a flexible substrate; and a display mounted over said display backplane; wherein said handle is located at one edge of said display backplane and contains display interface electronics for said display; and wherein said display part of said electronic reading device comprises a unitary, continuous structure lacking a separate housing.Type: ApplicationFiled: May 22, 2013Publication date: May 21, 2015Applicant: Plastic Logic LimitedInventor: Mark Catchpole
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Patent number: 9035665Abstract: A technique comprising: producing a plurality of devices according to a common production process; and determining the thickness of a layer of one of said plurality of devices using an indicator of a first electrical property dependent on the area of overlap between a first element of the device and a second element of the device partially underlying said first element via said layer, wherein the method further comprises: additionally using an indicator of a second electrical property dependent on the area of overlap between said first element of the device and a third element of the device also partially underlying said first element via said layer, wherein (a) the difference between (i) a measured indicator of said first electrical property, and (ii) a measured indicator of said second electrical property provides a more reliable indicator of the thickness of said layer than (b) an indicator of said first electrical property.Type: GrantFiled: June 3, 2011Date of Patent: May 19, 2015Assignee: PLASTIC LOGIC LIMITEDInventor: Stephan Riedel
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Patent number: 9007298Abstract: A method updates an image displayed on an electronic display. The image can include a first region having multiple lines and a second region also having multiple lines. The method includes driving the pixels of the first and second regions according to one or more frames. In a first frame, driving the pixels of the first and second regions is done by scanning the lines of the regions from a first end of the first region to a second end of the second region, the second end opposite the first end along a scanning direction. In a second frame, driving the pixels of the first and second regions is done by scanning the lines of the regions from the first end to the second end, and the scanning begins before the scanning according to the first frame reaches the second end.Type: GrantFiled: August 12, 2011Date of Patent: April 14, 2015Assignee: Plastic Logic LimitedInventor: Philip Moyse
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Patent number: 9007335Abstract: A method of projected capacitance touch sensing on a display includes updating the display by applying a drive waveform to each pixel of the display over a plurality of frame periods to update a pixel state. The updating includes selecting each row of the display in turn and repeating a frame update to drive pixels with successive time slices of the drive waveforms. The method further includes sensing a signal from a projected capacitance touch sensing electrode of the display during a sensing interval to provide a touch sensing response; identifying when column drive levels of the drive waveforms for pixels of one selected row change by more than a threshold level between the selected row and a next selected row; and inhibiting the touch sensing responsive to the column drive row change signal indicating a greater than the threshold level change of the drive levels between the selected rows.Type: GrantFiled: December 21, 2010Date of Patent: April 14, 2015Assignee: Plastic Logic LimitedInventors: Ivan Cronin, Nicholas Simon Terry, Philip Moyse, Edward Simons, Steven Paul Farmer
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Patent number: 9001024Abstract: We describe an electronic document reading device having a front, display surface and a device rear surface, the device including a connector mounted on an edge of the device. The device includes a back panel having an exterior surface to provide the rear surface and an interior surface, wherein the back panel is substantially transparent and the interior surface of the back panel is substantially opaque, and wherein the back panel has a cut-out for the connector such that a rear surface of the connector is substantially flush with the device rear surface provided by the exterior of the transparent back panel, such that the opaque interior surface of the transparent back panel gives the impression of a device thinner than a physical thickness of the device defined by the substantially flush connector rear surface and the device rear surface.Type: GrantFiled: November 7, 2008Date of Patent: April 7, 2015Assignee: Plastic Logic LimitedInventors: Carl Hayton, William Reeves, Ben Watson, David Fisher
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Patent number: 8987808Abstract: An electronic device comprising an optically transparent substrate, a first electrode structure incorporating a channel, said channel being optically transparent and said electrode structure being optically opaque, at least one intermediate layer, and a photosensitive dielectric layer disposed above the at least one intermediate layer, the photosensitive dielectric layer incorporating a trench in a region essentially over said channel, the electronic device further comprising a further electrode, wherein the further electrode is located partially in the trench and partially beyond the trench such that portions of the further electrode that extend beyond the trench are separated from the at least one intermediate layer by the photosensitive dielectric layer.Type: GrantFiled: March 28, 2007Date of Patent: March 24, 2015Assignees: Cambridge Enterprise Limited, Plastic Logic LimitedInventors: Paul A. Cain, Yong-Young Noh, Henning Sirringhaus
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Patent number: 8986793Abstract: A method of producing a metal element of an electronic device on a substrate, including the steps of: forming a mixture of a material comprising metal atoms with a liquid, depositing the material from the liquid mixture onto a substrate, and then irradiating at least part of the deposited material with light to increase the electrical conductivity of the deposited material.Type: GrantFiled: September 2, 2004Date of Patent: March 24, 2015Assignee: Plastic Logic LimitedInventors: Paul Cain, Anoop Menon, Henning Sirringhaus, James D. Watts, Tim Von Werne, Thomas M. Brown
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Patent number: 8987116Abstract: A technique of producing one or more electronic switching devices, each switching device comprising a semiconductor channel between two electrodes, and a dielectric element separating said semiconductor channel from a switching electrode, the method comprising: depositing onto a substrate a layer of material for at least partly forming said semiconductor channel or said dielectric element of said one or more switching devices by transferring said material onto said substrate from a rotating first roller.Type: GrantFiled: June 3, 2011Date of Patent: March 24, 2015Assignee: Plastic Logic LimitedInventors: Patrick Too, Michael Banach
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Patent number: 8969852Abstract: An electronic device including at least first and second transistors integrated together on a substrate and each including an organic semiconductor region, wherein the first and second transistors are either both n-type or both p-type but wherein one of the first and second transistors is a normally-ON transistor and the other of the first and second transistors is a normally-OFF transistor.Type: GrantFiled: September 10, 2004Date of Patent: March 3, 2015Assignee: Plastic Logic LimitedInventors: Paul A. Cain, Henning Sirringhaus, Nicholas J. Stone, Thomas M. Brown
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Patent number: 8964188Abstract: The invention relates to the field of measurement technology and concerns a method and an apparatus, such as may be used, by way of example, in thin-layer technology for organic dielectric semi-conducting or conducting layers on substrates. The object of the invention is to indicate a method and an apparatus with which both the surface topography of the coating and that of the surface may be determined independently of one another, at the same position. The object is achieved by a method wherein the three-dimensional topography of the coating is determined using chromatic white light measurement and, subsequently, the thickness of the coating is determined using UV interferometry, and the surface topography of the coated surface is determined by a comparison with the overall dimensions of the coated surface. The object is further achieved by an apparatus wherein an apparatus for chromatic white light measurement and an apparatus for UV interferometry are disposed on a test bench.Type: GrantFiled: June 15, 2012Date of Patent: February 24, 2015Assignees: Leibniz-Institut fur Polymerforschung Dresden E.V., Plastic Logic LimitedInventors: Alfredo Calvimontes, Kay Lederer
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Patent number: 8900955Abstract: An electronic device comprising an optically transparent substrate, a first electrode structure incorporating a channel, said channel being optically transparent and said electrode structure being optically opaque, at least one intermediate layer, and a photosensitive dielectric layer disposed above the at least one intermediate layer, the photosensitive dielectric layer incorporating a trench in a region essentially over said channel, the electronic device further comprising a further electrode, wherein the further electrode is located partially in the trench and partially beyond the trench such that portions of the further electrode that extend beyond the trench are separated from the at least one intermediate layer by the photosensitive dielectric layer.Type: GrantFiled: September 15, 2012Date of Patent: December 2, 2014Assignees: Cambridge Enterprise Limited, Plastic Logic LimitedInventors: Paul A. Cain, Yong-Young Noh, Henning Sirringhaus
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Patent number: 8896071Abstract: A technique for isolating electrodes on different layers of a multilayer electronic device across an array containing more than 100000 devices on a plastic substrate. The technique comprises depositing a bilayer of a first dielectric layer (6) of a solution-processible polymer dielectric and a layer of parylene (9) to isolate layers of conductor or semiconductor on different levels of the device. The density of defects located in the active area of one of the multilayer electronic devices is typically more than 1 in 100000.Type: GrantFiled: May 12, 2008Date of Patent: November 25, 2014Assignee: Plastic Logic LimitedInventors: Timothy Von Werne, Catherine Mary Ramsdale, Henning Sirringhaus
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Patent number: 8890831Abstract: A touch sensitive active matrix display device is provided. The device includes a display fabricated on a first flexible substrate, said display having a viewing surface. The device further includes a touch sensitive sensor including a second flexible substrate, under said display. The touch sensor is operated by touching said viewing surface of said display, and said combined display and touch sensitive sensor is flexible.Type: GrantFiled: April 30, 2013Date of Patent: November 18, 2014Assignee: Plastic Logic LimitedInventors: Seamus Burns, Sharjil Siddique, Simon Jones
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Patent number: 8859312Abstract: A method of manufacturing an integrated circuit (IC) for driving a flexible display includes depositing a pattern of spatially non-repetitive features in a first layer on a flexible substrate, said pattern of spatially non-repetitive features not substantially regularly repeating in both of two orthogonal directions (x,y) in the plane of the substrate; depositing a pattern of spatially repetitive features in a second layer on said first layer; aligning said second layer and said first layer so as to allow electrical coupling between said non-repetitive features and said repetitive features, wherein distortion compensation is applied during deposition of said repetitive features to enable said alignment.Type: GrantFiled: October 1, 2007Date of Patent: October 14, 2014Assignee: Plastic Logic LimitedInventors: Carl Hayton, Paul A. Cain
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Patent number: 8845058Abstract: A printing machine includes a substrate and at least one printhead with at least two material deposition channels which are movable with respect to the substrate, wherein the printhead is mounted on a stage which allows rotation of the printhead around an axis perpendicular to the substrate and translation in a direction perpendicular to the print direction, and wherein during each print swath, the rotation angle and translation values of the printhead are varied in order to change the pitch and the lateral position in the direction perpendicular to the print direction of material deposited from the different deposition channels; and an algorithm which computes the required rotation angles and translation values for a given pattern of substrate distortion.Type: GrantFiled: July 31, 2012Date of Patent: September 30, 2014Assignee: Plastic Logic LimitedInventors: Henning Sirringhaus, James D. Watts