Patents Assigned to Plastics Logic Limited
  • Publication number: 20130110421
    Abstract: Performing an analysis of an electronic device sample by measuring a property at a plurality of points of said electronic device sample, and in advance of said analysis subjecting said plurality of points to at least one treatment that increases the difference in said property between at least two elements of said electronic device sample.
    Type: Application
    Filed: May 6, 2011
    Publication date: May 2, 2013
    Applicant: PLASTIC LOGIC LIMITED
    Inventor: Kay Lederer
  • Patent number: 8411231
    Abstract: A pixel architecture for compensating for distortions in a flexible substrate of a flexible display, including: a first layer including a thin film transistor (TFT) on a flexible substrate; a second layer disposed above said first layer including a pixel electrode coupled to said TFT for receiving a signal from said TFT; and a third layer including a color filter for filtering light displayed by said pixel, wherein said third layer is aligned to said second layer such that said color filter is substantially aligned to said pixel electrode, said alignment compensating for distortions in said first layer caused by distortions in said flexible substrate.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: April 2, 2013
    Assignee: Plastic Logic Limited
    Inventor: Tim Von Werne
  • Patent number: 8400576
    Abstract: A device architecture for an active matrix display pixel comprising source addressing lines and TFT drain electrode formed on a first metal level of the device, the pixel electrode formed on a second, separate metal level, and the TFT gate electrode and gate addressing lines on a third metal level separated from both the first level and the second level by at least one dielectric layer, wherein the pixel electrode on the second level is electrically connected to the drain electrode on the first level through a via-hole connection and a pixel capacitor is formed by overlap of part of the pixel electrode on the second level with a portion of the gate addressing line of a neighboring line of pixels on the third level. The device is formed preferably using print based methods.
    Type: Grant
    Filed: February 4, 2004
    Date of Patent: March 19, 2013
    Assignee: Plastic Logic Limited
    Inventors: Seamus Burns, Henning Sirringhaus
  • Publication number: 20130040657
    Abstract: We describe an electronic document reading device comprising: a wireless remote content connection; a physical user interface for receiving device control commands from a user; non-volatile data storage; a non-volatile electrophoretic display screen; and a device controller.
    Type: Application
    Filed: December 24, 2010
    Publication date: February 14, 2013
    Applicant: Plastic Logic Limited
    Inventor: Martin Jackson
  • Publication number: 20130027458
    Abstract: A printing machine includes a substrate and at least one printhead with at least two material deposition channels which are movable with respect to the substrate, wherein the printhead is mounted on a stage which allows rotation of the printhead around an axis perpendicular to the substrate and translation in a direction perpendicular to the print direction, and wherein during each print swath, the rotation angle and translation values of the printhead are varied in order to change the pitch and the lateral position in the direction perpendicular to the print direction of material deposited from the different deposition channels; and an algorithm which computes the required rotation angles and translation values for a given pattern of substrate distortion.
    Type: Application
    Filed: July 31, 2012
    Publication date: January 31, 2013
    Applicant: Plastic Logic Limited
    Inventors: Henning Sirringhaus, James D. Watts
  • Patent number: 8349673
    Abstract: A method of producing a plurality of transistors each including a source/drain electrode pair comprising a conductor material and a channel comprising semiconductor material between the source and drain electrodes of said source/drain electrode pair; the method comprising (i) forming over a substrate at least a first layer of said conductor material or a precursor thereto and a second layer of said semiconductor material or a precursor thereto; and (ii) thereafter removing selected portions of at least said first and second layers so as to define at least two adjacent source/drain electrode pairs that are unconnected to each other within said first and second layers.
    Type: Grant
    Filed: April 3, 2006
    Date of Patent: January 8, 2013
    Assignee: Plastic Logic Limited
    Inventors: Paul A. Cain, Carl Hayton, Anoop Menon, Thomas M. Brown
  • Patent number: 8343802
    Abstract: A method of processing a flexible encapsulation scheme to encapsulate a flexible device, such as a display device in order to provide structural support for the display module. An upper transparent encapsulation layer covers and protects the media and active area of the device. A lower encapsulation layer is deposited over the under side of the display to complete the encapsulation and the two protective encapsulation layers are sealed. A driver housing may be positioned at the opposite end of the device to the overlap region of the encapsulation layers in order to protect the driver electronics.
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: January 1, 2013
    Assignee: Plastic Logic Limited
    Inventors: Kieran Reynolds, William Reeves
  • Publication number: 20120280969
    Abstract: We describe circuits and methods for compensating for gate kickback in electro-optic displays, in particular electrophoretic displays. In embodiments the method comprises compensating gate kickback comprising a change in voltage between a pixel electrode and a common electrode of the display arising from capacitive coupling between a gate drive line and the pixel electrode by offsetting a value of a common voltage on the common electrode by an offset value dependent on a difference between a magnitude of said positive gate voltage and a magnitude of said negative gate voltage.
    Type: Application
    Filed: November 24, 2010
    Publication date: November 8, 2012
    Applicant: PLASTIC LOGIC LIMITED
    Inventor: David Hough
  • Patent number: 8256859
    Abstract: A printing machine includes a substrate and at least one printhead with at least two material deposition channels which are movable with respect to the substrate, wherein the printhead is mounted on a stage which allows rotation of the printhead around an axis perpendicular to the substrate and translation in a direction perpendicular to the print direction, and wherein during each print swath, the rotation angle and translation values of the printhead are varied in order to change the pitch and the lateral position in the direction perpendicular to the print direction of material deposited from the different deposition channels; and an algorithm which computes the required rotation angles and translation values for a given pattern of substrate distortion.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: September 4, 2012
    Assignee: Plastic Logic Limited
    Inventors: Henning Sirringhaus, James D. Watts
  • Publication number: 20120193655
    Abstract: A method is provided for fabricating a multilayer electronic device on a flexible substrate including at least a first and a second patterned layer, wherein the first patterned layer is defined with a linewidth that is smaller than the linewidth of the second patterned layer, and the second patterned layer is defined by a patterning technique which is capable of correcting for local distortions of the pattern of said first layer on top of the flexible substrate and wherein the first patterned layer is laid-out in such a way that the geometric overlap between a portion of the second layer and a portion of the first layer is insensitive against small variations of the position of the second patterned layer.
    Type: Application
    Filed: April 4, 2012
    Publication date: August 2, 2012
    Applicant: Plastic Logic Limited
    Inventors: Henning Sirringhaus, Seamus Burns
  • Publication number: 20120193721
    Abstract: Forming, between a supporting substrate and the bottom conductive layer of a stack of layers a plurality of electronically functional elements, a non-conducting layer that functions to increase the adhesion of said bottom conductive layer to the supporting substrate.
    Type: Application
    Filed: June 4, 2010
    Publication date: August 2, 2012
    Applicant: PLASTIC LOGIC LIMITED
    Inventors: Jerome Joimel, Catherine Ramsdale, Frank Placido
  • Patent number: 8228323
    Abstract: We describe an electronic document reader system for viewing electronic documents, in which the electronic documents are viewable on a removable electronic document reader display that is useable whilst removed from an electronic document reader display holder. The system comprises: a removable non-volatile display for viewing electronic documents thereon, the display having a display portion on which electronic documents are viewable; a display holder for receiving the removable display, the display holder comprising a back, and an open front shaped to receive the removable display, each of the display and the holder having an electrical interface, wherein, when the removable display is received in the open front, the removable display and holder form an electrically connected combined unit to enable the display to receive document data from the holder for display, and wherein the removable display is useable to read electronic documents when removed from the display holder.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: July 24, 2012
    Assignee: Plastic Logic Limited
    Inventors: Carano Bandel, Hermann Hauser, Carl Hayton, Simon Jones, John Mills, Henning Sirringhaus
  • Patent number: 8207947
    Abstract: This invention generally relates to an electronic document readers and reading devices, that is to a device that presents a document to a user on a display to enable the user to read the document.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: June 26, 2012
    Assignee: Plastic Logic Limited
    Inventors: Matthew Marsh, Timon Botez, Nicole Hodgkinson, David Tonge
  • Patent number: 8203546
    Abstract: This invention generally relates to an electronic document reading device, that is to a device such as an electronic book which presents a document to a user on a display to enable the user to read the document. A portable flex-tolerant electronic document reading device, the device including a flex-tolerant display coupled to a flex-tolerant layer of pixel driver circuitry, and wherein said device has a physical configuration comprising a planar display surface and a rear surface having a frame around its outer perimeter to stiffen the device, the frame defining a central region of relatively reduced thickness compared with a thickness of said frame.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: June 19, 2012
    Assignee: Plastic Logic Limited
    Inventors: Ben Watson, Nick Sandham, David Fisher, Duncan Barclay, Simon Jones, Carl Hayton, Anusha Nirmalananthan
  • Patent number: 8174634
    Abstract: A method is provided for fabricating a multilayer electronic device on a flexible substrate including at least a first and a second patterned layer, wherein the first patterned layer is defined with a linewidth that is smaller than the linewidth of the second patterned layer, and the second patterned layer is defined by a patterning technique which is capable of correcting for local distortions of the pattern of said first layer on top of the flexible substrate and wherein the first patterned layer is laid-out in such a way that the geometric overlap between a portion of the second layer and a portion of the first layer is insensitive against small variations of the position of the second patterned layer.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: May 8, 2012
    Assignee: Plastic Logic Limited
    Inventors: Henning Sirringhaus, Seamus Burns
  • Patent number: 8153512
    Abstract: A method of forming a patterned layer, including the steps of: (i) depositing via a liquid medium a first material onto a substrate to form a first body on said substrate; (ii) depositing via a liquid medium a second material onto said substrate to form a second body, wherein said first body is used to control said deposition of said second material so as to form a patterned structure including said first and second bodies; and (iii) using said patterned structure to control the removal of selected portions of a layer of material in a dry etching process or in a wet etching process using a bath of etchant.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: April 10, 2012
    Assignee: Plastics Logic Limited
    Inventor: Henning Sirringhaus
  • Patent number: 8062984
    Abstract: A method of fabricating an electronic device, the device including a plurality of layers on a substrate, the layers including an upper conductive layer and at least one patterned underlying layer between said conductive layer and said substrate. The method includes patterning said underlying layer, and patterning said upper conductive layer by laser ablation using a stepwise process in which successive areas of said upper conductive layer are ablated by successively applied laser patterns. The successively applied laser patterns overlap one another in an overlap region. The method further includes configuring a said laser pattern and said patterned underlying layer with respect to one another such that in a said overlap region said patterned underlying layer is substantially undamaged by said stepwise laser ablation.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: November 22, 2011
    Assignee: Plastics Logic Limited
    Inventors: Paul A. Caln, Carl Hayton
  • Publication number: 20110207300
    Abstract: A method for forming an electronic device having a multilayer structure, comprising: embossing a surface of a substrate so as to depress first and second regions of the substrate relative to at least a third region of the substrate; depositing conductive or semiconductive material from solution onto the first and second regions of the substrate so as to form a first electrode on the first region and a second electrode on the second region, wherein the electrodes are electrically insulated from each other by the third region.
    Type: Application
    Filed: March 25, 2011
    Publication date: August 25, 2011
    Applicant: PLASTIC LOGIC LIMITED
    Inventors: Thomas Meredith BROWN, Henning SIRRINGHAUS, John Devin MACKENZIE
  • Patent number: D668250
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: October 2, 2012
    Assignee: Plastic Logic Limited
    Inventors: Caroline Flagiello, Martin Zabaleta, James Yurchenco, Francis James Canova, Jr., Carl Hayton, Kenneth Ralph Venegas
  • Patent number: D674402
    Type: Grant
    Filed: July 6, 2010
    Date of Patent: January 15, 2013
    Assignee: Plastic Logic Limited
    Inventors: Daniel Stillion, Cameron Wu, Katrin Gosling, Edgar Lee, Brian Becker, Andrew M. Proehl