Abstract: A base substrate which prevents burrs generated during the cutting process includes: multiple conductive layers stacked in one direction with respect to the base substrate; at least one insulation layer being alternately stacked with said conductive layers and electrically separating said conductive layers; and a through-hole penetrating said base substrate covering said insulation layer at the contact region where said cut surface and said insulation layer meet during the cutting of said base substrate in accordance with a predetermined region of the chip substrate. A method of manufacturing the base substrate includes alternately stacking conductive layers and insulation layers and forming a through-hole.

Abstract: A chip substrate includes conductive portions, insulation portions, cavities and a heat dissipating portion. The insulation portions are alternately bonded to the conductive portions to electrically isolate the conductive portions. The lens insertion portions are formed on an upper surface of the chip substrate at a predetermined depth so as to extend across each of the insulation portions. Each of the lens insertion portions includes a predetermined number of straight sides and a predetermined number of arc-shaped corners formed in regions where the straight sides meet with each other. The cavities are formed inward of the lens insertion portions at a predetermined depth so as to extend across each of the insulation portions. The heat dissipating portion is bonded to a lower surface of the chip substrate.

Abstract: Provided is an array substrate for mounting a chip. The array substrate includes a plurality of conductive layers unidirectionally stacked with respect to an original chip substrate; a plurality of insulating layers alternately stacked with the plurality of conductive layers, and electrically separate the plurality of conductive layers; and a cavity having a groove of a predetermined depth with respect to a region including the plurality of insulating layers in an upper surface of the original chip substrate. Accordingly, since the optical device array of a single structure is used as a line source of light, an emission angle emitted from the optical device is great, it is not necessary to form an interval for supplying an amount of light, and a display device can be simply constructed. Further, since it is not necessary to perform soldering a plurality of LED packages on a printed circuit board, a thickness of a back light unit can be reduced.

Abstract: A method for manufacturing a chip-mounting substrate includes a pre-coating step of forming a precoat on a substrate including a plurality of conductive portions and an insulating portion interposed between the conductive portions, an etching step of etching at least a portion of the precoat through a laser to form a pattern, and a step of forming a metal layer on the substrate. The pattern is disposed on at least one of the conductive portions, and the metal layer is formed in the pattern.

Abstract: A chip substrate includes at least one insulation portion interposed between conductive portions. A cavity formed in a recessed shape from a region of an upper surface of the chip substrate exposes a top surface of a part of the at least one insulation portion. An insulation layer is coated on the upper surface of the chip substrate excluding the region of the cavity. A bump may be formed at a predetermined height within the cavity.

Abstract: A folding type capacitor includes a metal substrate wherein a through hole penetrates an inside thereof; at least one dielectric layer formed on a surface of the metal substrate and an inner peripheral surface of the through hole; and an electrode layer formed on the at least one dielectric layer, wherein the metal substrate has bending portions whose surfaces are facing each other. Thus, manufacturing process is more simplified since Al2O3 insulation layers are formed by anodizing the aluminum layer without forming the extra dielectric layers after forming the aluminum layer, so that the manufacturing cost can be reduced, and also a multi-stacked capacitor having a high capacitance and a high reliability can be provided by stacking capacitors including a plurality of aluminum oxide layers using a more simplified process.

Abstract: The present invention relates to a capacitor. The capacitor includes a substrate; a dielectric layer formed on the substrate; and an electrode layer comprising a first electrode layer and a second electrode layer formed on the dielectric layer, wherein the first electrode layer and the second electrode layer are separated from each other, and at least a portion of the first electrode layer and at least a portion of the second electrode layer are disposed on a same surface. With this configuration, applying the electricity becomes easy, and since the first and the second electrode layers function as the electrodes being charged with different polarity electrical charges respectively, manufacturing thereof becomes easy, and the structure thereof is simple.

Abstract: The present invention relates to an LED metal substrate package, and particularly, to an LED metal substrate package having a heat dissipating structure, and a method of manufacturing same.

Abstract: An anodic oxide film structure cutting method is provided. The method includes: an etching step of forming an etched groove by etching one surface of an anodic oxide film having a plurality of anodizing pores along a predetermined cutting line and forming increased-diameter pores by enlarging entrances of the anodizing pores positioned on an inner bottom surface of the etched groove; and a cutting step of cutting the anodic oxide film along the etched groove. Also provided is a unit anodic oxide film structure produced by the cutting method.

Abstract: The present invention relates to an optical device substrate comprising: unit block substrates wherein a flat panel metal substrate are partitioned into n (n>1) number of optical device attachment areas, and the insulating members are formed inside the metal substrate in a way that the adjacent partitioned areas are insulated; first horizontal insulating members for insulating between the unit block substrates being stacked; outer metal electrode substrates bonded to the unit block substrates located in the upper end and the lower end among the unit block substrates being stacked; second horizontal insulating members for insulating between the outer metal electrode substrates and the unit block substrates; a pair of inner metal electrode substrates inserted instead of the first horizontal insulating members into more than any one of the adjacent unit block substrates; and third horizontal insulating members for insulating the pair of inner metal electrode substrates.

Abstract: A chip mounting substrate including a plurality of conductive portions to apply an electrode voltage to a mounted chip having electrode portions, at least one insulation portion configured to electrically isolate conductive portions, a cavity depressed inward of the conductive portions and providing a space in which the chip is mounted and bumps formed on surfaces of the conductive portions having the cavity and bonded to the electrode portions. In the case of a metal substrate, a tight bonding is enabled between the chip and the substrate by bonding a plating layer formed on the electrode portions of the chip using bumps formed on the metal substrate.

Abstract: The present invention relates to an optical device and a method for manufacturing the same. The technical object of the invention is to realize a surface emitting body which allows heat generated from a light-emitting chip to be easily dissipated, eliminates the need for an additional wiring layer, and allows a singular light emitting chips or a plurality of light emitting chips to be arranged in series, in parallel, or in series-parallel. The present invention discloses an optical device comprising: a substrate; a plurality of light emitting chips disposed on the substrate; a plurality of conductive wires which electrically connect the substrate with the light emitting chips such that the plurality of light emitting chips are connected to each other in series, in parallel or in series-parallel; and a protective layer which covers the plurality of light emitting chips and the plurality of conductive wires on the substrate.

Abstract: Disclosed is a chip-mounting substrate. The chip-mounting substrate includes a plurality of conductive portions configured to apply voltages to at least two or more chips to be mounted, a plurality of insulation portions formed between the conductive portions and configured to electrically isolate the conductive portions, and a cavity formed in a region which includes at least three or more of the conductive portions and at least two or more of the insulation portions and depressed inward to form a space in which the chips are mounted.

Abstract: Disclosed is a chip substrate. The chip substrate includes: conductive portions laminated in one direction to constitute the chip substrate; insulation portions alternately laminated with the conductive portions to electrically isolate the conductive portions; a cavity formed at a predetermined depth in a recessed shape in a region including the insulation portions on an upper surface of the chip substrate; and a groove portion disposed outside the cavity in a spaced-apart relationship with the cavity and formed at a predetermined depth in a recessed shape. According to the present invention, an adhesive agent is applied in a groove portion formed in advance. It is therefore possible to prevent the adhesive agent from being exposed to the light emitted from optical elements and to prevent the adhesive agent from being denatured. This makes it possible to enhance the reliability of lens bonding. Furthermore, there is no need to use an expensive resistant adhesive agent.

Abstract: A chip substrate includes laminated conductive portions, and laminated insulation portions that electrically isolate the conductive portions, with a cavity in a recessed shape in a region including the insulation portions on an upper surface of the chip substrate. The substrate includes an insulation layer on the upper surface, excluding a region of the cavity, and a continuous plating layer along a periphery of the chip substrate on the insulation layer. A portion of a top surface of each insulation portion is exposed in the cavity, and another portion of the top surface of each insulation portion is coated with the insulation layer. A chip package includes a chip substrate, with an optical element sealed in the cavity by a sealing member or lens.

Abstract: The present invention relates to an LED metal substrate package, and particularly, to an LED metal substrate package having a heat dissipating structure, and a method of manufacturing same.

Abstract: A method of manufacturing an optical device for a back light unit includes forming a metal ingot by adhering insulating layers between metal plates. The metal ingot is cut in a vertical direction to create original substrates each with insulating layer portions in parallel with intervals therebetween. Solder resist is deposited on at least one of a top surface and bottom surface of an original substrate.

Abstract: An optical device substrate includes metal plates and insulating layers formed between the metal plates. Each insulating layer includes a cured insulating layer formed by curing insulating material and an anodized layer merged with each metal plate, the anodized layer formed by anodizing a first metal and a second metal of each metal plate. The first metal and the second metal include a first anodized layer and a second anodized layer, respectively, and are electrically insulated by interfaces including a first interface formed between the first metal and the first anodized layer, a second interface formed between the first anodized layer and the cured insulating layer, a third interface formed between the cured insulating layer and the second metal and a fourth interface formed between the second anodized layer and the second metal.

Abstract: A chip package has a light shield for blocking the light radiated from the chip. The chip package includes: a chip substrate including a conductive portion and at least one insulating portion electrically separating the conductive portion; an optical device mounted on the chip substrate; a sealing portion sealing the upper surface of the chip substrate; an adhesive bonding the sealing portion to the chip substrate; and a light shield formed in the sealing portion and blocking the light of the optical device from entering into the adhesive.

Abstract: A chip substrate includes: a conductive layer being stacked in one direction and constituting a chip substrate; an insulator being alternately stacked with the conductive layer and electrically separating the conductive layer; and a lens insert having: a depression reaching down to a predetermined depth from a specified area of an upper surface of the chip substrate overlapping with the insulator; and a predetermined number of sides on the upper surface wherein arcs are formed at regions where the sides are met with each other. Since the space for inserting a lens can be formed to have a shape comprising straight lines, and a lens to be inserted can also be manufactured in a shape comprising straight lines, therefore the manufacturing process for a lens to be inserted into the chip substrate can be further simplified.