Abstract: Apparatus and methods for sensing resonant circuit signals to enhance control in a resonant converter are described herein. A buffer circuit coupled in parallel with or across a resonant component (e.g., a transformer) input port avails a buffered primary port signal for use in resonant conversion. The buffered primary port signal is a comprehensive signal including information relating to both input voltage and input power; and it may be used to advantageously enhance switching and power conversion in an inductor-inductor capacitor (LLC) converter. Additionally, the LLC converter uses a sense interface circuit to provide a scaled replica of the buffered primary port signal. In one example the scaled replica can advantageously be used with a secondary side controller to control output power based on the comprehensive information contained within the buffered primary port signal.

Abstract: A compensated amplifier for use in a power converter controller. The compensated amplifier comprises a first amplifier, a second amplifier, an integrator, and an arithmetic operator. The first amplifier coupled to receive a sensed signal and a reference signal and configured to generate a first error signal in response to the sensed signal and the reference signal. The second amplifier coupled to the first amplifier and configured to generate a second error signal in response to the sensed signal and the reference signal. The integrator coupled to the first amplifier and configured to generate an integrated error signal in response to the first error signal. The arithmetic operator coupled to the integrator and to the second amplifier, wherein the arithmetic operator is configured to generate a control signal in response to the integrated error signal and the second error signal.

Abstract: Discharge systems for electric vehicles and electric vehicles having discharge systems. In one implementation, a discharge system for an electric vehicle includes a step-down power converter configured to step down an input voltage to an output voltage; discharge circuitry coupled to the output of the step-down power converter, wherein the discharge circuitry is reversibly driveable to load the step-down power converter; an input component configured to receive input that originated from a human user or a sensor of the electric vehicle, wherein the input indicates that the electric vehicle is to shutdown; and discharge drive circuitry configured to drive the discharge circuitry to load the step-down power converter in response to the indication that the electric vehicle is to shutdown.

Abstract: The system comprises a plurality of driver modules coupled by a fault condition bus, e.g. single-wire bus. Each driver module includes an Error Flag Interface block coupled between a single terminal error flag input/output (EF I/O) and a Control block. Each driver module may be coupled- to a motor. When a driver module detects a local fault condition, its Error Flag Interface block is configured to lower the voltage at the single terminal EF I/O to communicate the change to the other driver modules. The Error Flag Interface block is further configured to monitor voltage changes at its single terminal EF I/O. An external fault condition is detected when the single terminal EF I/O is at a low voltage. The Error Flag Interface block is further configured to send a signal disabling the output of the driver module.

Abstract: A controller for use in a power converter that is configured to operate in a plurality of modes including a first mode and a second mode includes a frequency monitor module coupled to measure a signal characteristic of a switch drive signal coupled to control switching of a switches block of the power converter. The frequency monitor module includes a memory coupled to store a measured signal characteristic of the switch drive signal measured during the first mode. The frequency monitor module is coupled to generate a clock signal in response to the measured signal characteristic stored in the memory. The switch drive signal is coupled to be generated in response to the clock signal during the second mode.

Abstract: A control system for use in a power converter having a plurality of outputs comprising a primary switching control block, a secondary control block, and a multi-output control block. The primary switching control block is coupled to control switching of a primary switch. The secondary control block is coupled to control switching of a synchronous rectifier switch. The multi-output control block is coupled to control switching of at least one pulse transfer switch coupled to one of the plurality of outputs. A request for an energy pulse is transferred to the primary switching control block to turn ON the primary switch to transfer the energy pulse to one of the plurality of outputs. The multi-output control block comprises an interface to send the request for the energy pulse and to receive an acknowledge signal to and from the secondary control block.

Abstract: A controller includes a primary controller and a secondary controller to control switching of a power switch and a supplemental switch, respectively, coupled to an energy transfer element, e.g. an energy transfer element of a power converter. A ZV drive circuit are coupled to generate a ZVS signal that enables a ZV switch to store energy in the energy transfer element. The energy stored in the energy transfer element is coupled to reduce a switch voltage across the power switch prior to a next ON section of the primary drive signal. The secondary drive signal is generated in response to the drive signal and the ZVS signal.

Abstract: An HFET includes a first and second semiconductor material. A first composite passivation layer includes a first insulation layer and a first passivation layer, and the first passivation layer is disposed between the first insulation layer and the second semiconductor material. The HFET includes a second passivation layer, where the first insulation layer is disposed between the first passivation layer and the second passivation layer. A gate dielectric is disposed between the second semiconductor material and the first passivation layer. A source electrode and a drain electrode are coupled to the second semiconductor material, and a gate electrode is disposed laterally between the source electrode and the drain electrode. A first gate field plate is disposed between the first passivation layer and the second passivation layer and electrically connected to the gate electrode, and a second gate field plate is disposed above first gate field plate.

Abstract: A power converter includes a damping circuit coupled to the dissipative element for dissipating energy corresponding to a resonant ringing produced by a magnetic inductance of the energy transfer element and by the switch capacitance when the power converter is in discontinuous conduction mode.

Abstract: A die seal ring including a two-dimensional electron gas is presented herein. A semiconductor device comprises an active device region. The active device region comprises a device terminal; and a die seal ring comprising a two dimensional electron gas region surrounds the active device region. By electrically coupling the device terminal to the two dimensional electron gas region, voltages at the semiconductor sidewall may be controlled to substantially equal that of the device terminal.

Abstract: A charging device, comprising a first power converter configured to provide a first output current, a second power converter configured to provide a second output current, a switch coupled to an output of the first power converter and an output of the second power converter, a first socket coupled to the output of the first power converter, a second socket coupled to the output of the second power converter, and a power delivery (PD) controller configured to control a turn ON of the switch in response to a coupling of the first socket to a first powered device and an absence of coupling of the second socket to a second powered device.

Abstract: Pulse sharing control to enhance performance in multiple output power converters is described herein. During a switching cycle, an energy pulse is provided to more than one port (i.e., output) using pulse sharing transfer. Pulse sharing transfer may enhance performance by reducing audible noise due to subharmonics and by reducing a root mean square current of one or more secondary currents. A primary switch is closed to energize an energy transfer element via a primary current. Energy may be shared among a first load port on a first circuit path via a first secondary current and among a second load port on a second circuit path via a second secondary current.

Abstract: A system controller for a motor drive system comprising a phase current reconstructor configured to perform operations. The operations comprise receiving a stator current angle and a plurality of phase current sense signals from a plurality of respective devices that in operation drive the motor drive system, selecting, based on the received stator current angle, a reference table from among a plurality of reference tables that store reconstruction scaling factors for respective phase currents, obtaining, from the selected reference table, respective reconstruction scaling factors for the respective phase currents, generating, from the obtained reconstruction scaling factors, respective reconstructed phase current magnitude values for the plurality of devices, and outputting the reconstructed phase current magnitude values.

Abstract: An integrated circuit package includes a lead frame and an encapsulation that substantially encloses the lead frame. The lead frame further includes a first conductor comprising a first conductive loop and a second conductor galvanically isolated from the first conductor, proximate to and magnetically coupled to the first conductive loop to provide a communication link between the first and second conductor. The second conductor includes a first conductive portion, a second conductive portion, and a wire coupling together the first conductive portion and the second conductive portion.

Abstract: A secondary controller for use in a power converter includes a drive circuit coupled to a secondary side of the power converter. The drive circuit is configured to generate a first signal to enable a first switch coupled to a primary side of the primary converter. The first signal is generated in response to a feedback signal representative of an output of the power converter. A control circuit is coupled to receive the first signal and an input signal representative of a secondary winding voltage of the power converter. The control circuit is configured to generate a second signal to control a second switch coupled to the secondary side of the power converter. The control circuit is configured to generate the second signal in response to the first signal and a compare signal, and in response to an output of a latch.

Abstract: A controller includes first and second half bridge sense circuits coupled to a half bridge node. The half bridge node is coupled between a high side switch and a low side switch coupled to an input. A rising slew detection circuit is coupled to the first half bridge sense circuit to output a first slew detection signal in response to a rising slew event at the half bridge node. A falling slew detection circuit is coupled to the second half bridge sense circuit to output a second slew detection signal in response to a falling slew event at the half bridge node. A control circuit coupled to output a high side drive signal to the high side switch and a low side drive signal to the low side switch in response to the first slew detection signal, the second slew detection signal, and a feedback signal.

Abstract: Silicon carbide (SiC) junction field effect transistors (JFETs) are presented herein. A deep implant (e.g., a deep p-type implant) forms a JFET gate (106). MET gate and MET source (108) may be implemented with heavily doped n-type (N+) and heavily doped p-type (P+) implants, respectively. Termination regions may be implemented by using equipotential rings formed by deep implants (e.g., deep p-type implants).

Abstract: A lateral surface gate vertical field effect transistor with adjustable output capacitance is described herein. The lateral surface gate vertical field effect transistor includes both a lateral gate and a trench gate. The lateral gate modulates a surface channel and the trench gate includes a controllable depth. The controllable depth may be varied to advantageously adjust output capacitance.

Abstract: A controller comprising a driver interface referenced to a first reference potential, a drive circuit referenced to a second reference potential, and an inductive coupling. The driver interface comprises a first receiver configured to compare a portion of signals having a first polarity on the first terminal of the inductive coupling with a first threshold, and a second receiver configured to compare a portion of signals having a second polarity on the second terminal of the inductive coupling with a third threshold. The drive circuit comprises a first transmitter configured to drive current in a first direction in the second winding to transmit first signals, and a second transmitter configured to drive current in a second direction in the second winding to transmit second signals, the second direction opposite the first direction.

Abstract: Methods and apparatus for continuous conduction mode operation in multi-output power converters are described herein. During a switching cycle, secondary current may be delivered via a diode to a secondary output. Prior to beginning a subsequent switching cycle, a diverting current may be provided to a lower voltage secondary output on a parallel path. In this way diode current may be reduced to substantially zero prior to the subsequent switching cycle.