Patents Assigned to pSemi Corporation
  • Patent number: 11846660
    Abstract: A power detector with wide dynamic range. The power detector includes a linear detector, followed by a voltage-to-current-to-voltage converter, which is then followed by an amplification stage. The current-to-voltage conversion in the converter is performed logarithmically. The power detector generates a desired linear-in-dB response at the output. In this power detector, the distribution of gain along the signal path is optimized in order to preserve linearity, and to minimize the impact of offset voltage inherently present in electronic blocks, which would corrupt the output voltage. Further, the topologies in the sub-blocks are designed to provide wide dynamic range, and to mitigate error sources. Moreover, the temperature sensitivity is designed out by either minimizing temperature variation of an individual block such as the v-i-v detector, or using two sub-blocks in tandem to provide overall temperature compensation.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: December 19, 2023
    Assignee: pSemi Corporation
    Inventors: Damian Costa, Chih-Chieh Cheng, Christopher C Murphy, Tero Tapio Ranta
  • Patent number: 11848666
    Abstract: Methods and devices to reduce the switching time of radio frequency (RF) switches including antenna switches are disclosed. The disclosed teachings include selective bypassing of the capacitive and resistive elements of the circuit during the transition of RF switches from one state to another. Several implementations of the disclosed methods and devices are also presented.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: December 19, 2023
    Assignee: pSemi Corporation
    Inventors: Joseph Porter Slaton, Parvez Daruwalla
  • Patent number: 11843357
    Abstract: Methods and devices for clamping an output of an amplifier stage of an amplifier are presented. According to one aspect, a clamp sense circuit senses a voltage at a node of an internal stage of the amplifier. The clamp sense circuit senses a region of operation of the clamp circuit and correspondingly controls a current limiter that is introduced in the amplifier to limit a current through the internal stage of the amplifier. Limiting the current in turn causes limiting a current path from a clamp circuit through the output of the amplifier stage. According to another aspect, the clamp sense circuit is a replica of the amplifier stage of the amplifier, the output of the amplifier stage coupled to the clamp circuit, and an output of the replica decoupled from the clamp circuit.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: December 12, 2023
    Assignee: pSemi Corporation
    Inventor: Christopher C. Murphy
  • Patent number: 11835978
    Abstract: Methods and devices to reduce or remove slumps in power supplies are disclosed. The disclosed teachings can serve various applications, such as applications implementing RF switches. Using such teachings, an integrated method can benefit from two different modes of operation where either an external or an internal charge pump can be used to provide a desired negative voltage to various components within the integrated circuit. This can be done by disposing a larger load capacitor outside the integrated circuit and without compromising any die space requirement.
    Type: Grant
    Filed: August 23, 2022
    Date of Patent: December 5, 2023
    Assignee: pSemi Corporation
    Inventors: Ravindranath D. Shrivastava, Payman Shanjani
  • Patent number: 11837954
    Abstract: An apparatus includes first and second pluralities of switches, a controller for controlling these switches, gate-drivers for driving switches from the first plurality of switches, and first and second terminals configured for coupling to corresponding first and second external circuits at corresponding first and second voltages. During operation, the controller causes the first plurality of switches to transition between states. These transitions result in the second voltage being maintained at a value that is a multiple of the first voltage. The controller also causes the second plurality of switches to transition between states. These transitions resulting in capacitors being coupled or decoupled from the second voltage. The gate drivers derive, from the capacitors, charge for causing a voltage that enables switches from the first plurality of switches to be driven.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: December 5, 2023
    Assignee: pSemi Corporation
    Inventors: David Giuliano, Gregory Szczeszynski, Raymond Barrett, Jr.
  • Patent number: 11837768
    Abstract: Methods and devices to address antenna termination in absence of power supplies within an electronic circuit including a termination circuit and a switching circuit. The devices include regular NMOS devices that decouple the antenna from the switching circuit in absence of power supplies while the antenna is coupled to a terminating impedance having a desired impedance value through a native NMOS device. The antenna is coupled with the switching circuit via the regular NMOS device during powered conditions while the antenna is decoupled from the terminating impedance.
    Type: Grant
    Filed: January 17, 2023
    Date of Patent: December 5, 2023
    Assignee: PSEMI CORPORATION
    Inventor: Sivakumar Ganesan
  • Patent number: 11831280
    Abstract: Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: November 28, 2023
    Assignee: PSEMI CORPORATION
    Inventors: Miles Sanner, Emre Ayranci, Parvez Daruwalla
  • Patent number: 11817830
    Abstract: Compact low noise amplifiers that have wide-band coverage while meeting necessary input matching and output matching characteristics. Embodiments include a wide-band, two-stage LNA with minimum degradation in performance compared to multiple narrow-band, single-stage LNAs. A generalized embodiment includes a first amplifier stage having a terminal coupled to a mutually coupled inductor circuit and to a second amplifier stage. The second amplifier stage includes a terminal coupled to the mutually coupled inductor circuit. The mutually coupled inductor circuit comprises electromagnetically coupled inductors L1, L2. Second terminals of the first and second amplifier stages are coupled to respective degeneration inductors. The electromagnetically coupled inductors L1, L2 of the inductor circuit substantially increase the output bandwidth of the LNA with minimum degradation in performance.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: November 14, 2023
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Khushali Shah
  • Patent number: 11817893
    Abstract: Radio frequency (RF) acoustic wave resonator (AWR) filter circuits and methods. Embodiments essentially de-couple the stopband or notch characteristics of an RF filter from the passband characteristics. Accordingly, the de-coupled parameters can be individually designed to meet the specifications of a particular application. Partially-hybridized or fully-hybridized series-arm and parallel-arm AWR filter building blocks enable “de-coupled” RF filters having (1) wideband and low insertion loss passbands and (2) wideband deep notches (stopbands) with a specifically placed notch center frequency, without compromising the passband characteristics. The AWR filter building blocks include an inductance L that matches (resonates with) the electrostatic capacitance CO of the corresponding AWR within a desired passband.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: November 14, 2023
    Assignee: pSemi Corporation
    Inventors: William Richard Smith, Jr., Muhammed Ibrahim Sezan, Dan William Nobbe
  • Patent number: 11817778
    Abstract: An apparatus for electric power conversion includes a converter having a regulating circuit and switching network. The regulating circuit has magnetic storage elements, and switches connected to the magnetic storage elements and controllable to switch between switching configurations. The regulating circuit maintains an average DC current through a magnetic storage element. The switching network includes charge storage elements connected to switches that are controllable to switch between plural switch configurations. In one configuration, the switches forms an arrangement of charge storage elements in which at least one charge storage element is charged using the magnetic storage element through the network input or output port. In another, the switches form an arrangement of charge storage elements in which an element discharges using the magnetic storage element through one of the input port and output port of the switching network.
    Type: Grant
    Filed: October 6, 2022
    Date of Patent: November 14, 2023
    Assignee: pSemi Corporation
    Inventor: David M. Giuliano
  • Patent number: 11811367
    Abstract: A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: November 7, 2023
    Assignee: pSemi Corporation
    Inventors: Dan William Nobbe, David Halchin, Jeffrey A. Dykstra, Michael P. Gaynor, David Kovac, Kelly Michael Mekechuk, Gary Frederick Kaatz, Chris Olson
  • Patent number: 11811304
    Abstract: Disclosed embodiments may include a power converter having a power conversion circuit and a protection circuit. The power conversion circuit is electrically coupled between a first terminal and a second terminal, to convert a first voltage from the first terminal to a second voltage outputted at the second terminal. The protection circuit is electrically coupled between an input terminal of the power converter and the first terminal. The protection circuit includes a first protection device and a clamping circuit. The first protection device withstands an input voltage of the power converter to continue an operation of the power conversion circuit when the input voltage exceeds a voltage threshold value. The clamping circuit is electrically coupled to a control terminal of the first protection device to clamp a control voltage of the first protection device.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: November 7, 2023
    Assignee: pSemi Corporation
    Inventors: Buddhika Abesingha, Gregory Szczeszynski
  • Publication number: 20230353047
    Abstract: In a power converter that includes a switched-capacitor circuit connected to a switched-inductor circuit, reconfiguration logic causes the switched-capacitor circuit to transition between first and second switched-capacitor configurations with different voltage-transformation ratios. A compensator compensates for a change in the power converter's forward-transfer function that would otherwise result from the transition between the two switched-capacitor configurations.
    Type: Application
    Filed: January 11, 2023
    Publication date: November 2, 2023
    Applicant: pSemi Corporation
    Inventor: Gregory SZCZESZYNSKI
  • Patent number: 11804734
    Abstract: Methods and devices addressing power tracking of transmission systems using antenna arrays are disclosed. The disclosed teachings may be implemented on a channel element to channel element basis, are adaptive and can be implemented on short time durations such as time slots. Power efficiency can be improved when applying the described methods to the design of systems with antenna arrays.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: October 31, 2023
    Assignee: pSemi Corporation
    Inventors: Donald Felt Kimball, Mark James O'Leary
  • Patent number: 11804816
    Abstract: A flexible multi-path RF adaptive tuning network switch architecture that counteracts impedance mismatch conditions arising from various combinations of coupled RF band filters, particularly in a Carrier Aggregation-based (CA) radio system. In one version, a digitally-controlled tunable matching network is coupled to a multi-path RF switch in order to provide adaptive impedance matching for various combinations of RF band filters. Optionally, some or all RF band filters include an associated digitally-controlled filter pre-match network to further improve impedance matching. In a second version, some or all RF band filters coupled to a multi-path RF switch include a digitally-controlled phase matching network to provide necessary per-band impedance matching. Optionally, a digitally-controlled tunable matching network may be included on the common port of the multi-path RF switch to provide additional impedance matching capability.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: October 31, 2023
    Assignee: pSemi Corporation
    Inventors: Emre Ayranci, Miles Sanner, Ke Li, James Francis McElwee, Tero Tapio Ranta, Kevin Roberts, Chih-Chieh Cheng
  • Patent number: 11789481
    Abstract: Methods and devices for speeding up the onset of a target current through an output leg of a current mirror are presented. Upon activation of the current mirror, a pre-charge current is sourced to a node of the current mirror that is common to the output leg and an input leg of the current mirror. Sourcing of the pre-charge current is based on sensing, by a first transistor, of a voltage at the common node. Pre-charging of the common node continues up to a cutoff voltage sensed at the common node. Sourcing of the pre-charge current is provided by a second transistor coupled to the common node. Based on the voltage sensed at the common node, the first transistor controls the sourcing of the pre-charge current by the second transistor. Such control is based on a portion of a current from a current source that flows through the first transistor.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: October 17, 2023
    Assignee: PSEMI CORPORATION
    Inventor: Jaroslaw Adamski
  • Patent number: 11791723
    Abstract: An apparatus for power conversion includes a transformation stage for transforming a first voltage into a second voltage. The transformation stage includes a switching network, a filter, and a controller. The filter is configured to connect the transformation stage to a regulator. The controller controls the switching network.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: October 17, 2023
    Assignee: pSemi Corporation
    Inventor: David Giuliano
  • Patent number: 11791707
    Abstract: In a power converter having a regulator and charge pump, both of which operate in plural modes, a controller receives information indicative of the power converter's operation and, based at least in part on said information, causes transitions between regulator modes and transitions between charge-pump modes.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: October 17, 2023
    Assignee: pSemi Corporation
    Inventors: Aichen Low, Gregory Szczeszynski, David M. Giuliano
  • Patent number: 11791340
    Abstract: Systems, methods, and apparatus for an improved body tie construction are described. The improved body tie construction is configured to have a lower resistance body tie exists when the transistor is “off” (Vg approximately 0 volts). When the transistor is “on” (Vg>Vt), the resistance to the body tie is much higher, reducing the loss of performance associated with presence of body tie. Space efficient Body tie constructions adapted for cascode configurations are also described.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: October 17, 2023
    Assignee: pSemi Corporation
    Inventor: Simon Edward Willard
  • Patent number: 11784561
    Abstract: An apparatus for power conversion includes a switching network that controls interconnections between pump capacitors in a capacitor network that has a terminal coupled to a current source, and a charge-management subsystem. In operation, the switching network causes the capacitor network to execute charge-pump operating cycles during each of which the capacitor network adopts different configurations in response to different configurations of the switching network. At the start of a first charge-pump operating cycle, each pump capacitor assumes a corresponding initial state. The charge-management subsystem restores each pump capacitor to the initial state by the start of a second charge-pump operating cycle that follows the first charge-pump operating cycle.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: October 10, 2023
    Assignee: pSemi Corporation
    Inventors: Aichen Low, Gregory Szczeszynski, David Guiliano