Abstract: A layer of thermally deformable plastic used, for example, in a holographic recording medium has an undulated surface whereby the layer has an uneven thickness. Because of the uneven thickness, the layer has a composite spatial frequency pass band greater than the spatial frequency pass band of a layer of uniform thickness.

Abstract: A sum channel waveguide is excited in a TE.sub.11 mode to cause a radio frequency wave to propagate therefrom through a cylindrical multimode waveguide. The wave propagates via a discontinuity that causes the multimode waveguide to be excited in the TE.sub.11 mode and higher order modes. The multimode waveguide is coupled to free space via a dielectric lens and a cup shaped matching section, whereby the wave causes a beam to be radiated from the lens. The cavity of the multimode waveguide is contiguous with a plurality of arcuate cavities of a difference channel waveguide. The beam is deflected in response to excitation of the arcuate cavities.

Abstract: A drain extension which is employed with complementary symmetry metal-oxide semiconductor (COS/MOS) devices which are constructed with a closed geometry gate structure. This drain extension of closed geometry gate structures includes lightly doped regions which surround contacts and heavily doped regions in the areas between concentric gates where there are no contacts.

Abstract: The device includes an alignment station at which an operator can align a wafer under a microscope. Once the wafer is properly aligned, a transfer chuck is brought into position above the wafer and aligned with alignment pins located in fixed positions at the alignment station. The wafer is then fixed to the transfer chuck and released from the alignment station. The transfer chuck is moved into proper alignment with alignment pins at a remote operation station, such as an automatic scribing station. The invention allows the operator to view the wafer with semiconductor devices facing the operator and provides for flipping the wafer over through the use of the transfer chuck so that the laser scriber can scribe the wafer on the side away from the semiconductor devices.

Abstract: A pyrogenic oxide is grown on a silicon wafer in a furnace by oxidizing hydrogen in the presence of an excess amount of oxygen as well as anhydrous hydrogen chloride to produce steam within the furnace. After growing a suitable pyrogenic oxide layer, the hydrogen and hydrogen chloride flows are turned off while the oxygen flow is continued to grow a dry oxide. A nitrogen anneal while the wafer is slowly pulled from the furnace completes the hybrid, radiation hard oxide layer.

Abstract: A semi-planar silicon-on-sapphire composite comprises a sapphire substrate, an epitaxial monocrystalline silicon mesa formed adjacent the substrate and an epitaxial deposition of monocrystalline aluminum oxide surrounding the mesa.

Abstract: The source and drain of an N-MOSFET can be brought closer together without substantially increasing capacitance and punch-through effects, by using a very high resistivity P-substrate, a moderately high resistivity P- type region in the channel zone and a thin but low resistivity surface-adjacent channel portion through which current flows. The P- type region and the surface-adjacent channel portion are ion-implantations. The P- type region extends deep enough into the substrate to shield the source from electrostatic coupling with the drain. Diffused, low reactance integrated circuit resistors can be made using the same principles.

Abstract: The method comprises forming a blind hole in a sapphire substrate using a sulfur hexafluoride gas etchant and an etch mask comprising a single layer of silicon nitride. The blind holes are filled with epitaxially grown silicon and field effect transistors are laid out with their gates orthogonal to a line which is at a 45.degree. angle to a standard wafer flat, i.e. orthogonal to the projection of the "c" axis onto the "r" plane of the sapphire wafer.

Abstract: The integrated circuit is manufactured upside down relative to conventional silicon-on-sapphire (SOS) processing techniques for manufacturing field effect transistors. First a conductive pattern, typically of a refractory metal, is deposited and defined on an insulating substrate, such as sapphire, and then silicon transistors are formed over the conductive pattern. Using the process, a masking step, namely the contact definition mask, used in conventional SOS manufacture, is eliminated.

Abstract: An insulated gate field effect transistor having spaced highly doped source and drain regions with less highly doped source and drain extensions, which define the ends of the channel of the transistor, has both the source and drain extensions and the channel of the transistor defined in a controllable manner by the steps of forming a continuous zone of the same conductivity type as the source and drain regions in the space between these two regions and then counterdoping a portion of this layer.

Abstract: A protection device for integrated circuits used on television sets is described which protects the devices against damage of the type caused by kinescope arcing.The protection device described comprises a diode having a first region of the same conductivity type as the emitter region of the protected bipolar transistor and a second region of opposite conductivity type to the first region which second region contacts only the collector of the protected transistor. An electrode contacts the first region of the diode over a much larger area than the area the same electrode makes contact to the emitter of the protected bipolar transistor in order to allow large transient currents to go to ground through the diode rather than through the transistor thereby protecting the transistor from destruction due to transient discharges.

Abstract: Removal of selected, isolated defects comprised of excess chromium (Cr) or chromium oxide (Cr.sub.2 O.sub.3) from photomasks comprises contacting at least the defect area by a suitable acid and initiating the etch of the defect area by contacting the defect area with a metal probe made from a suitable material. Excess chromium or chromium oxide areas may be isolated by using a laser to separate the areas from areas which are to remain.

Abstract: A one-piece molded plastic element serves as the sole outer case of an electronic watch. The battery is threaded and screws into one opening in the case. Time setting is accomplished by inserting the ends of a U shaped conductor in other openings in the case. The case is formed with means by which a wrist band may be secured thereto.

Abstract: The method is used to determine whether holes etched into a dielectric layer which has been formed on a surface of a semiconductor wafer are open. A plurality of specimen holes are formed in a selected portion of the wafer simultaneously with the formation of the holes to be tested. The specimen holes are then contacted with an electrolytic probe, and the wafer is contacted with an output probe. The resistance, through the wafer, between the electrolytic probe and the output probe is determined. Since the resistance is related to the amount of dielectric material remaining in the hole, a non-destructive determination may be made as to whether the device should be subjected to additional etching.

Abstract: A light absorbing medium is interposed between a photosensitive layer, such as a photoresist layer, and the surface upon which the photosensitive layer is to be applied in order to eliminate surface effects which result from the reflection of light which passes through the photosensitive layer and is then reflected upward from the surface back into the photosensitive layer. The light absorbing medium may be either a quarter-wave plate or a filter chosen to absorb light of the energy spectrum to which the photosensitive layer is sensitive.

Abstract: The circuit protects the oxide of MOS devices from destructive breakdown by limiting the potential difference which can exist between two circuit nodes. By forming a protective circuit between each pair of nodes in the circuit, the range of voltages which can exist between any two nodes is predetermined, and the range can be fixed to prevent damage to the MOS devices. The protective circuit comprises a pair of diodes, a resistor, and a bipolar transistor.

Abstract: A method of making an improved aluminum oxide (sapphire) gate field effect transistor wherein the capacitance-voltage characteristic of the transistor is improved by annealing the aluminum oxide at a temperature less than the growth temperature of the aluminum oxide. A transistor annealed at a temperature less than the growth temperature is provided wherein the threshold voltage is the same as if the transistor were annealed at a temperature greater than the growth temperature; the capacitance-voltage characteristic of the transistor exhibiting markedly diminished hysteresis by annealing at a temperature less than the growth temperature.

Abstract: A highly sensitive light detector is described which employs two interdigitated PN junction light detectors, one of which is covered by an opaque material. The one covered by opaque material is used as a standard for eliminating dark current efffects.

Abstract: A semiconductor device has a body of a semiconductor material wherein arsenic, As, is a constituent component of the material. A passivation layer of a material selected from the group consisting of arsenic sulfide, As.sub.2 S.sub.3, arsenic selenide, As.sub.2 Se.sub.3, and arsenic telluride, As.sub.2 Te.sub.3, is on surfaces of the body.

Abstract: A composition of matter produced by a process wherein silicon is bombarded by phosphorus ions and phosphorus ions are implanted therein. A method for rendering silicon substantially unetchable in a potassium hydroxide etchant by implanting phosphorus in the silicon by brombardment with phosphorus ions.