Abstract: A substrate processing method includes placing a substrate on a spin chuck and rotating the spin chuck around a central axis extending in a first direction; and applying a processing liquid onto the substrate through a nozzle. The nozzle includes a pipe extending in the first direction and through which the processing liquid moves, and a housing surrounding the pipe, and the pipe includes one or more first lower pipe sections, each of whose width in a second direction intersecting the first direction increases and then decreases in a direction toward the substrate.

Abstract: An electronic device includes: a camera sensor, disposed on a body, and configured to generate an image including image data by sequentially scanning scan lines; and memory storing instructions configured to cause a processor to: obtain a default mesh with vertices corresponding to positions of image pixels along a scan line of the camera sensor and back-projected onto a target plane, obtain a planar mesh from the default mesh according to motion of the body, and generate a scene view image from the image data based on the obtained planar mesh.

Abstract: A semiconductor package includes a lower chip including a first lower bonding pad and a second lower bonding pad, and an upper chip disposed on the lower chip, the upper chip including a first upper bonding pad and a second upper bonding pad respectively hybrid-bonded together. The first lower and upper bonding pads have a first shape in which first and second axis lengths are the same, and are disposed in a first center region of the chips. The second lower and upper bonding pads have a second shape in which third and fourth axis lengths differ, and are disposed in a first edge region which is near a corner point of the chip. In the second lower and upper bonding pads disposed in the first edge region, the third axis length is arranged in a direction perpendicular to a radial direction from the center point.

Abstract: Class-D amplification circuitry includes an operational amplifier configured to receive a differential input signal via summing nodes, and output a first signal, a loop filter configured to low-pass filter the first signal, a pulse width modulator configured to perform pulse width modulation on the filtered signal, a gate driver stage configured to generate a gate signal based on the modulated signal, an output stage configured to generate a differential output signal based on the gate signal, and a common mode canceller connected between an input node of the output stage and the summing nodes, the common mode canceller configured to generate an inverted pseudo output signal based on the differential output signal, and provide the inverted pseudo output signal the summing nodes, the inverted pseudo output signal cancelling a common mode noise when applied to a feedback signal provided to the summing nodes.

Abstract: Provided is a semiconductor package including a preformed support structure. The semiconductor package includes a substrate, the preformed support structure provided on the substrate, the preformed support structure including a first chip encapsulated with a first molding material, a plurality of second chips, at least one of the second chips being provided on the preformed support structure, and a third chip provided on the second chips, wherein the first chip has a first size, each of the second chips has a second size, the third chip has a third size, and the first size is smaller than the second size and the third size, and wherein a top surface of the at least one of the second chips is at the same height level as top surfaces of other ones of the second chips.

Abstract: A single crystal semiconductor structure includes: an amorphous substrate; a single crystal semiconductor layer provided on the amorphous substrate; and a thin orienting film provided between the amorphous substrate and the single crystal semiconductor layer, wherein the thin orienting film is a single crystal thin film, and the thin orienting film has a non-zero thickness that is equal to or less than 10 times a critical thickness hc.

Abstract: A semiconductor device may include an upper interlayer insulating film on a lower wiring structure and an upper wiring structure in an upper wiring trench of the upper interlayer insulating film. The lower wiring structure may include a lower filling film and a lower capping film including a capping opening exposing a portion of the lower filling film. The upper wiring structure may contact the lower filling film. The upper wiring structure may include an upper liner between an upper barrier film and an upper filling film. A sidewall portion of the upper liner may include cobalt doped with ruthenium. A bottom portion of the upper liner may not include cobalt doped with ruthenium. A sidewall portion of the upper barrier film may include tantalum nitride doped with ruthenium (Ru). A sidewall portion of the upper barrier film may not be in contact with the lower capping film.

Abstract: An image sensor includes a substrate including a plurality of photoelectric conversion devices, a color filter arranged on the substrate, a reflective absorption layer on the color filter and comprising at least one of tungsten, titanium, and aluminum, an anti-reflective layer arranged on the reflective absorption layer, and a plurality of micro lenses on the anti-reflective layer. The color filter may include a plurality of dielectric layers extending in a first direction that is parallel to a rear surface of the substrate, the plurality of dielectric layers having different thicknesses in a second direction that is perpendicular to the rear surface of the substrate and perpendicular to the first direction, such that the plurality of dielectric layers includes at least one dielectric layer having a thickness in the second direction that varies along the first direction.

Abstract: Provided is a device including a substrate and an overlay target structure provided on the substrate, the overlay target structure includes a first alignment key having a plurality of line masks having a first width and arranged at a first pitch, a second alignment key having a plurality of line masks having a second width and arranged at a second pitch, and a nanostructure layer arranged between the first alignment key and the second alignment key, and including a plurality of nanostructures having widths less than or equal to the first width and the second width, and arranged at a pitch less than the first pitch and the second pitch.

Abstract: A semiconductor device includes a substrate including a first region, and a second region, a first gate structure and a second gate structure on the substrate of the first region, a third gate structure and a fourth gate structure on the substrate of the second region, a first interlayer insulating film on the substrate of the first region and including a first lower interlayer insulating film and a first upper interlayer insulating film, a second interlayer insulating film on the substrate of the second region and including a second lower interlayer insulating film and a second upper interlayer insulating film, a first contact between the first gate structure and the second gate structure and within the first interlayer insulating film, and a second contact formed between the third gate structure and the fourth gate structure and within the second interlayer insulating film.

Abstract: A computer-implemented method of configuring an electronic device for inpainting source three-dimensional (3D) scenes, includes: receiving the source 3D scenes and a user's input about a first object of the source 3D scenes; generating accurate object masks about the first object of the source 3D scenes; and generating inpainted 3D scenes of the source 3D scenes by using an inpainting neural radiance field (NeRF) based on the accurate object masks.

Abstract: A wireless communication apparatus for supporting communication with multiple transmission and reception points (TRPs) includes a radio frequency integrated circuit (RFIC) configured to receive a first reference signal from a first TRP and a second reference signal from a second TRP, and processing circuitry configured to estimate channels of a plurality of subcarriers based on at least one of the first reference signal or the second reference signal, determine a beamforming parameter based on the estimated channels, the beamforming parameter being determined based on a capacity of an effective channel between the wireless communication apparatus and both the first TRP and the second TRP, and adjust a reception beam based on the beamforming parameter, and the RFIC being configured to receive a first physical downlink shared channel (PDSCH) from the first TRP through the adjusted reception beam, and receive a second PDSCH from the second TRP.

Abstract: A method performed by an E2 node, includes: transmitting an E2 setup request message to a radio access network (RAN) intelligent controller (RIC); and receiving an E2 setup response message from the RIC, wherein the E2 setup request message includes a first global identifier of the E2 node, wherein the first global identifier of the E2 node includes a second global identifier of a next generation NodeB (gNB), and wherein the first global identifier of the E2 node includes first identification information of a gNB-central unit (CU)-control plane (CP) or second identification information of a gNB-CU.

Abstract: An operating method of a first multi-link device (MLD), including: transmitting, by the first MLD, first data to a second MLD using a first link, wherein the first MLD is configured to communicate with the second MLD using the first link and a second link; and receiving, by the first MLD, a first acknowledgement (ACK) with respect to the first data through the second link and not through the first link.

Abstract: A display apparatus of a modular display apparatus including a plurality of display apparatuses includes a communication interface, and a plurality of driver integrated circuits (ICs), where a first driver IC among the plurality of driver ICs is configured to, based on receiving a first signal transmitted by an external device through the communication interface, transmit the first signal to a second driver IC adjacent to the first driver IC such that the first signal is sequentially transmitted to remaining driver ICs among the plurality of driver ICs that are connected in a daisy chain manner, and each of the first driver IC and the second driver IC is configured to transmit a second signal, that is transmitted by the external device, to a first other display apparatus among the plurality of display apparatuses that is connected to the display apparatus.

Abstract: An electronic device includes: a glass substrate including a first surface and a second surface opposite to the first surface; a semiconductor element provided on the first surface of the glass substrate; a first pattern provided on the first surface of the glass substrate, the first pattern being electrically connected to a first end of the semiconductor element; a second pattern provided on the first surface of the glass substrate, the second pattern being electrically connected to a second end of the semiconductor element; a feeding line provided on the second surface of the glass substrate; and a via hole which passes through the glass substrate in a first direction, the via hole electrically connecting the feeding line to the second pattern.

Abstract: A display driving circuit is provided. The display driving circuit includes a timing controller configured to output image data and a source control signal, a first source driver circuit configured to output first source data of the image data by activating a plurality of first data lines in accordance with the source control signal, the first data lines having a first output spreading time, a second source driver circuit configured to output second source data of the image data by activating a plurality of second data lines in accordance with the source control signal, the second data lines having a second output spreading time, and a third source driver circuit configured to output third source data of the image data by activating a plurality of third data lines in accordance with the source control signal, the third data lines having a third output spreading time, wherein the first output spreading time, the second output spreading time and the third output spreading time do not overlap.

Abstract: Provided are a method and apparatus for encoding or decoding a coding unit on an outline of a picture. An image decoding method and apparatus according to an embodiment determine whether a current coding unit extends across an outline of a picture, by comparing a location of the current coding unit in the picture to at least one of a width and a height of the picture, split the current coding unit in at least one direction into a plurality of coding units based on a shape of the current coding unit upon determining that the current coding unit extends across the outline of the picture, obtain block shape information and split type information of the current coding unit from a bitstream and split the current coding unit into a plurality of coding units based on the block shape information and the split type information upon determining that the current coding unit does not extend across the outline of the picture, and decode a coding unit that is no longer split among the plurality of coding units.

Abstract: A viewing angle expansion plate, which is a multi-pinhole mask, includes a plurality of cell areas; and a plurality of pinholes formed in the plurality of cell areas, wherein each cell area from among the plurality of cell areas corresponds to a respective pixel from among a plurality of pixels in a flat panel display. The flat panel display includes a light source configured to emit parallel light; a flat panel, on which the parallel light is incident, configured to provide a three-dimensional image; and the viewing angle expansion plate.

Abstract: The electronic device includes an infrared light emitter disposed on the printed circuit board, the infrared light emitter corresponding to a first light-transmitting area of the plurality of light-transmitting areas, and being configured to emit infrared light through the first light-transmitting area; and an infrared receiver corresponding to a second light-transmitting area of the plurality of light-transmitting areas. The infrared light emitter includes: a substrate including a third surface facing a third direction and a fourth surface facing a fourth direction opposite to the third direction; at least one electronic component including a light source disposed on the fourth surface of the substrate; a module housing surrounding the at least one electronic component of the substrate; and a shielding member disposed in the module housing, the shielding member being configured to shield electromagnetic waves.