Patents Assigned to Semiconductor Process Laboratory Co., Ltd.
  • Patent number: 6524972
    Abstract: A method for forming an interlayer insulating film is disclosed. This method comprises the steps of: forming an underlying insulating film on an object to be formed; and forming a porous SiO2 film on said underlying insulating film by a Chemical Vapor Deposition that employs a source gas containing TEOS (tetraethoxy silane) and O3 where the O3 is contained in the source gas with first concentration that is lower than concentration necessary for oxidizing the TEOS. Alternative method for forming an interlayer insulating film is also disclosed. This method comprises the step of: forming an underlying insulating film on an object to be formed; performing Cl (chlorine) plasma treatment for the underlying insulating film; and forming a porous SiO2 film on the underlying insulating film by a Chemical Vapor Deposition that employs a source gas containing TEOS (tetraethoxy silane) and O3.
    Type: Grant
    Filed: March 9, 2000
    Date of Patent: February 25, 2003
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventor: Kazuo Maeda
  • Patent number: 6514884
    Abstract: The present invention relates to a method for reforming a surface of a base layer before thin film deposition, wherein a base thermal SiO2 film is exposed to a gas selected from the group consisting of AX4, AHnCl4−n and ARnX4−n, wherein A represents Si, Ge or Sn, X represents I, Br, F or Cl and R represents CmH2m+1, wherein “n” is 1, 2 or 3 and “m” is a natural number.
    Type: Grant
    Filed: May 13, 1998
    Date of Patent: February 4, 2003
    Assignee: Semiconductor Process Laboratory Co., Ltd.
    Inventor: Kazuo Maeda
  • Patent number: 6514855
    Abstract: The present invention relates to a semiconductor device manufacturing method for forming a via hole or a contact hole in an interlayer insulating film with a low dielectric constant. The method includes the steps of forming a nitrogen containing insulating film on a substrate, forming a porous insulating film on the nitrogen-containing insulating film, forming an opening in the underlying insulating film and the porous insulating film, and forming a nitrogen containing insulating film on the surface of the porous insulating film and on the surface of the opening by bringing these surfaces into contact with a plasma of any one of an ammonia gas, a nitrogen gas, and an oxygen nitride gas.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: February 4, 2003
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Tomomi Suzuki, Hiroshi Ikakura, Kazuo Maeda, Yoshimi Shioya, Koichi Ohira
  • Patent number: 6500752
    Abstract: The present invention relates to a semiconductor device manufacturing method of forming an inter-wiring layer insulating film having a low dielectric constant to cover a copper wiring. In construction, in a semiconductor device manufacturing method of forming an insulating film 34 having a low dielectric constant on a substrate 20, the insulating film 34 is formed by plasmanizing a film forming gas, that consists of at least any one of alkyl compound having siloxane bonds and methylsilane (SiHn(CH3)4−n: n=0, 1, 2, 3), any one oxygen-containing gas selected from a group consisting of N2O, H2O, and CO2, and ammonia (NH3) to react.
    Type: Grant
    Filed: July 16, 2001
    Date of Patent: December 31, 2002
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Taizo Oku, Junichi Aoki, Youichi Yamamoto, Takashi Koromokawa, Kazuo Maeda
  • Patent number: 6479408
    Abstract: The present invention relates to a semiconductor device manufacturing method for forming an interlayer insulating film having a low dielectric constant by coating a copper wiring. The semiconductor device manufacturing method comprises the steps of preparing a substrate 21 from a surface of which copper wirings 23 are exposed, and forming an interlayer insulating film having a low dielectric constant on the substrate 21, wherein the interlayer insulating film is formed of a multi-layered insulating film including a insulating film 24 that contacts with the copper wirings 23, and the insulating film 24 is formed by plasmanizing a film forming gas containing an alkyl compound having an Si—O—Si bond and one oxygen-containing gas selected from the group consisting of N2O, H2O, and CO2, whose flow rate is equal to or less than a flow rate of the siloxane, to react mutually.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: November 12, 2002
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Yoshimi Shioya, Kouichi Ohira, Kazuo Maeda
  • Patent number: 6479409
    Abstract: Disclosed is a method of fabricating a semiconductor device, in which an interlayer insulating film having a low dielectric constant is formed by coating a wiring, and either a via hole or a contact hole is formed in the interlayer insulating film. The method of fabricating a semiconductor device having the interlayer insulating film 25 formed on the film-formed substrate 21 with the exposed wiring 23, comprises the step of converting a silicon compound containing only the Si, O, C and H into a plasma gas as a film-forming gas to react the plasma gas, thus forming the block insulating film 24 containing silicon (Si), oxygen (O), carbon (C) and hydrogen (H) between the wiring 23 and the interlayer insulating film 25.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: November 12, 2002
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Yoshimi Shioya, Kouichi Ohira, Kazuo Maeda, Tomomi Suzuki, Hiroshi Ikakura, Youichi Yamamoto, Yuichiro Kotake, Shoji Ohgawara, Makoto Kurotobi
  • Patent number: 6472334
    Abstract: There is provided a method of forming a silicon-containing insulating film on a substrate by reacting a compound having siloxane bonds and Si—R bonds (R is alkyl group) with a plasmanized reaction gas containing an oxidizing gas and H2.
    Type: Grant
    Filed: April 3, 2001
    Date of Patent: October 29, 2002
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Hiroshi Ikakura, Tomomi Suzuki, Kazuo Maeda, Yoshimi Shioya, Kouichi Ohira
  • Patent number: 6472330
    Abstract: A method for forming an interlayer insulating film includes the steps of: forming a metal film on a substrate; forming a first insulating film on the metal film; patterning the first insulating film by selectively etching the first insulating film; patterning the metal film by etching the metal film using the patterned first insulating film as a mask; forming an overhang portion of the first insulating film on the metal film by selectively etching a side portion of the metal film; and forming a second insulating film on the entire structure.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: October 29, 2002
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Toshio Kato, Noboru Tokumasu, Makoto Kurotobi, Taizo Oku
  • Patent number: 6435196
    Abstract: The present invention relates to an impurity processing apparatus in which impurities such as phosphorus, boron, or the like are doped in a semiconductor substrate, etc., or a PSG (PhosphoSilicateGlass) film, a BSG (BoroSilicateGlass) film, or a BPSG (BoroPhosphoSilicateGlass) film, or a carbon film, etc. This apparatus includes a chamber having an introduction port for an impurity-containing ion gas which is connected to an impurity-containing gas supply section, a substrate holder supporting a substrate which is to be ion-injected, or doped, or on which a film is formed using the impurity-containing gas, an introduction port of a water-containing gas which is provided upstream of the substrate holder in accordance with a flow direction of the impurity-containing gas, and is connected to a water-containing gas supply section, and first plasma generating means in a space extending from the introduction port for water-containing gas to the substrate holder for converting water-containing gas to a plasma.
    Type: Grant
    Filed: December 1, 1999
    Date of Patent: August 20, 2002
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Noritada Satoh, Kouichi Ohira, Bunya Matsui, Kazuo Maeda
  • Patent number: 6432839
    Abstract: The invention is a method for forming a flattened interlayer insulating film covering a wiring layer or the like of a semiconductor IC device, and a method of manufacturing a semiconductor device. The film-forming method includes the steps of preparing a deposition gas containing an inert gas, and a silicon and phosphorus-containing compound having III valance phosphorus in which at least one oxygen is bonded to the phosphorous, and forming a silicon containing insulating film containing P2O3 on a substrate by using the deposition gas.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: August 13, 2002
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Kazuo Maeda, Noboru Tokumasu, Yuki Ishii, Toshiro Nishiyama
  • Patent number: 6420276
    Abstract: The present invention relates to a semiconductor device manufacturing method for forming an interlayer insulating film containing a coating insulating film having a low dielectric constant. In construction, there are provided the steps of preparing a substrate 20 on a surface of which a coating insulating film 26 is formed by coating a coating liquid containing any one selected from a group consisting of silicon-containing inorganic compound and silicon-containing organic compound, and forming a protection layer 27 for covering the coating insulating film 26 by plasmanizing a first film forming gas to react, wherein the first film forming gas consists of any one selected from a group consisting of alkoxy compound having Si—H bonds and siloxane having Si—H bonds and any one oxygen-containing gas selected from a group consisting of O2, N2O, NO2, CO, CO2, and H2O.
    Type: Grant
    Filed: July 16, 2001
    Date of Patent: July 16, 2002
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Taizo Oku, Junichi Aoki, Youichi Yamamoto, Takashi Koromokawa, Kazuo Maeda
  • Patent number: 6413879
    Abstract: A method for forming an interlayer insulating film is disclosed. This method comprises the steps of: forming an Si—C film or an Si—C—H film on an underlying insulating film by performing plasma polymerization for an Si and C containing compound; forming a porous SiO2 film by performing O (oxygen) plasma oxidation for the Si—C film or the Si—C—H film; and forming a cover insulating film on the porous SiO2 film by performing H (hydrogen) plasma treatment for the porous SiO2 film.
    Type: Grant
    Filed: February 10, 2000
    Date of Patent: July 2, 2002
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventor: Kazuo Maeda
  • Patent number: 6403410
    Abstract: The present invention relates to a plasma doping system capable of handling larger-diameter wafers and of introducing impurities to a shallow depth with a lower energy level. The plasma doping system includes a plasma generation chamber provided with a high-frequency power source and with antennas for generating a helicon plasma of a gas containing conduction type impurities. An impurity introduction chamber is provided with a substrate holding fixture. A plasma flow passage/shaping chamber provides a flow passage through which the helicon plasma flows from the plasma generation chamber to the impurity introduction chamber and has a magnetic field generator for generating a magnetic field to constrict the helicon plasma flowing therethrough.
    Type: Grant
    Filed: November 1, 1999
    Date of Patent: June 11, 2002
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Kouichi Ohira, Bunya Matsui, Kazuo Maeda
  • Patent number: 6372650
    Abstract: A method of cleaning a substrate is provided which can remove contamination after treatment of a substrate surface by use of chemicals etc. prior to film formation. The method of cleaning the substrate surface uses of a vapor of chlorosulfonic acid (SO2Cl(OH)).
    Type: Grant
    Filed: December 28, 1998
    Date of Patent: April 16, 2002
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Toshio Kato, Noboru Tokumasu
  • Patent number: 6372670
    Abstract: Disclosed is a method for forming an interlayer insulating film which comprises the steps of forming an underlying insulating film on a substrate; forming a porous SiO2 film on the underlying insulating film by chemical vapor deposition method using Si2H6 and an oxidative gas as a reaction gas; subjecting the porous SiO2 film to H (hydrogen) plasma treatment; forming a plasma SiO2 film and a fluidic SiO2 film formed by TEOS+O3 on the porous SiO2 film; then smoothing a surface of the SiO2 film by etching; and forming a cover insulating film on the smoothed surface.
    Type: Grant
    Filed: January 4, 2000
    Date of Patent: April 16, 2002
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventor: Kazuo Maeda
  • Publication number: 20020028584
    Abstract: The present invention relates to a film forming method of forming an interlayer insulating film having a low dielectric constant to cover a wiring. In construction, an insulating film for covering a wiring is formed on the substrate by plasmanizing a film forming gas, that consists of any one selected from a group consisting of alkoxy compound having Si—H bonds and siloxane having Si—H bonds and any one oxygen-containing gas selected from a group consisting of O2, N2O, NO2, CO, CO2, and H2O, to react.
    Type: Application
    Filed: July 13, 2001
    Publication date: March 7, 2002
    Applicant: CANON SALES CO., INC., SEMICONDUCTOR PROCESS LABORATORY CO., LTD.
    Inventors: Taizo Oku, Junichi Aoki, Youichi Yamamoto, Takashi Koromokawa, Kazuo Maeda
  • Patent number: 6352943
    Abstract: This invention relates to a method of film formation in which, when a silicon oxide film (a NSG film: a Non-doped Silicate Glass) is formed on a substrate having a recess by a CVD method using a mixed gas containing TEOS and ozone, surface dependency on the substrate is eliminated to embed a silicon oxide film into the recess of the surface. The invention includes forming a phosphorus containing insulating film as a base layer on the surface of a substrate and forming a silicon-containing insulating film on the phosphosilicate glass film by the chemical vapor deposition method, using a mixture of a ozone-containing gas and a silicon-containing gas.
    Type: Grant
    Filed: September 22, 1998
    Date of Patent: March 5, 2002
    Assignee: Semiconductor Process Laboratory Co., Ltd.
    Inventors: Kazuo Maeda, Yuhko Nishimoto
  • Publication number: 20020013060
    Abstract: In a semiconductor device manufacturing method for forming an interlayer insulating film having a low dielectric constant on a substrate 21 from a surface of which a copper wiring 23 is exposed, the interlayer insulating film consists of multi-layered insulating films 24, 25, 29 and the insulating film 24, that contacts to the copper wiring 23, out of the multi-layered insulating films 24, 25, 29 is formed by plasmanizing a film forming gas containing at least an alkyl compound having siloxane bonds and any one of nitrogen (N2) and ammonia (NH3) to react.
    Type: Application
    Filed: July 3, 2001
    Publication date: January 31, 2002
    Applicant: CANON SALES CO., INC. and SEMICONDUCTOR PROCESS LABORATORY CO., LTD.
    Inventors: Yoshimi Shioya, Kouichi Ohira, Kazuo Maeda, Tomomi Suzuki, Hiroshi Ikakura, Youichi Yamamoto
  • Publication number: 20010051445
    Abstract: The present invention relates to a semiconductor device manufacturing method for forming an interlayer insulating film having a low dielectric constant by coating a copper wiring. The semiconductor device manufacturing method comprises the steps of preparing a substrate 21 from a surface of which copper wirings 23 are exposed, and forming an interlayer insulating film having a low dielectric constant on the substrate 21, wherein the interlayer insulating film is formed of a multi-layered insulating film including a insulating film 24 that contacts with the copper wirings 23, and the insulating film 24 is formed by plasmanizing a film forming gas containing an alkyl compound having an Si—O—Si bond and one oxygen-containing gas selected from the group consisting of N2O, H2O, and CO2, whose flow rate is equal to or less than a flow rate of the siloxane, to react mutually.
    Type: Application
    Filed: April 30, 2001
    Publication date: December 13, 2001
    Applicant: CANON SALES CO., INC.and SEMICONDUCTOR PROCESS LABORATORY CO., LTD.
    Inventors: Yoshimi Shioya, Kouichi Ohira, Kazauo Maeda
  • Publication number: 20010029109
    Abstract: There is provided a film-forming surface reforming method that comprises the steps of bringing a gas or an aqueous solution containing ammonia, hydrazine, amine, amino compound or their derivative into contact with a film-forming surface before an insulating film is formed on the film-forming surface of a substrate, and
    Type: Application
    Filed: March 15, 2001
    Publication date: October 11, 2001
    Applicant: CANON SALES CO., and SEMICONDUCTOR PROCESS LABORATORY CO., LTD.
    Inventors: Kazuo Maeda, Setsu Suzuki, Takayoshi Azumi, Kiyotaka Sasaki