Patents Assigned to Semiconductor Process Laboratory Co., Ltd.
  • Patent number: 5387546
    Abstract: The present invention relates to a method for manufacturing a semiconductor device including a method for reforming an insulating film formed by a low temperature CVD method. It is an object of the present Invention to provide a method for manufacturing a semiconductor device capable of improving a film quality of an insulating film formed by a CVD method which is able to form a film at a low temperature and also capable of maintaining mass productivity, in which processing by irradiation with ultraviolet rays of the insulating film while heating the film after forming an insulating film (4) on a body to be formed by a chemical vapor deposition method is included.
    Type: Grant
    Filed: June 22, 1992
    Date of Patent: February 7, 1995
    Assignees: Canon Sales Co., Inc., Alcan-Tech Co., Ltd., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Kazuo Maeda, Noboru Tokumasu, Yuko Nishimoto
  • Patent number: 5376591
    Abstract: A, method for forming semiconductor device, includes forming an insulating film on a body by chemical vapor deposition, at low temperature raising the temperature of, the body, and exposing the body to plasma gas.
    Type: Grant
    Filed: June 8, 1992
    Date of Patent: December 27, 1994
    Assignee: Semiconductor Process Laboratory Co., Ltd.
    Inventors: Kazuo Maeda, Noboru Tokumasu, Yuko Nishimoto
  • Patent number: 5302209
    Abstract: A continuous type automated apparatus for manufacturing a semiconductor device by forming a film on a wafer by a CVD method. The apparatus moves the wafer while maintaining the wafer at a predetermined temperature, and controls production of individual wafers and formation of multi-layer films of different types. The apparatus includes a wafer holder, a rotary shaft for supporting the wafer holder so that wafer loading surfaces of the wafer holder rotate in a circle within a single plane. A gas dispersion unit is provided separate from the wafer holder and facing the wafer loading surface of the wafer holder. A first pair of contacts are electrically connected to a heater and are mounted on the rotary shaft and a second pair of contacts are connected to a power source are in sliding contact with the first pair of contacts so that the rotation of the rotary shaft is not obstructed. This apparatus is useful as a continuous type automated CVD apparatus.
    Type: Grant
    Filed: October 27, 1992
    Date of Patent: April 12, 1994
    Assignees: Semiconductor Process Laboratory Co., Ltd., Canon Sales Co., Inc., Alcan-Tech Co., Inc.
    Inventors: Kazuo Maeda, Kouichi Ohira, Mitsuo Hirose
  • Patent number: 5281295
    Abstract: A semiconductor fabrication apparatus includes a plurality of processing stations for film formation or etching, concurrently or continuously. The semiconductor fabrication apparatus is capable of supplying a process gas for film formation or etching from a single gas header to each processing station and provides uniform wafer processing at each processing station. The apparatus includes a process gas supply source; a plurality of branch pipes branched from the common header which, in turn, is connected to a process gas supply source; a plurality of outlet pipes connecting the branch pipes with the processing stations through first flow rate controllers; exhaust pipes also connected to the branch pipes; plural switching valves for switching the flow of process gas between the outlet pipes and the exhaust pipes; and plural second flow rate controllers in the exhaust pipes.
    Type: Grant
    Filed: October 20, 1992
    Date of Patent: January 25, 1994
    Assignees: Semiconductor Process Laboratory Co., Ltd., Canon Sales Co., Inc., Alcan-Tech, Co. Inc.
    Inventors: Kazuo Maeda, Kouichi Ohira, Mitsuo Hirose
  • Patent number: 5231058
    Abstract: In a process for forming a CVD film, a polysiloxane compound having at least two silicon-oxygen bonds is reacted with ozone to form an SiO.sub.2 film. If desired, the reaction may be effected in the presence of a gas containing an impurity mixed with the polysiloxane compound and ozone to form a PSG, BSG or BPSG film. In a semiconductor device, the SiO.sub.2 film, or the PSG, BSG or BPSG film is used as a planarizing film, an interlayer insulating film, or a cover insulating film.
    Type: Grant
    Filed: December 14, 1990
    Date of Patent: July 27, 1993
    Assignee: Semiconductor Process Laboratory Co. Ltd.
    Inventors: Kazuo Maeda, Noboru Tokumasu, Yuko Nishimoto
  • Patent number: 5051380
    Abstract: In a process for producing a semiconductor device, deposition of a CVD-SiO.sub.2 film at a given first O.sub.3 concentration according to a TEOS-SiO.sub.3 reaction is followed by further deposition of a CVD-SiO.sub.2 film at a second O.sub.3 concentration higher than the first O.sub.3 concentration according to the TEOS-O.sub.3 reaction to form a CVD-SiO.sub.2 film having a predetermined thickness and a surface little uneven.
    Type: Grant
    Filed: December 14, 1990
    Date of Patent: September 24, 1991
    Assignees: Semiconductor Process Laboratory Co., Ltd., Alcan-Tech Co., Inc.
    Inventors: Kazuo Maeda, Noboru Tokumasu, Yuko Nishimoto