Patents Assigned to Shinko Electric Industries Co., LTD
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Patent number: 11776903Abstract: A semiconductor apparatus includes an interconnect substrate having a first major surface, a first semiconductor device having a second major surface and mounted to the interconnect substrate, the second major surface opposing the first major surface, a second semiconductor device having a third major surface and a fourth major surface and mounted to the first semiconductor device, the third major surface opposing the first major surface, the fourth major surface opposing the second major surface, a through hole formed through the interconnect substrate at a position overlapping the second semiconductor device in a plan view taken in a thickness direction of the interconnect substrate, and a heatsink member disposed in contact with part of the third major surface, at least a part of the first major surface, and at least a part of a sidewall surface of the through hole.Type: GrantFiled: August 17, 2021Date of Patent: October 3, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Kazuhiro Yoshida
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Patent number: 11774182Abstract: A loop heat pipe includes a pair of outermost metal layers, an intermediate metal layer provided between the pair of outermost metal layers, an evaporator, a condenser, a liquid pipe and a vapor pipe connecting the evaporator and the condenser and forming a loop shaped passage. The intermediate metal layer includes a pair of walls forming a part of a pipe wall of the evaporator, the condenser, the liquid pipe, and the vapor pipe, and a porous body provided between the pair of walls. The intermediate metal layer includes a first surface opposing one of the pair of outermost metal layers, and a plurality of first cavities, and a first projection between mutually adjacent first cavities, respectively famed at the first surface between the pair of walls. A first gap is famed between the first projection and the one of the pair of outermost metal layers.Type: GrantFiled: April 1, 2021Date of Patent: October 3, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yoshihiro Machida
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Patent number: 11756866Abstract: A lead frame includes: a die pad having a mounting surface for a semiconductor element; a recess included on the mounting surface; and a lead disposed around the die pad. The recess includes: a bottom surface positioned at a depth less than a thickness of the die pad from an opening plane of the recess; a plurality of protrusions protruding from the bottom surface; and a concavity recessed from the bottom surface.Type: GrantFiled: September 8, 2021Date of Patent: September 12, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kentaro Kaneko, Yoshio Furuhata, Konosuke Kobayashi
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Patent number: 11749590Abstract: A wiring substrate device includes a wiring substrate, a plurality of terminals each of which is provided upright on the wiring substrate and has a lower end, an upper end and a narrowed part between the lower end and the upper end, and a plurality of solders each of which has a melting point lower than the terminals and covers a surface of the corresponding terminal.Type: GrantFiled: December 16, 2020Date of Patent: September 5, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Tatsuya Koike
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Patent number: 11742272Abstract: A semiconductor device includes a film substrate, an adhesive on a first surface of the film substrate, an electronic component on the adhesive, a wiring layer on a second surface of the film substrate opposite from the first surface, and a reinforcement member in an area around the electronic component on the adhesive. The wiring layer is connected to the electronic component through a via hole piercing through the film substrate and the adhesive. The reinforcement member has a thickness smaller than the thickness of the electronic component.Type: GrantFiled: November 26, 2021Date of Patent: August 29, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yoichi Nishihara
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Publication number: 20230268712Abstract: A method of manufacturing a semiconductor device includes: preparing a bottom plate having an upper surface and a lower surface, wherein the lower surface of the bottom plate comprises a reference part and one or more inclined surfaces that are inclined with respect to the reference part, an upper portion of the one or more inclined surfaces being positioned above the reference part, and wherein a thickness of the bottom plate at the reference part is greater than a thickness of the bottom plate at the upper portion of the one or more inclined surfaces; joining a frame member to the bottom plate, at least a part of the frame member being disposed directly above the one or more inclined surfaces, a linear expansion coefficient of the frame member being smaller than a linear expansion coefficient of the bottom plate; and fixing a semiconductor element to the bottom plate.Type: ApplicationFiled: May 1, 2023Publication date: August 24, 2023Applicants: NICHIA CORPORATION, SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Takuya Hashimoto, Eiichiro Okahisa, Katsuya Nakazawa, Shigeru Matsushita, Sumio Uehara, Suguru Kobayashi, Kazuhito Yumoto
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Patent number: 11735458Abstract: A ceramic mixture paste includes oxide ceramic particles, burn-off particles, and a firing aid. The burn-off particles are burned off at a temperature lower than the firing temperature of the oxide ceramic particles. The firing aid melts at a temperature lower than the firing temperature. The ratio of the volume of the burn-off particles to the volume of the oxide ceramic particles is more than 0% and less than or equal to 20%.Type: GrantFiled: May 29, 2018Date of Patent: August 22, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Tomotake Minemura
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Patent number: 11735560Abstract: An electronic-component-embedded substrate includes a base having flexibility and cavities formed therethrough, electronic components disposed in the cavities, respectively, and interconnects disposed on the base and connected to the electronic components, wherein the interconnects include a metal foil having openings that abut the electronic components, and include a plating layer disposed on the metal foil and connected to the electronic components through the openings.Type: GrantFiled: May 19, 2021Date of Patent: August 22, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yoichi Nishihara
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Patent number: 11733162Abstract: An ultraviolet detection material includes a composite oxide including aluminum, strontium, cerium, lanthanum and manganese, and a glass having a softening point of 900° C. or lower. The ultraviolet detection material is not excited by an electromagnetic wave having a wavelength longer than 310 nm and is excited by an electromagnetic wave having a wavelength equal to or shorter than 310 nm, thereby emitting light having a peak of an emission wavelength in 480 nm or longer and 700 nm or shorter.Type: GrantFiled: February 2, 2022Date of Patent: August 22, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Michio Horiuchi, Masaya Tsuno
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Patent number: 11730057Abstract: An electronic device includes a light-receiving device configured to receive solar light, a loop-type heat pipe to which heat is input from the light-receiving device and in which an operating fluid is enclosed in a loop-shaped flow path, and a thermoelectric conversion element configured to convert a temperature difference of the loop-type heat pipe into electric power.Type: GrantFiled: September 7, 2021Date of Patent: August 15, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yoshihiro Machida
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Patent number: 11729914Abstract: A wiring board includes an insulating layer, a thin film capacitor laminated on the insulating layer, an interconnect layer electrically connected to the thin film capacitor, and an encapsulating resin layer laminated on the thin film capacitor. The interconnect layer includes a pad protruding from the thin film capacitor. The encapsulating resin layer is a mold resin having a non-photosensitive thermosetting resin as a main component thereof. The encapsulating resin layer exposes a top surface of the pad, and covers at least a portion of a side surface of the pad.Type: GrantFiled: April 26, 2022Date of Patent: August 15, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO.. LTD.Inventors: Hiroshi Taneda, Noriyoshi Shimizu, Rie Mizutani, Masaya Takizawa, Yoshiki Akiyama
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Patent number: 11719490Abstract: A loop heat pipe includes an evaporator to vaporizes a working fluid, a condenser to liquefy the working fluid, a liquid pipe to connect the evaporator and the condenser, and a vapor pipe to connect the evaporator and the condenser, and form a loop-shaped passage together with the liquid pipe. A recess is formed in at least a portion of an outer wall surface of a pipe wall of the evaporator, the condenser, the liquid pipe, and the vapor pipe.Type: GrantFiled: September 24, 2020Date of Patent: August 8, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yoshihiro Machida
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Patent number: 11721574Abstract: A lanthanoid element is included in a part of a material of a member for an electrostatic chuck configured to suck a target object by using an electrostatic force. When electromagnetic waves in a wavelength region shorter than 400 nm are irradiated, the member emits light in a wavelength region different from the wavelength region.Type: GrantFiled: July 21, 2021Date of Patent: August 8, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Michio Horiuchi, Masaya Tsuno
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Patent number: 11716810Abstract: A wiring board includes a first interconnect structure including a first interconnect layer, and a first insulating layer including a non-photosensitive thermosetting resin as a main component thereof, a second interconnect structure including second interconnect layers, and second insulating layers including a photosensitive resin as a main component thereof, and laminated on the first interconnect structure, and an encapsulating resin layer including a non-photosensitive thermosetting resin as a main component thereof, and laminated on an uppermost second insulating layer. An uppermost second interconnect layer includes a pad protruding from the uppermost second insulating layer. The encapsulating resin layer exposes a top surface of the pad, and covers at least a portion of a side surface of the pad. Thermal expansion coefficients of the first insulating layer and the encapsulating resin layer are lower than that of the second insulating layers.Type: GrantFiled: April 26, 2022Date of Patent: August 1, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Masaya Takizawa, Rie Mizutani, Hiroshi Taneda, Yoshiki Akiyama, Noriyoshi Shimizu
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Patent number: 11706877Abstract: A composite wiring substrate includes a first wiring substrate including a first connection terminal, a second wiring substrate including a second connection terminal facing the first connection terminal, and a joint material joining the first connection terminal and the second connection terminal. The first outline of the first connection terminal is inside the second outline of the second connection terminal in a plan view. The joint material includes a first portion formed of an intermetallic alloy of copper and tin, and contacting each of the first connection terminal and the second connection terminal, and a second portion formed of an alloy of tin and bismuth, and including a portion between the first outline and the second outline in the plan view. The second portion contains the bismuth at a higher concentration than in the eutectic composition of a tin-bismuth alloy, and is separated from the second connection terminal.Type: GrantFiled: May 2, 2022Date of Patent: July 18, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Shota Miki, Koyuki Kawakami, Kiyoshi Oi, Kei Murayama, Mitsuhiro Aizawa
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Patent number: 11705400Abstract: A semiconductor package includes: a first substrate; a semiconductor chip mounted on the first substrate such that a circuit formation surface is oriented toward the first substrate; a second substrate arranged above the first substrate, the semiconductor chip being sandwiched between the first substrate and the second substrate; and a resin that seals the semiconductor chip and that is filled between the first substrate and the second substrate, wherein the second substrate includes a solder resist layer having a first surface facing a back surface that is an opposite surface of the circuit formation surface of the semiconductor chip, and wherein on an area of the first surface of the solder resist layer facing the back surface of the semiconductor chip, at least one protruding portion that protrudes towards the back surface of the semiconductor chip is provided.Type: GrantFiled: November 29, 2019Date of Patent: July 18, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Seiji Sato
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Patent number: 11699612Abstract: A substrate fixing device includes: a base plate; and an electrostatic chuck that is fixed to the base plate to adsorb a substrate by electrostatic force. The electrostatic chuck includes: an adsorption layer that is formed of ceramic and that contacts the substrate to adsorb and hold the substrate; a first heating layer that is formed on the adsorption layer and that includes a first electrode; a second heating layer that is formed on the first heating layer and that includes a second electrode; and a via that is provided between the first electrode and the second electrode to electrically connect the first electrode and the second electrode to each other. The via includes a body portion, and an end portion that is connected to the body portion. A diameter of the end portion is larger than that of the body portion.Type: GrantFiled: November 11, 2021Date of Patent: July 11, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Keiichi Takemoto, Yoichi Harayama, Hiroyuki Asakawa, Takahiro Rokugawa
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Patent number: 11696408Abstract: A circuit board includes a substrate having an end surface, and a principal surface on which an electronic component is mounted, a first region, provided on the principal surface, and coated with a moistureproof agent, a second region, provided on the principal surface, and prohibited from being coated with the moistureproof agent, and a groove having two ends, formed in the principal surface, between the first region and the second region. The two ends of the groove reach the end surface of the substrate. The groove includes a guiding part, configured to guide the moistureproof agent overflowing from the first region into the groove, provided at a portion of the groove farthest away from the end surface.Type: GrantFiled: October 7, 2021Date of Patent: July 4, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Kenichi Mori
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Patent number: 11688669Abstract: A wiring substrate includes a first insulating layer, a pad on a surface of the first insulating layer, a reinforcement wiring pattern in or on the surface of the first insulating layer, and a second insulating layer on the surface of the first insulating layer. The reinforcement wiring pattern surrounds the pad without contacting the pad in a plan view. The second insulating layer includes an opening in which the pad is exposed without contacting the second insulating layer. The second insulating layer includes an inner side surface defining the opening. The inner side surface is on the reinforcement wiring pattern.Type: GrantFiled: September 14, 2021Date of Patent: June 27, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO.. LTD.Inventor: Satoshi Hondo
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Patent number: 11683886Abstract: A wiring substrate includes: a base material; a first through-hole and a second through-hole that are formed in the base material; magnetic material that is filled in the first through-hole; a third through-hole that is formed in the magnetic material; a first plating film that covers an inner wall surface of the third through-hole; and a second plating film that covers an inner wall surface of the second through-hole and the first plating film. The first plating film includes a first electroless plating film that is in contact with the inner wall surface of the third through-hole, and a first electrolytic plating film that is laminated on the first electroless plating film.Type: GrantFiled: January 4, 2022Date of Patent: June 20, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Toshiki Shirotori