Abstract: A low noise variable gain amplifier and method for processing received signals in an ultrasound medical imaging system is disclosed. Unlike solutions known from the prior art, the signals are amplified by a binary-coded gain amplifier having its amplification factor progressively increased during the penetration of the transmitted pulse into a patient's body. This allows enhancing both the system dynamic range and Signal to Noise Ratio.

Abstract: A complementary high voltage switched current source circuit has a complementary current source pair, wherein a first of the current source pair is coupled to a positive voltage rail and a second of the current source pair is coupled to a negative voltage rail. A digital logic-level control interface circuit is coupled to the complementary current source pair and to the positive voltage rail and the negative voltage rail. A pair of high voltage switches is coupled to the complementary current source pair and the digital logic-level control interface circuit and controlled by the digital control interface circuit.

Abstract: A low noise variable gain amplifier and method for processing received signals in an ultrasound medical imaging system is disclosed. Unlike solutions known from the prior art, the signals are amplified by a binary-coded gain amplifier having its amplification factor progressively increased during the penetration of the transmitted pulse into a patient's body. This allows enhancing both the system dynamic range and Signal to Noise Ratio.

Abstract: An integrated circuit high voltage analog switch has digital logic-level control interface circuit. A level translator is coupled to the digital logic-level control interface circuit. A plurality of output multi-channel high voltage switches is coupled to the level translator.

Abstract: The invention provides a novel method of transmit beamforming, which allows compact analog implementation of complex digital algorithms without compromising their features. It is aimed to support envelope shaping, apodization, and phase rotation per channel and per firing. Each of three embodiments represents a complete transmit channel driven by pulse-width modulated (PWM) waveforms stored in a conventional sequence memory. PWM signals controls the transmit pulse envelope (shape) by changing the duty cycle of the carrier. Beamformation data are loaded prior to a firing via serial interface. Under the direction of a controller, the circuitry allows high precision (beyond sampling rate) phase rotation of the carrier. It also provides transmit apodization (aperture weighting), which maintains an optimal trade-off among low sidelobe level and widening of the mainlobe. Implementing such an IC, the manufacturing cost of a high-end ultrasound system can be reduced.

Abstract: A switching power converter has an input voltage source. An output load is coupled to the input voltage source. An inductive element is coupled to the load. A switch is coupled to the inductive element. A current reference input is provided. A control circuit is coupled to the switch and the current reference input for activating and deactivating the switch. The inductive element receives power from the input voltage source when the switch is activated and conducting continuous current. The control circuit deactivates the switch after a controlled delay time when the current in the inductive element and the switch exceeds the current reference input so that an average current in the inductive element is determined by a magnitude of the current reference input.

Abstract: An electroactive lens driver comprises a voltage generator generating a high alternating current voltage signal for application to an electroactive lens in response to a low direct current voltage signal. The voltage generator does not include an inductor or a transformer.

Abstract: A phase shift generation circuit has an edge detector, which receives an input pulse signal and outputs a first and a second edge signal denoting the time of occurrence of the first and second edges of the input pulse signal. The circuit also has a divide by N circuit, which receives a first clock signal and a group of signals representing a number N, and outputs a second clock signal, said a second clock signal having a frequency equal to the frequency of said first clock signal divided by the number N. The circuit further comprises a pulse counter, which receives the first edge signal and the second clock signal, and outputs a group of signals representing the number of the second clock pulses between occurrences of the first edge signal. The circuit has a first recycling timer, which receives the number of second clock pulses, the first edge signal and the first clock signal, and outputs a group of pulses approximating a uniformly spaced group across the time duration of the period of the input pulse.

Abstract: A dimming circuit for driving a string of LEDs at constant current has a power converter. A control circuit is coupled to the power converter. A plurality of shunt switches is provided. An individual shut switch is coupled to each LED. Each LED can be shunted individually by the individual shunt switch. The control circuit corrects an internal DC state based on a feedback signal VO so that the output current of the power converter remains unchanged when at least one LED is shunted.

Abstract: A low noise variable gain amplifier and method for processing received signals in an ultrasound medical imaging system is disclosed. Unlike solutions known from the prior art, the signals are amplified by a binary-coded gain amplifier having its amplification factor progressively increased during the penetration of the transmitted pulse into a patient's body. This allows enhancing both the system dynamic range and Signal to Noise Ratio.

Abstract: A high speed logic signal level shifter is comprised of: a logic signal buffer for receiving logic signal information and having true and complement state differential outputs; a binary flip-flop circuit with set and reset inputs; a first coupling capacitor connected from the true buffer output to the set input of the binary flip-flop circuit; and a second coupling capacitor connected from the complement buffer output to the reset input of the binary flip-flop circuit. The high speed logic signal level shifter transfers a fast logic signal across a high voltage difference by making use of rapid voltage changes transmitted through small capacitors. The signal changes carried by the capacitors are about 10 times faster than any expected voltage transient on VPP or VNN. Furthermore, the differential coupling circuit is used to provide enhanced protection against undesired circuit switching during supply voltage changes.

Abstract: A system and method for delivering regulated power and current to an output load has a flyback transformer having a primary winding and a secondary winding. The secondary winding delivers stored energy to the output load. An oscillator circuit is provided for generating a periodical signal. A switching circuit is coupled to the flyback transformer and the oscillator circuit for energizing the primary winding to a reference current level each cycle of the oscillator circuit. The oscillator circuit has an integrator for deriving a time integral of a voltage at the primary winding. The oscillator circuit has a peak detector coupled to the integrator for holding a peak value of the time integral. The oscillator circuit further has a ramp generator for producing a ramp signal. A comparator is provided for comparing the peak value with the ramp signal and generating the periodical signal whenever the ramp signal exceeds the peak value.

Abstract: An EL driver circuit has a full H-bridge circuit. A boost converter is coupled to the full H-bridge circuit. The boost converter is pulse width modulated to generate a gradual increase in voltage to be applied to the full H-bridge circuit to drive an EL lamp.

Abstract: A level translator has an inverter comprising a first transistor having a first predetermined voltage threshold and a second transistor having a second predetermined voltage threshold. The two transistors have control gates being of complementary conductivity. A first capacitor is connected at one end to the gate of the first transistor and at a second end to an input signal. A second capacitor is connected at one end to the gate of the second transistor, the input signal being applied to a second end of the second capacitor. A comparator is used for detecting the relationship between the input signal and a reference voltage. A first current mirror has one terminal connected to an output of the comparator, and another terminal connected to the gate of the first transistor. A second current mirror has one terminal connected to an output of the comparator, and another terminal connected to the gate of the second transistor. A first clamp circuit is used for limiting a gate voltage of said first transistor.

Abstract: An electroactive lens driver generates a variable root-mean-square drive voltage for controlling an electroactive lens by controlling the duty cycle of a modified square wave.

Abstract: A level translator has a pair of transistors, wherein a first transistor of the pair of transistors and a second transistor of the pair of transistors are complimentary. A pair of capacitors are provided, wherein a first capacitor of the pair of capacitors is coupled to a voltage input VIN and to a gate of a first transistor of the pair of complimentary transistors and a second capacitor of the pair of capacitors is coupled the voltage input VIN and to a gate of a second transistor of the pair of complimentary transistors. A flip flop device is provided having a first input coupled to a drain of the first transistor, and a second input coupled to a drain of the second transistor. A pair of resistors is provided, wherein a first resistor of the pair of resistors is coupled to the gate of the first transistor and to a voltage supply of VDD, and a second resistor of the pair of resistors is coupled to the gate of the second transistor and to a voltage supply VSS.

Abstract: An electroactive lens driver comprises a voltage generator generating a high alternating current voltage signal for application to an electroactive lens in response to a low direct current voltage signal. The voltage generator does not include an inductor or a transformer.

Abstract: An ultrasonic low-noise analog beamformer for Doppler acquisition achieves high sensitivity by translating the frequency of the ultrasound echoes to an intermediate frequency, which is well above of the 1/f corner. This is accomplished by beamforming the downconverted RF signals instead of using their baseband representation. The baseband conversion, succeeding the beamformation, also incorporates the steps of clutter filtering and anti-aliasing. The invention is particularly suitable for low-voltage process technologies that support broadband applications.

Abstract: A circuit for driving an array of Light Emitting Diode (LED) strings at a constant current has a plurality of LEDs. A plurality of LED drivers is provided wherein a single LED driver is coupled to each of the plurality of LEDs. A voltage reference generator is used for sending a voltage reference signal to each LED driver. The voltage reference generator is external to each of the plurality of LED drivers. An input line voltage is coupled to the voltage reference generator. A clock generator is provided for sending to a clock signal to each of the plurality of LED drivers. The clock generator is external to each of the plurality of LED drivers. A low-frequency PWM dimming input signal is coupled to each of the plurality of LED drivers to allows dimming of the LEDs.

Abstract: A circuit for transmitting logic signals across a high voltage barrier has a logic signal buffer with true and complement state differential outputs. A binary flip-flop with set and reset inputs is further provided. A first coupling capacitor is coupled to the true buffer output and to the set input of the binary flip-flop. A second coupling capacitor is coupled to the complement buffer output and to the reset input of the binary flip-flop circuit.