Patents Assigned to Telairity Semiconductor, Inc.
  • Publication number: 20050039071
    Abstract: A system is disclosed for use of imperfect ROMs in embedded systems. The ROM or other memory accessible upon start-up of the system, includes a stored program which checks an external source to determine whether any of the information in the ROM should be replaced. If it should be replaced, then the system retrieves good information from an external source and stores it into a cache memory. By setting a “lock” bit, erasure of the replacement information is prevented.
    Type: Application
    Filed: August 11, 2003
    Publication date: February 17, 2005
    Applicant: Telairity Semiconductor, Inc.
    Inventor: Howard Sachs
  • Publication number: 20050028128
    Abstract: A group based design methodology and system. In one embodiment the groups have predefined layout characteristics and are sometimes amalgamated into functions. Integrated circuits are designed by placing groups and functions into a layout space.
    Type: Application
    Filed: August 23, 2004
    Publication date: February 3, 2005
    Applicants: Telairity Semiconductor, Inc.
    Inventor: Howard Sachs
  • Publication number: 20050023705
    Abstract: Techniques are provided for reducing power supply voltage drop introduced by routing conductive traces on an integrated circuit. Techniques for reducing variations in the power supply voltages received in different regions of an integrated circuit are also provided. Power supply voltages are routed within an integrated circuit across conductive traces. The conductive traces are coupled to bond pads that receive power supply voltages from an external source. Alternate ones of the traces receive a high power supply voltage VDD and a low power supply voltage VSS. The conductive traces reduce the voltage drop in the power supply voltages by providing shorter paths to route the power supply voltages to circuit elements on the integrated circuit.
    Type: Application
    Filed: July 30, 2003
    Publication date: February 3, 2005
    Applicant: Telairity Semiconductor, Inc.
    Inventors: John Campbell, Kim Stevens, Luigi DiGregorio
  • Publication number: 20050022146
    Abstract: A group based design methodology and system. In one embodiment the groups have predefined layout characteristics and are sometimes amalgamated into functions. Integrated circuits are designed by placing groups and functions into a layout space.
    Type: Application
    Filed: August 23, 2004
    Publication date: January 27, 2005
    Applicant: Telairity Semiconductor, Inc.
    Inventor: Howard Sachs
  • Publication number: 20030140219
    Abstract: A state machine provides a power reducing capability by turning off a clock signal to a memory which stores the state of the state machine. Preferably, the state machine is connected to receive information from an external circuit, typically a system to be controlled by the state machine. The state machine includes a programmable memory in which each row stores a word representing output information as a sequence of bits. It also includes a register which stores the state of the state machine when the memory is not active. The state machine includes a selection circuit which selects a next state of the state machine. When the next state of the state machine is selected to be the same as the previous state the clock signal to the memory is turned off, enabling reduced power consumption by the state machine.
    Type: Application
    Filed: October 30, 2002
    Publication date: July 24, 2003
    Applicant: Telairity Semiconductor, Inc.
    Inventor: Howard G. Sachs