Abstract: The invention relates to a charge-coupled device. Such devices comprise at least one insulated conducting gate (3) connecting two semiconductor zones. According to the invention, each insulated conducting gate (3) has a width progressively increasing from the first semiconductor zone (1) to the second semiconductor zone (2). The width of each gate (3) is sufficiently narrow for the potential well created by the application of a voltage V to the gate to have a depth increasing progressively from the first zone (1) to the second zone (2), thus enabling the charges to be driven away. The invention applies to any type of charge-coupled device and particularly to photodiodes.

Abstract: A charge/voltage conversion device of a CCD type charge transfer read register comprises a read diode and a read amplifier, wherein the read amplifier comprises a first amplification stage enabling the conversion, into current variations (.DELTA.I), of the voltage variations (.DELTA.Vg) collected at the terminals of the read diode and a second amplification stage enabling a reading to be made of said current variations. The disclosed device can be applied especially to photosensitive devices enabling the conversion of a light image into an electrical signal.

Abstract: A fast differential sample-and-hold circuit includes two transistors controlled so as to be turned on or off. The output signal of the circuit is recovered at the terminals of an output capacitor connecting the emitters of the two transistors. The sample-and-hold circuit includes additional circuitry having two dynamic current generators and an additional capacitor which make the current flowing through the transistors constant when they are on. To this end, the two dynamic current generators are modulated by differential current which is output by the additional capacitor and the variations in which reproduce the current variations which appear in the output capacitor.

Abstract: The invention relates to components such as pyroelectric sensors which are particularly sensitive to piezoelectric effects and which, consequently, are disturbed by the mechanical deformations or the vibrations which the component may experience. In order to limit these disturbances, it is proposed to insert, between the chip (10) carrying the pyroelectric layer and the bottom of the package (30), a flexible sheet (42) of silicone which absorbs the deformations of the package without transmitting them to the chip. Ultrasonic bonding of the connecting wires (34) is still possible despite the presence of the flexible sheet. The chip is preferably fixed to a metallized ceramic plate (40) and abutments (44) are preferably provided at the bottom of the package in order to limit the compression of the flexible sheet (42) during the bonding operation.

Abstract: A CCD type charge-transfer photosensitive device (Z1) comprises a photosensitive zone (Z2) formed by at least one line of pixels and designed for the conversion, into electrical charges, of the photons coming from an image and a non-photosensitive zone designed to remove the charges generated in the photosensitive zone and comprising a read register (RL) consisting of transfer stages (ET), the charges generated in a pixel of the photosensitive zone (Z1) being collected in a transfer stage of the read register, wherein the read register (RL) is formed by Q elementary sub-registers Rj (j=1, 2, . . . , Q), each elementary sub-register being formed by a whole number Mj of transfer stages (ET) enabling the transfer of the charges from the first-order stage up to the M order stage, M possibly being different for two different elementary sub-registers, and a read diode located in the M order transfer stage so as convert the variations of charges collected at the terminals of the diode into voltage variations.

Abstract: A protection circuit against the electrostatic discharges that could appear at the terminals of a circuit, wherein said protection circuit comprises a first transistor made in a well whose potential is a floating potential and enabling the value of the discharge voltage to be limited to a value equal to minus the value of the threshold voltage of said first transistor and a second transistor made in a well whose potential is a floating potential and enabling the value of the discharge voltage to be limited to a value equal to the value of the threshold voltage of said second transistor. The disclosure can be applied to MOS technology integrated circuits.

Abstract: Disclosed is a photodetector comprising at least one photosensitive diode and at least one read circuit enabling the charges generated by photoelectric effect in said diode to be converted into a voltage information element sampled by a switch, wherein said photosensitive diode has a first terminal connected to the gate and to the drain of a first transistor and a second terminal connected to the source of said first transistor and to the ground of said photodetector, wherein a second transistor with dimensions proportional to those of said first transistor is mounted as a current mirror with respect to said first transistor and wherein an integration capacitor is connected to the drain of said second transistor so as to collect said voltage information element at its terminals.

Abstract: The disclosure is a high-power solid laser in which an emissive array of semiconductor lasers in a first stage pumps a solid YAG-type laser in a second stage. The structure of the emissive array, which is an integrated circuit, includes rods of semiconductor lasers alternating with grooves, the rods and grooves being parallel. The invention involves incrusting the material of the solid laser bars into the grooves between the rods of semiconductor lasers. This material is either placed in hybrid form or deposited to make an integrated structure.

Abstract: The invention concerns a memory cell insensitive to disturbances. The memory cell, that contains information in the form of two complementary logical levels (X, C(X)), each logical level being stored in a node of the cell (N1, N2), is characterized in that it comprises means of storing the same logical level in two different nodes (N1, N2, N3, N4), the said means being able to restore any logical level to its initial state preceding a modification made on it due to a disturbance, as a result of holding the value of one of the two logical levels complementary to the logical level that was modified.

Abstract: A variable gain amplifier which has n parallel-connected elementary amplifiers, and components for selecting j-order (j=1, 2, . . . , n) elementary amplifier according to the desired gain. Each elementary amplifier is of a common base type. The variable gain amplifier includes components that are used to obtain a low value input impedance that is independent of the gain of the selected elementary amplifier. The variable gain amplifier will find particular application at the input stages of amplification lines of receiving circuits which require noise performance characteristics.

Abstract: The invention concerns a charge-to-voltage converter including a read diode and a read transistor of no-load gain G.sub.o. The converter includes complementary circuits assuring a conversion gain greater than G.sub.o during read periods and a conversion gain substantially equal zero at other times.

Abstract: A novel redundancy architecture for an integrated-circuit memory is utilized having no redundancy columns separate from the useful columns but with each useful column, except for the first column, serving as a redundancy column for any adjacent defective column. If a column of order j, normally designated by an output of order j of the column decoder DC, is serviceable, it is actually this column which will be selected by the corresponding output of the decoder DC. On the other hand, if the column is defective, no specialized remote redundancy column will be sought for the repair but instead the output of the decoder will be made to select the following column (order j+1), which would normally have been designated by the following output (order j+1) of the decoder. The other decoder output will be routed towards a third column (order j+2), etc. Therefore, the links between the decoder outputs and the column used will be progressively offset.

Abstract: The invention concerns precision analogue-digital converters. For the fine conversion, supplying the low order bits (B0 to Bk) for an analogue voltage Vin to be converted, three ordinary differential amplifiers (ADA, ADB, ADC) are used connected to three voltage references VR(i-1), VR(i), VR(i+1). These three amplifiers supply differential output voltages (VAa, VAb, VBa, VBb, VCa, VCb) that vary as a function of Vin according to normal transfer functions for differential amplifiers. Intersection points of these various transfer curves are detected in interpolation circuits (firstly CIT1, then CIT2, etc). These intersection points are used as intermediate voltage references between the main references. Comparators (CMP0 . . . CMPk), placed at the output of interpolation circuits supply bits (B0 to Bk) indicating the value of Vin with respect to each of these intermediate references.

Abstract: A frequency divider, constituted by N divide-by-two binaries, comprises logic circuits that enable the generation of a signal of the end of the frequency division by means of the change in state of the most significant bit generated by the Nth order divide-by-two binary. A binary code C representing a decimal integer value V is applied to the divider circuit. The frequency divider comprises circuits that enable the performance of a variable order division (V+1, V, . . . V-p, where p is a whole number greater than or equal to 1 and smaller than N-1) for one and the same binary code C.

Abstract: The invention relates to integrated circuits and their manufacture.A process is described for producing electrodes juxtaposed very close together, such as those encountered in charge-coupled shift registers. According to the invention, a first polycrystalline-silicon layer (14) is deposited and a localised oxidation is performed over a small width, in order to tcwtcwdivide the layer into two electrodes (15 and 17). The layer zone which has been oxidised between the two electrodes is then totally deoxidised, in order to produce a hollowed-out space in which it will be possible to house a third electrode (38). This third electrode, also made from polycrystalline silicon, is deposited after a slight insulating layer has been reformed on the side walls of the electrodes 15 and 17. As the width of the hollowed-out space between the two first electrodes is small, a polycrystalline-silicon overthickness is formed.

Abstract: A thermal image detector and, more particularly, linear or matrix pyroelectric detectors. These detectors work differentially in successive phases of illumination and masking via a shutter that is synchronized with signal processing circuits. The detector generates differential measurement signals representing variations of pyroelectric signals recorded during a cycle comprising a masking phase and an illumination phase. To eliminate fixed pattern noise, it is proposed to make the measurements by difference between two successive cycles of masking and illumination, the order of the illumination/masking cycles being reversed between the two cycles but the measurements being made identically in both cycles. A memory records the signals during a cycle. A subtractor subtracts the signal of the current cycle from the signal recorded in the previous cycle.

Abstract: The disclosure relates to analog-digital converters. It is sought to limit the power consumption and obtain a better compromise among the different performance characteristics of the computer. In a general structure of a converter there are, firstly, a coarse converter for the most significant bits and, secondly, a fine converter for the least significant bits. One of them, generally, the fine converter, has differential amplifiers [AD(1) to AD(N)]receiving the voltage to be converted (Ve) and a reference voltage. It is proposed to place sample-and-hold circuits [EB(1) to EB(N)] at output of these differential amplifiers and to eliminate the sample-and-hold circuit that is often placed upline with respect to these amplifiers.

Abstract: The disclosure relates to thermal image detectors and, more particularly, to linear or matrix type pyroelectic detectors. These detectors work differentially, in successive phases of masking and illumination, by use of a shutter that is synchronized with the signal processing circuits. The detected signals are shed in the form of charge packets into a shift register (RD). To reduce the noises that are proportional to the duration of the illumination or masking phases, the shutter is made to work at higher speed and several successive illumination/masking cycles are carried out by making the shift register go backward between two cycles. The shift register is emptied to give an image signal only after two or more cycles.

Abstract: A CCD shift register having a reading device, or charge/voltage conversion device, at one end. This reading device or charge/voltage conversion device includes a diode, a precharging transistor, and an amplifier with high input impedance. To improve the efficiency of the charge transfer and, more generally, the behavior of the register, especially at high frequencies, it is proposed to shape the final gate of the register, and the diode, in such a way that the width along which the gate is adjacent to the diode (i.e. the width along which the end of the channel is adjacent to the diode) is great while, at the same time, the diode surface area is kept small.

Abstract: The disclosure relates to the servo-control of an electronic circuit that calls for the detection of the power delivered at its output. The disclosed device is essentially constituted by a field-effect transistor with zero bias V.sub.DS mounted between the ground and a matching network at output of the circuit. This transistor behaves either like a capacitor or like a diode. A low-pass filter, connected between the transistor and the network, delivers a detection voltage V.sub.det.