Patents Assigned to Toko Kabushiki Kaisha
  • Patent number: 6633218
    Abstract: A surface mounting type coil includes: a coil hiving windings which are wound around a magnetic core having a hole; a cylindrical magnetic body which is provided around the coil; and a plurality of metal plate terminals which leads of the windings are connected to; the metal plate terminals extending along an outer face of the cylindrical magnetic body from a bottom face to a top face thereof, and being secured to the cylindrical magnetic body in such a manner that tips of the metal plate terminals are within the thickness of the cylindrical magnetic body.
    Type: Grant
    Filed: January 24, 2001
    Date of Patent: October 14, 2003
    Assignee: Toko Kabushiki Kaisha
    Inventors: Hideaki Saito, Shinkichi Shimakage, Hitoshi Sasanuma
  • Patent number: 6597056
    Abstract: A laminated chip component including: alternately laminated conductive patterns (13,43,63) and insulating sheets (11,41,61); through-holes (12,42,62) which are provided in the insulating sheets and connect top layer conductive patterns to bottom layer conductive patterns; auxiliary conductive patterns (15,45,65) which are provided on the top faces of the conductive patterns at positions facing the through-holes provided in adjacent insulating sheets; and conductors (14,64) which are provided in the through-holes. The auxiliary conductive patterns can be substituted by conductor sections (16,66) which are provided in the insulating sheets at the positions facing the through-holes provided in adjacent insulating sheets. And, a method for manufacturing a laminated chip component is also disclosed.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: July 22, 2003
    Assignee: Toko Kabushiki Kaisha
    Inventors: Nobuaki Muramatsu, Takahiro Ogawa
  • Patent number: 6593839
    Abstract: A conventional braided wire has high direct current resistance and high winding resistance in high-frequency regions, making it impossible to achieve a power conversion transformer having sufficient conversion efficiency. In the present invention, a braided wire is braided from three or more cluster wires, each comprising multiple strands, and is used as winding material for a leakage flux-type power conversion transformer. The braid pitch of the braided wire is set so that the ratio between one-turn winding length and the braid pitch is between 0.5 and 2.5.
    Type: Grant
    Filed: January 3, 2002
    Date of Patent: July 15, 2003
    Assignee: Toko Kabushiki Kaisha
    Inventors: Kazuhiro Nakayama, Shigeo Abe
  • Patent number: 6501209
    Abstract: A piezoelectric transformer driving circuit comprises a piezoelectric transformer which boosts an input voltage to obtain a voltage required in igniting a cold cathode tube, a restart circuit which detects the voltage output from said piezoelectric transformer and allows said piezoelectric transformer to repeatedly output a high voltage required in initially igniting said cold cathode tube, a PWM controller which allows said piezoelectric transformer to intermittently output a voltage in order to adjust the brightness of said cold cathode tube, and a stopping unit which stops the control operation of said PWM controller when restart circuit is operative.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: December 31, 2002
    Assignee: Toko Kabushiki Kaisha
    Inventors: Masaaki Totsuka, Kachiyasu Satoh, Takahiro Inokuchi, Toshihiro Takahashi
  • Patent number: 6462509
    Abstract: A non-contact charger wherein a battery-driven electronic device containing a secondary battery is provided in a power supply section and electrical power is supplied thereto by non-contact, the non-contact charger including: a primary side coil and a secondary side coil, the primary side coil supplying power to the secondary side coil by electromagnetic induction, the primary side and secondary side coils being provided to face each other with a case therebetween; the primary side coil containing a U-shaped magnetic core having a leg at each end thereof, and windings which are wound around the magnetic legs; and the secondary side coil containing a U-shaped magnetic core having a leg at each end thereof, and a winding which is wound around a common magnetic core of the U-shaped magnetic core; the cross-sectional area of the magnetic legs of the primary side coil being greater than the cross-sectional area of the magnetic legs of the secondary side coil.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: October 8, 2002
    Assignee: Toko Kabushiki Kaisha
    Inventors: Shigeo Abe, Hideki Kojima
  • Patent number: 6370033
    Abstract: An electronic device has a filter function, and enables a communications device to be miniaturized and made thin at reduced cost. A pair of spiral conductive patterns are provided adjacent to each other on a printed circuit board having multiple electronic elements provided thereon, and one end of each of the spiral conductive patterns connects via through holes to a ground pattern provided on the bottom face of the printed circuit board. Then, a cavity case is electrically connected to the ground pattern, and is mounted on the printed circuit board so as to cover the top faces of the spiral conductive patterns, thereby forming a cavity resonance filter joined to the printed circuit board.
    Type: Grant
    Filed: February 2, 2000
    Date of Patent: April 9, 2002
    Assignee: Toko Kabushiki Kaisha
    Inventors: Seiichiro Saegusa, Naoshi Nakamura
  • Patent number: 6303979
    Abstract: A face down bonding PIN diode having a semiconductor main body; a first region of a conductivity type, a surface of the first region being exposed at a first surface of a semiconductor main body; a third region of a conductivity type opposite that of the first region, the third region being positioned under the first region; a fifth region of substantially intrinsic semiconductor, the fifth region being positioned between the first region and the third region; a fourth region of the same conductivity type, the fourth region being extended vertically from the first surface to the third surface; a first electrode provided on a predetermined surface of the semiconductor main body connected to the first region; and a second electrode provided on the predetermined surface of the semiconductor main body, the second electrode being connected to the fourth region and connected to the third region through the fourth region.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: October 16, 2001
    Assignee: Toko Kabushiki Kaisha
    Inventor: Takeshi Kasahara
  • Patent number: 6153921
    Abstract: Disclosed is a diode device in which two electrodes of regions forming both terminals are provided on the same face, thereby enabling the device to be connected to a circuit substrate by face-down bonding. Since a region is located within the semiconductor base, an electrode cannot be connected at the top face thereof; to overcome this, a groove is provided extending in a perpendicular direction from the top face of the semiconductor base to the region, and an electrode is provided in the groove. Then, the electrode in the groove is exposed at the top face, enabling the electrodes of both regions to be connected at the top face.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: November 28, 2000
    Assignee: Toko Kabushiki Kaisha
    Inventors: Yutaka Aoki, Takashi Ishikawa, Haruhiko Taguchi, Takeshi Kasahara
  • Patent number: 6031442
    Abstract: An electronic component such as a transformer or choke coil in which a coil is wound around the toroidal core to form a coil element which is completely encased in resin case. The inside of the case is partitioned by a plate so that the external terminals are fixed within terminal housing sections formed in four corners of the case and the toroidal core is fixed within a core housing section formed at the center of the case.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: February 29, 2000
    Assignee: Toko Kabushiki Kaisha
    Inventor: Michiya Nakazawa
  • Patent number: 6008527
    Abstract: A diode device for face down bonding use comprising: a semiconductor main body; a first region for forming an electrode, the region being exposed at a first surface of the semiconductor main body; a first electrode provided in the first region; a second region for forming another electrode, the second region being provided within the semiconductor main body; a third region conducting the second region to the first surface through the semiconductor main body; and a second electrode provided in the third region on the first surface.
    Type: Grant
    Filed: March 13, 1998
    Date of Patent: December 28, 1999
    Assignee: Toko Kabushiki Kaisha
    Inventor: Takeshi Kasahara
  • Patent number: 5999066
    Abstract: An interface module having a receiving section and a sending section, the receiving section being provided with a low pass filter, an isolation transformer and a common mode choke transformer, and the sending section is provided with a low pass filter, an isolation transformer and a common mode choke transformer and they are integrated with each other, wherein the receiving section and the sending section are independently formed on a board of the interface module, and the low pass filter at the receiving section and the low pass filter at the sending section are respectively covered by shield cases.
    Type: Grant
    Filed: September 5, 1997
    Date of Patent: December 7, 1999
    Assignee: Toko Kabushiki Kaisha
    Inventors: Hideaki Saito, Hitoshi Sasanuma, Katsuhito Nakajima, Yorio Komine
  • Patent number: 5905948
    Abstract: A therefor method of manufacturing tuning circuits for constituting a high frequency channel selecting circuit for a radio receiver. The method can eliminate the complicated coil inductance adjustment for tracking on the circuit board, so that the circuit elements can be arranged freely without any interference between the tuning circuits. The variable capacitance diodes (D1, D2; D3, D4; D5, D6) and fixed capacitances (C1; C4; C7) are classified; a fixed capacitance is selected according to a ranking of capacitance value of the variable capacitance diodes, to obtain a variable capacitance range or a ratio (C.sub.max /C.sub.min) determined for each tuning circuit; and the inductance of a coil (L1; L2; L3) of each tuning circuit is adjusted in such a way that tracking error can be eliminated on the basis of one common tuning voltage, before the tuning circuits are mounted on the circuit board.
    Type: Grant
    Filed: July 25, 1996
    Date of Patent: May 18, 1999
    Assignee: Toko Kabushiki Kaisha
    Inventor: Yukio Suzuki
  • Patent number: 5828206
    Abstract: The disclosed serial control type voltage regulator can prevent current from flowing from a backup capacitor (C1) to the side of the voltage regulator, when the control transistor (Q1) stops operating, reducing the power consumption of the backup voltage supply. In the serial control type voltage regulator having a control transistor (Q1) connected in series between an input terminal (1) and where an output terminal (2), an output voltage detector (6) and an error amplifier (4) are used for comparing an output voltage detected by the output voltage detector with a reference voltage (E3) to control the control transistor, there are provided a first switching element (Q3) for cutting off the output voltage detector (4) when the control transistor (Q1) stops operating and a second switching element (Q4) for cutting off the error amplifier (4) also when the control transistor (Q1) stops operating.
    Type: Grant
    Filed: March 15, 1996
    Date of Patent: October 27, 1998
    Assignee: Toko Kabushiki Kaisha
    Inventors: Rinya Hosono, Takeyuki Kouti
  • Patent number: 5825075
    Abstract: When a variable capacitance diode device is formed on each of chips obtained by cutting off a wafer, the capacitance values of the diode devices formed on the chips disperse for each wafer due to change in the manufacturing process conditions. To reduced the dispersion in capacitance value of the diode devices, a plurality of variable capacitance diodes (10A, 10B and 10C) are formed on the same semiconductor chip (2) in such a way that the areas of the PN junctions (4A, 4B and 4C) of the respective diodes are different from each other. Further, only one variable capacitance diode (e.g., 10C) which can satisfy a predetermined strict standard is selected and connected to a terminal (11) for use.
    Type: Grant
    Filed: June 20, 1996
    Date of Patent: October 20, 1998
    Assignee: Toko Kabushiki Kaisha
    Inventor: Takeshi Kasahara
  • Patent number: 5678212
    Abstract: An electronic tuning circuit for an AM radio receiver in which a signal of a specific frequency is selected from the input signal from an antenna is provided, this tuning circuit having a tuning transformer with a first winding and a second winding, the number of turns on the first winding being greater than the number of turns on said second winding, the input from the antenna being applied to the second winding of the tuning transformer, and further having two varactor diodes, each of which is connected in series with a DC-blocking capacitor, these series-connected varactor-capacitor combinations being connected in parallel with the first winding of the tuning transformer such that the polarities of the varactor diodes are mutually opposing.
    Type: Grant
    Filed: September 11, 1995
    Date of Patent: October 14, 1997
    Assignee: Toko Kabushiki Kaisha
    Inventors: Koichi Sakai, Ken Kasahara, Hajime Yokoyama, Noboru Takada, Yukio Suzuki
  • Patent number: 5589884
    Abstract: A picture transmission system for compressing picture information to transmit compressed picture information is provided. The picture transmission system includes, on the transmitter side, circuitry for realizing scene change detecting function. This circuitry comprises a buffer memory for storing picture signal of one frame to output it in order of luminance signal Y, and chrominance signals C.sub.B, C.sub.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: December 31, 1996
    Assignee: Toko Kabushiki Kaisha
    Inventor: Yuji Ohguchi
  • Patent number: 5548297
    Abstract: The present invention relates to a compact, lightweight microstrip antenna that operates at two frequencies that are widely different. On a dielectric substrate are formed an element consisting of an annular conductive pattern, wherein a central edge side thereof is short-circuited to a ground electrode, and an element consisting of a circular conductive pattern within the annular conductive pattern. The circular conductive pattern is accommodated within the annular conductive pattern. The two antennas operate at different frequencies, with the element formed by the annular conductive pattern resonating in TM.sub.11 mode and the element formed of the circular pattern resonating in the TM.sub.01 mode. An antenna capable of being used in common by systems with widely different frequency bands, such as the GPS and VICS, is thus obtained.
    Type: Grant
    Filed: July 22, 1994
    Date of Patent: August 20, 1996
    Assignees: Hiroyuki Arai, Toko Kabushiki Kaisha
    Inventor: Hiroyuki Arai
  • Patent number: 5493329
    Abstract: A picture transmission system used in a picture remote surveillance system or a visual telephone, etc. is provided. This picture transmission system includes, on the transmitter side, an A-D converter for converting an analog video input signal into a digital picture signal, a moving picture converting section for converting the picture signal into a reduced moving picture, a video encoder for compression-encoding the reduced moving picture by the hybrid coding system. In this picture transmission system, on the transmitter side, a switch operative in response to a signal from the receiver side is provided between the A-D converter and the moving picture converting section, and a still picture converting section is inserted between the switch and the video encoder. A picture signal outputted from the A-D converter is permitted to be selectively inputted to either the moving picture converting section or the still picture converting section.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: February 20, 1996
    Assignee: Toko Kabushiki Kaisha
    Inventor: Yuji Ohguchi
  • Patent number: 5446427
    Abstract: The present invention relates to a balanced low-pass filter characterized in comprising a pair of input terminals and a pair of output terminals, wherein a pair of coils is connected in series in a negatively coupled manner between a first input terminal and a first output terminal and a pair of coils is connected in series in a negatively coupled manner between a second input terminal and a second output terminal, the connection point between each pair of coils and each end of each coil opposite to the connection point being connected across to the corresponding point of the corresponding pair of coils, with capacitors therebetween, and the coils being wound on the same bobbin in such a manner that each pair of negatively coupled coils is formed in adjacent winding portions.
    Type: Grant
    Filed: May 13, 1994
    Date of Patent: August 29, 1995
    Assignee: Toko Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Nakayama, Ikuo Ochiai, Michiya Nakazawa
  • Patent number: 5440225
    Abstract: The invention pertains to a core for a coil device of a switching power supply which can avoid accidental breakage of the portion where the core cross-sectional area narrows. When one core segment is rotated 180 degrees about its center axis in the long direction of one leg 2, the projection 51 of one core segment 1A and the projection 52 of another core segment 1B, and the indentation 61 of the one core segment 1A and the indentation 62 of the other core segment 1B are aligned so as to mutually overlap. The characteristics of a coil device can be controlled by the contacting surface areas of both core segment projections or by spacing between the projections. Since the cross-sectional area of each core projection can be made wider, accidental breakage of the core projection does not occur easily.
    Type: Grant
    Filed: February 24, 1993
    Date of Patent: August 8, 1995
    Assignee: Toko Kabushiki Kaisha
    Inventor: Hideki Kojima