Patents Assigned to Toko Kabushiki Kaisha
  • Patent number: 4725768
    Abstract: An inductor and a switching means are combined in such a way that the storage of the energy in the inductor and the release of the energy stored in the inductor are repeatedly carried out, whereby the released energy is rectified and smoothed to obtain a DC output. The inductor is fabricated from a conductor comprising a wire coated with a thin magnetic film in such a way that the easy axis of said thin magnetic film is extended substantially in the longitudinal direction of the wire. Furthermore, a plurality of inductor and switching element pairs are provided and are switched in different phases, respectively.
    Type: Grant
    Filed: November 6, 1986
    Date of Patent: February 16, 1988
    Assignee: Toko Kabushiki Kaisha
    Inventor: Shigetoshi Watanabe
  • Patent number: 4725805
    Abstract: The construction of cores in an electric-current-controlled type variable inductor used in radio receivers is disclosed. The inductors have three or four cores. In the case of the variable inductors of the type having three cores, the winding portion of a first core is formed with a hollow portion, a second core is inserted into the hollow portion in such a way that the winding portion of the second core can be maintained in parallel with the winding portion of the first core, the first core is inserted into a pot-shaped third core in such a way that the winding portion of the first core can be maintained perpendicular to the bottom of the third core and the magnetic path established by a control coil mounted on the first core and the magnetic path established by a tuning coil mounted on the second core are superimposed one upon another around the winding portion of the second core.
    Type: Grant
    Filed: December 19, 1986
    Date of Patent: February 16, 1988
    Assignee: Toko Kabushiki Kaisha
    Inventor: Noboru Takada
  • Patent number: 4630013
    Abstract: An inductor is configured so as to wind a control coil on one of winding portions of first and second cores and to wind a tuning coil on the other winding portion to insert the second core into a hollow portion provided inside the first core, thereafter accommodating the first and second cores thus assembled into a pot-shaped core, wherein both winding portions of the first and second cores are arranged in parallel with each other and the winding portion of the first core is arranged perpendicular to a bottom surface of the pot-shaped third core. The control coil and the tuning coil are arranged so that their magnetic paths overlap with each other at the winding portion of the second core, thereby to control a current flowing through the control coil when energized to vary effective permeability of the core on which the tuning coil is wound, thus producing changes in inductance.
    Type: Grant
    Filed: January 23, 1985
    Date of Patent: December 16, 1986
    Assignee: Toko Kabushiki Kaisha
    Inventor: Noboru Takada
  • Patent number: 4575643
    Abstract: In a full-wave rectifier circuit, a sinusoidal signal is applied to a differential amplifier, first and second current mirror circuits obtain outputs from the differential amplifier which are opposite in phase to each other. Outputs of the first and second current mirror circuits are applied respectively to the input and output sides of a third mirror circuit and other outputs of the first and second current mirror circuits are applied respectively to the input and output sides of a fourth mirror circuit. The connecting point of the first and fourth current mirror circuits is connected to the base of a first emitter-follower-connected transistor, while the connecting point of the second and third current mirror circuits is connected to the base of a second emitter-follower-connected transistor. The connecting points are connected to a current source circuit. The first and second emitter-follower-connected transistors have their emitters connected together, to provide a full-wave-rectified output.
    Type: Grant
    Filed: April 20, 1983
    Date of Patent: March 11, 1986
    Assignee: Toko Kabushiki Kaisha
    Inventor: Koichi Sakai
  • Patent number: 4546274
    Abstract: In a non-linear integration circuit, an audio sine wave signal is processed by a rectifier circuit and a smoothing circuit so that a DC output is obtained according to the amplitude of the signal. A hybrid diode which is similar in voltage-current characteristic to a silicon diode and is referred to as an "analogous diode" is connected to the smoothing circuit, so that a DC output is obtained by means of the analogous diode in response to an abrupt change in amplitude of the input signal. The signal can be processed on a low supply voltage, and employment of the analogous diode provides an output which is similar to that which is provided by the use of a silicon diode.
    Type: Grant
    Filed: April 6, 1983
    Date of Patent: October 8, 1985
    Assignee: Toko Kabushiki Kaisha
    Inventor: Koichi Sakai
  • Patent number: 4442397
    Abstract: A DC power circuit comprises a first control means which is provided between a DC power source and a pair of output terminals for controlling voltages as well as currents supplied to a load from the DC power source. An output current detector detects the output current from the DC power source, and provides a first control potential proportional to the detected current. On the other hand, an output voltage detector is coupled between the pair of output terminals for detecting the voltage applied to the load, and provides a second control potential proportional to the detected voltage. A second control means selectively assumes one of two stable states in response to external control. A third control means receives the first and second control potentials, and responds to the state of the second control means for controlling the first control means based on the received two control potentials.
    Type: Grant
    Filed: January 25, 1982
    Date of Patent: April 10, 1984
    Assignee: Toko Kabushiki Kaisha
    Inventors: Hiroichi Ishikawa, Toshio Mikami
  • Patent number: 4430595
    Abstract: In a piezo-electric push button switch, a flexible printed circuit board is secured to terminals which are embedded in the housing, and the piezo-electric plate is supported by the flexible printed circuit board in such a manner that it is floated from the housing, whereby external impact or vibration is decreased, and in which an integrated circuit consisting of a resistor and a capacitor is incorporated in the switch body, to eliminate harmonics.
    Type: Grant
    Filed: August 4, 1982
    Date of Patent: February 7, 1984
    Assignee: Toko Kabushiki Kaisha
    Inventors: Hiroyuki Nakasone, Takayasu Sakamoto
  • Patent number: 4420664
    Abstract: A display type push button having a push button body with a display window on the front end, a passage formed therein, and an elastic display plate laid in the passage in such a manner as to reciprocate along the passage to display the "on" and "off" states of a switch coupled to the push button, comprises a mechanism which makes the movement of the display plate larger than the stroke of the operating rod of the switch, whereby the area of the display plate appearing in the display window is large enough to clearly detect the operations of the switch.
    Type: Grant
    Filed: January 21, 1983
    Date of Patent: December 13, 1983
    Assignee: Toko Kabushiki Kaisha
    Inventor: Toshihiro Takahashi
  • Patent number: 4356510
    Abstract: In a television sound multiplex broadcast signal receiving device, an AM detector outputs a control signal which modulates a 55.1 KHz sub-carrier signal; a reference signal inputted to a counter circuit is controlled at time intervals of the control signal; the reference signal is counted, and a stereophonic broadcast, a different program broadcast and a monaural broadcast are discriminated with the aid of an information signal outputted by the counter circuit and the 55.1 KHz sub-carrier signal.
    Type: Grant
    Filed: December 13, 1979
    Date of Patent: October 26, 1982
    Assignee: Toko Kabushiki Kaisha
    Inventor: Koichi Nakayama
  • Patent number: 4320534
    Abstract: In a loudness control circuit, the output DC voltage of a first variable DC voltage source is applied to a first amplifier for increasing volume to vary the gain of the latter, and to first and second differential amplifiers, while the output DC voltages of second and third variable DC sources are applied to the first and second differential amplifiers to provide difference voltages, which the applied to second and third tone control amplifiers which amplify the low and high frequency ranges, respectively, to control the gains thereof, so that the components of the sound in the low and high frequency ranges are boosted, thus achieving the weighting.
    Type: Grant
    Filed: October 23, 1980
    Date of Patent: March 16, 1982
    Assignee: Toko Kabushiki Kaisha
    Inventors: Koichi Sakai, Satoru Horie
  • Patent number: 4219781
    Abstract: A gain control transistor amplifier circuit employing as a double balance type cascade amplifier comprises two differential amplification stages. Current mirror circuits are provided for the respective stages for applying the outputs of these stages to a constant current source circuit. A resistor and a DC stabilization voltage source are connected to the output stage of the latter current mirror circuit, thereby obtaining an output which is stable irrespective of the gain control operation thereof.
    Type: Grant
    Filed: November 14, 1978
    Date of Patent: August 26, 1980
    Assignee: Toko Kabushiki Kaisha
    Inventor: Toyoziro Naokawa
  • Patent number: 4186285
    Abstract: In a multiple pushbutton switch assembly, a flexible restoring tape has both ends affixed to the casing at both ends with a predetermined slack in such a manner that it is tensioned by depressing any one of the sliders which, when depressed, are locked alternately at a switch-on position and a switch-off position by elastic springs. The amount of the predetermined slack of the restoring tape corresponds to the amount of depression of each slider, so that when one slider is depressed, another one which has been depressed is restored or returned to its initial position, and only one slider is allowed to be depressed at any one time.
    Type: Grant
    Filed: April 18, 1978
    Date of Patent: January 29, 1980
    Assignee: Toko Kabushiki Kaisha
    Inventor: Yoshito Tanaka