Abstract: Embodiments include apparatuses and methods related to vertically stacked varactors. Specifically two varactors may be constructed of vertically stacked layers including an anode layer, a contact layer, and a varactor layer. The two varactors may share one or more layers in common. In some embodiments the two varactors may share the anode layer in common, while in other embodiments the two varactors may share the contact layer in common.

Abstract: A SAW filter is fabricated with input and output transducers on a piezoelectric substrate and an epoxy based photo-definable acoustic absorber on the substrate for suppressing unwanted acoustic waves. The photo-definable acoustic absorber has a viscosity in a range from about 50 centistokes to 12000 centistokes and a thickness from about 10 microns to 120 microns. One acoustic absorber includes an SU-8 family member epoxy.

Abstract: Embodiments provide a variable-impedance transmission line. In some embodiments, a variable-impedance transmission line may include one or more conductors that may be isolated or configured as parts of forward or return paths based on states of switches of the variable-impedance transmission line. Other embodiments may be described and claimed.

Abstract: Embodiments include an apparatus, system, and method related to a switch circuit. Specifically, embodiments relate to a low noise amplifier (LNA) drain switch circuit that includes a first field effect transistor (FET) where the drain contact of the first FET is coupled with a gate contact of a second FET. The drain contact of the second FET may also be coupled with the gate of the second FET through a resistor. The source contact of the second FET may be coupled with a diode which may be coupled with an LNA.

Abstract: Embodiments provide a switching circuit including a transistor and a bias circuit. The transistor may transition between an off state and an on state responsive to a control signal received at a control terminal. The bias circuit may be coupled between the control terminal and a gate terminal of the transistor. The bias circuit may include a gate resistor coupled between the gate terminal and the control terminal. The bias circuit may further include one or more diodes coupled in parallel with the gate resistor between the gate terminal and the control terminal to allow leakage current to pass from the gate terminal through the one or more diodes. In some embodiments, the bias circuit may include a switch coupled with the one or more diodes to selectively couple the one or more diodes in parallel with the gate resistor when the transistor is off.

Abstract: Embodiments of the present disclosure describe techniques and configurations for an enclosure that can be used for channel isolation in a multi-channel modulator driver such as, for example, an optical modulator driver. A system may include a substrate, a multi-channel modulator driver mounted on the substrate, and an enclosure mounted on the substrate to cover the multi-channel modulator driver, the enclosure having a wall that is disposed between first components of the multi-channel modulator driver associated with a first channel and second components of the multi-channel modulator driver associated with a second channel, the wall being composed of an electrically conductive material. Other embodiments may also be described and/or claimed.

Abstract: Embodiments include an apparatus, system, and method related to a switching circuit. In some embodiments, the switching circuit may include first switch including an n-channel field effect transistor (FET) in the signal path. The switching circuit may further include a second switch in shunt to the first switch. The second switch may include a discharge transistor to provide a discharge path for a body of a switch transistor. Other embodiments may be described and claimed.

Abstract: Various embodiments provide an electrostatic discharge (ESD) protection device. The ESD protection device may include a subcollector, collector, base, and emitter formed in layers on top of one another. The emitter may include a different semiconductor than a semiconductor included in the base to form a heterojunction. The ESD protection device may include a collector contact disposed on the subcollector and an emitter contact disposed on the emitter. The ESD protection device may be a two-terminal device, with no conductive base contact coupled with the base.

Abstract: Various embodiments provide an electrostatic discharge (ESD) protection device. The ESD protection device may include a subcollector, collector, base, and emitter formed in layers on top of one another. The emitter may include a different semiconductor than a semiconductor included in the base to form a heterojunction. The ESD protection device may include a collector contact disposed on the subcollector and an emitter contact disposed on the emitter. The ESD protection device may be a two-terminal device, with no conductive base contact coupled with the base.

Abstract: Embodiments of the present disclosure describe apparatuses, methods, and systems of an integrated circuit (IC) device. The IC device includes a diffusion control layer as part of an emitter epitaxial structure. The IC device may utilize a common metallization scheme to simultaneously form an emitter contact and a base contact. Other embodiments may also be described and/or claimed.

Abstract: Embodiments include high electron mobility transistors (HEMTs) comprising a substrate and a barrier layer including a doped component. The doped component may be a germanium doped layer or a germanium doped pulse. Other embodiments may include methods for fabricating such a HEMT.

Abstract: Embodiments of the present disclosure describe apparatuses, methods, and systems of front end module (FEM) having a feedback path that includes a passive attenuation network. The passive attenuation network may provide a feedback signal to a receive output port of the FEM that may be used as a basis for predistortion. Other embodiments may also be described and/or claimed.

Abstract: A radio frequency (RF) power amplifier (PA) may include a first transistor and a second transistor. A first power cell may be coupled with the first transistor, and a second power cell may be coupled with the second transistor. In embodiments, the first transistor may be scaled to operate at a first current density, while the second transistor may be scaled to operate at a second current density.

Abstract: Embodiments of the present disclosure describe structural configurations of an integrated circuit (IC) device such as a high electron mobility transistor (HEMT) switch device and method of fabrication. The IC device includes a buffer layer formed on a substrate, a channel layer formed on the buffer layer to provide a pathway for current flow in a transistor device, a spacer layer formed on the channel layer, a barrier layer formed on the spacer layer, the barrier layer including aluminum (Al), nitrogen (N), and at least one of indium (In) or gallium (Ga), a gate dielectric directly coupled with the spacer layer or the channel layer, and a gate formed on the gate dielectric, the gate being directly coupled with the gate dielectric. Other embodiments may also be described and/or claimed.

Abstract: Embodiments of the present disclosure describe apparatuses, methods, and systems of an integrated circuit (IC) device. The IC device may include a buffer layer disposed on a substrate, the buffer layer including gallium (Ga) and nitrogen (N) and a barrier layer disposed on the buffer layer, the barrier layer including aluminum (Al) and nitrogen (N). The IC device may further include a gate terminal and a gate dielectric layer disposed between the gate terminal and the barrier layer and/or between the gate terminal and the buffer layer. In various embodiments, the gate dielectric layer may include a fluoride- or chloride-based compound, such as calcium fluoride (CaF2).

Abstract: Disclosed embodiments include a direct current to direct current (DC-DC) converter including one or more charge pumps and configured to receive an input voltage and a first clock signal and a second clock signal. The first clock signal and second clock signal may be non-overlapping, and each may alternate between a ground voltage and a first voltage. The DC-DC converter may be configured to produce an output voltage over the clock cycle that has a negative polarity with a magnitude substantially equal to a sum of magnitudes of the input voltage and an integer multiple of the first voltage, the integer multiple being equal to a number of the one or more charge pumps in the DC-DC converter.

Abstract: A laminate substrate may include a slug positioned within a cavity of a laminate core. The laminate substrate may have routing layers on either side of the laminate core, at least one of which is coplanar with an outer side of the slug. A capping layer may then be applied to the laminate substrate which is directly coupled with the slug and the routing layer. In embodiments, a dielectric layer may be coupled with the capping layer, and an additional routing layer may be coupled with the dielectric layer. Therefore, the routing layer may be an “inner” routing layer that is coplanar with, and coupled with, the slug.

Abstract: Embodiments of apparatuses, systems and methods relating to temperature compensated bulk acoustic wave devices. In some embodiments, temperature compensated bulk acoustic wave devices are described with an over-moded reflector layer.

Abstract: Embodiments of the present disclosure describe electrostatic discharge (ESD) circuitry and associated techniques and configurations. In one embodiment, ESD circuitry includes a first node coupled with a supply voltage node and a ground node, a first transistor coupled with the first node and the supply voltage node, a second transistor coupled with the first node and the ground node, a second node coupled with the first transistor and the second transistor, a third transistor coupled with the second node and a third node coupled with the third transistor, wherein a first time period to charge the first node is less than a second time period to discharge the third node. Other embodiments may be described and/or claimed.

Abstract: Various embodiments may provide a monolithic transformer for a radio frequency (RF) power amplifier module, such as a microwave frequency power amplifier module. The transformer may include a plurality of pairs of edge-coupled transmission lines, with individual pairs including first and second edge-coupled transmission lines. The first transmission lines may include first ends coupled with one another and second ends coupled with an input terminal of the transformer. The second transmission lines may include first ends coupled with the input terminal and second ends coupled with an output terminal of the transformer. The transformer may pass a communication signal from the input terminal to the output terminal, and provide a first impedance at the input terminal and a second impedance at the output terminal. The second impedance may be higher than the first impedance (e.g., by a factor of four).