Patents Assigned to Viasystems Group, Inc.
-
Patent number: 7364366Abstract: A guide insert having a guide member having an arcuate portion for bending an optical fiber of a backplane, and a circuit board assembly comprising the backplane and a daughterboard wherein the daughterboard is operatively connected to the backplane via the guide insert.Type: GrantFiled: February 1, 2006Date of Patent: April 29, 2008Assignee: Viasystems Group, Inc.Inventor: Joseph A. A. M. Tourne
-
Patent number: 7316461Abstract: A cabinet for supporting electronic equipment. The cabinet has a rigid internal assembly structure and a cladding kit. The internal assembly defines a cavity into which the electronic equipment can be fitted. The internal assembly structure has height, a plurality of posts, and at least two panels. Each of the panels has a plurality of recesses formed therein. At least one post includes mounting tabs positionable within the recesses formed within the panels for precisely locating the post with respect to the panels. The cladding kit has at least two post trims connected to the internal assembly structure and at least one panel connected to the post trims. Each of the post trims has a body member, a first connector and a second connector. The first connector and the second connector of the post trim cooperate to connect the post trim to the posts of the internal assembly structure.Type: GrantFiled: August 7, 2006Date of Patent: January 8, 2008Assignee: Viasystems Group, Inc.Inventors: Brendan Wyatt, Barry Kiernan
-
Patent number: 7178994Abstract: A circuit board uses both electrical and optical connectors to carry signals in both electrical and light form. The optical connector employs redundant alignment features to provide for reliable connectivity between plug in boards and the electro-optic back plane. A process is of forming the back plane and other multilevel circuit boards so as to embed optical connectors is disclosed.Type: GrantFiled: December 19, 2005Date of Patent: February 20, 2007Assignee: Viasystems Group, Inc.Inventor: Joseph A. A. M. Tourné
-
Publication number: 20060278430Abstract: A method for manufacturing a mid-plane. a multi-layer board having a connection assembly is provided and a layer with a channel formed therein to define a perimeter of a connector area is provided. The layer is bonded to the multi-layer board such that the connector area overlaps the part of the connection assembly of the multi-layer board. At least a portion of the connector area in the layer is removed to expose the connection assembly of the multi-layer board. A rigid multilayer is also disclosed. The rigid multilayer includes a multi-layer board and a layer. The multi-layer board has a connection assembly. The layer has a channel formed therein to define a perimeter of a connector area. The layer is bonded to the multi-layer board such that the connector area overlaps the connection assembly of the multi-layer board. The connector area can then be removed such as by depth controlled routing.Type: ApplicationFiled: July 8, 2004Publication date: December 14, 2006Applicant: VIASYSTEMS GROUP, INC.Inventor: Gerald Hermkins
-
Patent number: 7096555Abstract: A multilayer circuit board is provided with at least one signal layer, at least one feedback layer, and at least one dielectric layer positioned between the signal layer and the feedback layer. The signal layer is connected to at least one plated hole. The feedback layer has a contact pad, which is positioned adjacent to the plated hole, but is electrically isolated from the plated hole. The contact pad is connected to a measurement unit. The dielectric layer is positioned between the signal layer and the contact pad of the feedback layer. A portion of the plated hole forms a stub portion, which extends a distance away from the signal layer and typically extends a distance away from the contact pad of the feedback layer. To remove the stub portion, a hole is bored or routed into the multilayer circuit board until electrical feedback is received by the measurement unit upon contact of a portion of the boring device with the contact pad.Type: GrantFiled: September 17, 2004Date of Patent: August 29, 2006Assignee: Viasystems Group, Inc.Inventors: Joseph A. A. M. Tourne, Patrick P. P. Lebens
-
Patent number: 7086707Abstract: A cabinet for supporting electronic equipment. The cabinet has a rigid internal assembly structure and a cladding kit. The internal assembly defines a cavity into which the electronic equipment can be fitted. The internal assembly structure has height, a plurality of posts, and at least two panels. Each of the panels has a plurality of recesses formed therein. At least one post includes mounting tabs positionable within the recesses formed within the panels for precisely locating the post with respect to the panels. The cladding kit has at least two post trims connected to the internal assembly structure and at least one panel connected to the post trims. Each of the post trims has a body member, a first connector and a second connector. The first connector and the second connector of the post trim cooperate to connect the post trim to the posts of the internal assembly structure.Type: GrantFiled: May 23, 2003Date of Patent: August 8, 2006Assignee: Viasystems Group, Inc.Inventors: Brendan Wyatt, Barry Kiernan
-
Patent number: 7024086Abstract: Polymers of differing refraction indices are embedded within a PCB to provide optical connectivity of the PCB with other circuit boards via an optic backplane. The creation of islands of polymer material of refractive index n1 completely surrounded by polymer material with refractive index n2 where n1 has a higher index than n2 allows the islands of n1 indexed polymer to serve as optical waveguides. A process of forming a multi-layered PCB with the optical waveguide islands using successive laminations and using laser ablation to write the optical connection scheme is taught. Further, the use of uniquely marked targets in a copper layer to align the optical waveguides in production is also taught. Additionally, the use of clearing polymer materials and reinforcing polymer voids with lamination to allow a simple, high tolerance insertion of through-holes is taught.Type: GrantFiled: December 17, 2004Date of Patent: April 4, 2006Assignee: Viasystems Group, Inc.Inventor: Joseph A. A. M. Tourné
-
Patent number: 6976793Abstract: An optical connector for use in multilayer electro-optic circuit boards. An electro-optical back plane circuit board uses both electrical and optical connectors to carry signals in both electrical and light form. The optical connector employs redundant alignment features to provide for reliable connectivity between plug in boards and the electro-optic back plane. A process is of forming the back plane and other multilevel circuit boards so as to embed optical connectors is disclosed.Type: GrantFiled: April 16, 2004Date of Patent: December 20, 2005Assignee: Viasystems Group, Inc.Inventor: Joseph A. A. M. Tourné
-
Patent number: 6974036Abstract: A post for a rack. The post is formed of a sheet constructed of a malleable, bendable material. The sheet has a first end and an opposed second end. The first end forms a lower portion of the post and the opposed second end forms an upper portion of the post. The sheet has a first side and an opposed second side with the first and second sides extending generally between the first end and the second end of the sheet. The sheet is formed into a folded box section configuration wherein at least a portion of the first side overlaps a portion of the second side to provide an overlapping portion. The post can be used for forming a European Telecommunications Standards Institute conforming rack.Type: GrantFiled: March 31, 2003Date of Patent: December 13, 2005Assignee: Viasystems Group, Inc.Inventors: Brendan Wyatt, Barry Kiernan
-
Patent number: 6848840Abstract: An optical connector for use in multilayer electro-optic circuit boards. An electro-optical back plane circuit board uses both electrical and optical connectors to carry signals in both electrical and light form. The optical connector employs redundant alignment features to provide for reliable connectivity between plug in boards and the electro-optic back plane. A process is of forming the back plane and other multilevel circuit boards so as to embed optical connectors is disclosed.Type: GrantFiled: October 30, 2001Date of Patent: February 1, 2005Assignee: Viasystems Group, Inc.Inventor: Joseph A. A. M. Tourne
-
Patent number: 6834131Abstract: Polymers of differing refraction indices are embedded within a PCB to provide optical connectivity of the PCB with other circuit boards via an optic backplane. The creation of islands of polymer material of refractive index n1 completely surrounded by polymer material with refractive index n2 where n1 has a higher index than n2 allows the islands of n1 indexed polymer to serve as optical waveguides. A process of forming a multi-layered PCB with the optical waveguide islands using successive laminations and using laser ablation to write the optical connection scheme is taught. Further, the use of uniquely marked targets in a copper layer to align the optical waveguides in production is also taught. Additionally, the use of clearing polymer materials and reinforcing polymer voids with prepreg lamination to allow a simple, high tolerance insertion of through-holes is taught.Type: GrantFiled: June 25, 2002Date of Patent: December 21, 2004Assignee: Viasystems Group, Inc.Inventor: Joseph A. A. M. Tourné
-
Patent number: 6818115Abstract: The present invention includes an electrolytic plating system with an elecrolytic plating bath, means for positioning the printed circuit boards in the bath, and means to alternately generate a laminar flow of electrolyte on each side of the printed circuit boards. A preferred means to alternately generate a laminar flow of electolyte comprises a floating shield with a venturi-shaped partition and an aligned partition below the printed circuit boards, and operating a plurality of eductors below the floating shield. The means to alternately generate a laminar flow of electolyte can further comprise a transport mechanism that moves the floating shield and its partitions from side to side relative to the eductors or a mechanism to move the eductors. The plating can be also be improved by using a vibrator and a spring-mounting system that prevents vibration energy being absorbed by fixed portions of the plating system.Type: GrantFiled: October 18, 2002Date of Patent: November 16, 2004Assignee: Viasystems Group, Inc.Inventors: Hein van Kempen, Daniel J. Weber
-
Patent number: 6782181Abstract: A right angle bend mount for bending an optical fiber into the plane of a circuit board. The mount includes a base and a cover that is pivotably connected to the base by a hinge. A clamp is formed by a first pair of opposed surfaces of the base and cover adjacent the hinge. This clamp fixedly grips a ferrule portion of the optical fiber when the base and the cover are closed together. A second pair of opposed surfaces of the base and cover forms another clamp. This clamp fixedly grips a non-ferrule portion of the optical fiber when the base and the cover are closed together. A bent portion of the optical fiber between the ferrule portion and the gripped non-ferrule portion is disposed in a non-gripping gap between the base and the cover when the base and the cover are closed together.Type: GrantFiled: July 14, 2003Date of Patent: August 24, 2004Assignee: Viasystems Group, Inc.Inventor: Joseph A. A. M. Tourne
-
Patent number: 6713685Abstract: Non-circular vias and methods of cutting away material in a printed circuit board (PCB) so as to form non-circular vias. Laser ablation or plasma ablation is used to remove PCB material about a centerline. This type of material removal allows lateral movement to effect non-circular patterns. Exemplary shapes are convoluted circle vias, square vias, extended/elongated vias, and trench vias. The trench vias may be micro milled to form a coaxialised structure that provides noise suppression and EMI protection, and are elongated to be even greater than three times the diameter of a circular micro-via.Type: GrantFiled: May 10, 2001Date of Patent: March 30, 2004Assignee: Viasystems Group, Inc.Inventor: Martin A. Cotton
-
Patent number: 6651324Abstract: A process of manufacturing printed circuit boards which is useful in the formation of printed circuit boards containing both areas of thick conductive traces and areas of fine resolution conductors in a single conductive layer, and printed circuit boards formed from such a process. A conductive core is first fabricated containing areas of thick conductors on a relatively thin conductive base. The conductive core is then bonded to a sublayer such as “prepreg” with the thick conductive areas adjacent to the sublayer in order to form a relatively flat laminate. Proper bonding typically requires the use of high resin “prepreg” sublayer. In the alternative, an additional inner layer of pure resin cab be inserted between the conductive core and the insulating sublayer prior to bonding. After bonding, the conductive surface of the laminate is formed into printed conductor traces by methods known in the art.Type: GrantFiled: November 6, 2000Date of Patent: November 25, 2003Assignee: Viasystems Group, Inc.Inventors: Giuseppe Pedretti, Ken Varley
-
Patent number: 6594435Abstract: A right angle bend mount for bending an optical fiber into the plane of a circuit board. The mount includes a base and a cover that is pivotably connected to the base by a hinge. A clamp is formed by a first pair of opposed surfaces of the base and cover adjacent the hinge. This clamp fixedly grips a ferrule portion of the optical fiber when the base and the cover are closed together. A second pair of opposed surfaces of the base and cover forms another clamp. This clamp fixedly grips a non-ferrule portion of the optical fiber when the base and the cover are closed together. A bent portion of the optical fiber between the ferrule portion and the gripped non-ferrule portion is disposed in a non-gripping gap between the base and the cover when the base and the cover are closed together.Type: GrantFiled: June 25, 2002Date of Patent: July 15, 2003Assignee: Viasystems Group, Inc.Inventor: Joseph A. A. M. Tourné
-
Patent number: 6581202Abstract: Targets are inserted throughout the layout of a PCB. Post manufacture measurement of the targets are compared to pre-manufacture positions so as to calculate a non-linear regression analysis best fit model. This model is used to predict a feature's location upon or within a PCB given the feature's position on the layout. The non-linear regression analysis results in a set of x and y polynomial equations. These polynomial equations allows for a linear compensation to be applied to the feature position on a layout so as to minimize misregistration of features in the manufacture of PCBs. Models of the features' post production positioning is made before and after linear compensations are made to the pre-manufacture positioning of the features. Graphical presentations using wire frame diagrams and color coded diagrams help identify those areas of the panel that are projected to be in and out of tolerance relative to the specifications.Type: GrantFiled: November 10, 2000Date of Patent: June 17, 2003Assignee: Viasystems Group, Inc.Inventors: Joseph A. A. M. Tourné, Steve Jones, Andrew Kelley