Abstract: A method for manufacturing a semiconductor device having a Schottky junction which comprises a process for burying first and second regions of a second conductivity type spaced from each other in a semiconductor body of a first conductivity type, a process for locally disposing a first interconnection layer made of a metal on a surface region of the semiconductor body facing the first region, a process for forming an insulating film on the surface of the first interconnection layer by subjecting the surface to anodic oxidation, a process for ion-implanting an impurity of the second conductivity type into the semiconductor body except a portion thereof under the first interconnection layer at such an energy level that the impurity may reach the first and second regions, a process for activating the ion-implanted layer by applying a laser beam thereto, and a process for forming a second interconnection layer connected with the activated layer by covering the whole surface of the semiconductor body with a metal

Abstract: A method for forming semiconductor memory devices each including either an MNOS-type or MOS-type transistor and an MNOS-type capacitor. Upon a silicon substrate there is formed a thick layer of oxide which defines the individual cells and provides separation therebetween. Exposed portions of the substrate are thermally oxidized to form a layer of thermal oxide upon which is subsequently deposited a layer of silicon nitride and a layer of polycrystalline silicon. The polycrystalline silicon is then masked and portions there are removed through apertures and the mask. The substrate is then irradiated at a non-perpendicular angle through the apertures in the mask and predetermined remaining portions of the layer of thermal oxide are removed. Exposed portions of the substrate at this point are diffused with an impurity of the opposite conductivity type to the substrate.

Abstract: A method for producing semiconductor memory devices each including an MNOS-type transistor and an MNOS-type capacitor or an MOS-type transistor and an MNOS-type capacitor. A thick oxide layer is formed in predetermined patterns on the surface of the substrate so as to separate the memory cell areas. The surface of the wafer is then oxidized to form a thin oxide layer on which a layer of silicon nitride is deposited and over which a layer of polycrystalline silicon is formed. Portions of the layer of silicon nitride and layer of polycrystalline silicon are etched away in preferred patterns as are second portions of the layer of polycrystalline silicon to partially expose the layer of silicon nitride. Portions of the thin oxide layer are removed in areas where the second portions of the layer of polycrystalline silicon are etched away to thereby expose a first portion of the surface of the wafer. Following the diffusion of impurities into the wafer, a layer of thermal oxide is formed.

Abstract: A method for manufacturing semiconductor devices having a multi-layer wiring interconnection structure wherein a first interconnection wiring metal layer is formed on a semiconductor substrate followed by the formation of layers of silicon nitride on portions wherein patterns are to be placed and forming a layer of silicon oxide over the layer of silicon nitride. Selective portions of the silicon oxide layer are removed by lightly etching the layer to form recesses around the wiring portions of the metal layer. The silicon nitride layer is then removed and an insulating layer is formed on the surface from which the silicon nitride layer was removed. Through-holes are formed in predetermined portions of the insulating layer through which contact is made to a second wiring metal layer disposed over the insulating layer.

Abstract: For test, a sequential circuit operable in a normal and a shift mode is logically divided into a plurality of partitions, each comprising a first and a second sequence of registers. A testing device specifies the first sequence in each partition, one partition after another, and supplies the registers of the specified first sequence, in the shift mode, with a test pattern prescribed for the specified partition. A pattern resulting from the test pattern is supplied in the normal mode to the registers of the second sequence in the specified partition and shifted out thereof subsequently in the shift mode to be compared with a correct or reference pattern predetermined for the test pattern for detection of a fault. For location of the fault in the specified partition, the test and the shifted-out patterns are combined into a combined pattern, which is supplied to the registers of the first and the second sequences in the normal mode following the shift mode in which the fault is detected.

Abstract: A silicon single crystal wafer is subjected to two-stage heat treatment. In the first-stage it is heated at a temperature within the range of between 500.degree. C. and 1,000.degree. C. Subsequently the thus heated wafer is heated at a temperature higher than that at the first stage. Thus, a nondefective zone is formed in the surface region of the wafer, and the interior zone of the wafer becomes rich in micro defects capable of gettering impurities such as heavy metals.

Abstract: A semiconductor resistor comprises a semiconductor resistor layer along at least an area of an internal side surface of a groove formed in a predetermined configuration, such as a figure of .pi., in a semiconductor block of a conductivity type opposite to that of the resistor layer. Semiconductor contact layers are formed preferably simultaneously with the resistor layer in electrical contact therewith on a principal surface of the block, with which surface the internal side surface may or may not form the right angle. The block may or may not be supported by a substrate, such as a sapphire, a spinel, or a like insulator single crystal. The groove may have a bottom in the block or the substrate. When the bottom is either in the block or on a semiconductor bulk serving as the substrate, a P-N junction should be formed along the extension of the bottom.

Abstract: Disclosed is a method for manufacturing an integrated circuit device which comprises the steps of preparing a silicon substrate having an isolated first region of a first conductivity type, selectively forming on the first region a polycrystalline silicon layer containing an impurity of the first conductivity type, implanting the first region including the polycrystalline silicon layer with an ion of an impurity of a second conductivity type having higher diffusion coefficient than that of the impurity of the first conductivity type, and heating the substrate, whereby the implanted impurity of the second conductivity type is diffused into the first region to form a second region of the second conductivity type and the impurity of the first conductivity type in the polycrystalline silicon layer is diffused into the second region to form a third region of the first conductivity type.

Abstract: An optical apparatus for measuring irregularities on the mirror surface of, for example, a silicon wafer used to provide a semiconductor integrated circuit. Irradiates on the mirror surface light fluxes arranged in a special form, for example, in the lattice form. By observing the pattern of light fluxes reflected from said mirror surface, one can measure the surface irregularities. A light flux issued from a light source is divided by a photomask or diffraction grating into first light fluxes irradiated all over the mirror surface and second light fluxes surrounding the respective first light fluxes in the continuous or discontinuous annular form, thereby ensuring the simultaneous measurement of the distribution of extensive irregularities over the entire mirror surface by the first light fluxes and the distribution of local irregularities on said mirror surface by the second light fluxes.

Abstract: A method of producing a semiconductor device comprises a step of forming a field isolating oxide layer from an amorphous silicon layer by oxidation at a relatively low temperature. Prior to the oxidizing treatment, a portion of the amorphous silicon layer is recrystallized into a single-crystalline silicon layer by laser irradiation.

Abstract: A method of manufacturing a semiconductor device which has a thick insulating layer on a region for isolating semiconductor circuit elements from one another on a semiconductor substrate. This region of the substrate is selectively etched by using an insulating layer to leave the unetched part of the substrate in a mesa like shape, then, an anti-oxidation masking layer is formed on the sides of the insulating layer and the sides of the mesa shaped part and, after that, the thick insulating layer is formed by an oxidation treatment.

Abstract: A method of manufacturing a semiconductor device comprises the steps of forming an interconnection electrode made of a refractory metal or a silicide of the metal on an insulating film formed on a semiconductor substrate with necessary elements already formed, forming a silicon nitride film on the interconnection electrode, and forming a silicon oxide film on the silicon nitride film, thereby preventing the elements from being deteriorated.

Abstract: Disclosure is a semiconductor memory device comprising a memory cell array having a plurality of memory cells arranged in a matrix fashion each formed of a field effect transistor and a capacitor, a plurality of word lines each connected commonly to the gates of those field effect transistors which are arranged on an identical column of the memory cell array, a plurality of digit lines each connected commonly to the drains of those field effect transistors which are arranged on an identical row of the memory cell array, and a plurality of decoder circuits for selectively activating the word lines. In the memory device, the decoder circuit produces an output signal to drive the word line to a voltage level higher than a voltage level appearing on the activated digit line.

Abstract: A semiconductor device is manufactured by covering a semiconductor substrate of a predetermined conductivity type with a polycrystal layer of a semiconductor material. Selected portions of the polycrystal layer are oxidized into an insulating material during heat treatment. Remaining portions of the polycrystal layer which are left unoxidized act as conductive portions. On manufacturing a bipolar transistor, ion implantation is carried out in a predetermined solid angle to introduce an impurity of an opposite conductivity selectively in a preselected one of the remaining portions. During the heat treatment, the impurity diffuses into the substrate only from the preselected portion to form a PN junction in the substrate. For fabricating an MOS transistor, an oxide film is preliminarily formed on the substrate selectively on an area on which a predetermined one of the remaining polycrystal layer portions is to be formed.

Abstract: A method of manufacturing an aperture stop with a rectangular aperture for an electron beam exposure device, comprising the steps of: preparing a single-crystal silicon substrate with one side having a (100) face; providing a mask on said side of the substrate; selectively etching the substrate through the mask from said side to form a projecting portion of rectangular cross section by anisotropic etching; forming an aperture layer by covering said one side of the etched substrate with a high-melting-point metal having good electric conductivity, thereby surrounding said projecting portion; and forming in said aperture layer a rectangular aperture with a cross section corresponding to the cross section of said projecting portion by removing said substrate from the aperture layer.

Abstract: A method of patterning a radiation-sensitive resist layer for manufacture of a semiconductor element which uses a radiation-sensitive resist layer formed of at least one of the radiation sensitive materials whose compositions are expressed by any of the following general structural formulas: ##STR1## wherein: R.sub.1 =methyl group, halogenated methyl group, cyano group or halogen elementR.sub.2 =alkyl group or alkoxy alkyl group having 6 or less carbon atoms in which at least one hydrogen is substituted by chlorine or brominen=an integer of 1 or larger, thereby forming an resist pattern with high precision.

Abstract: A method of preparing a fine and highly precise resist pattern comprising a step of forming a positive resist layer consisting of poly-(methacrylic anhydride) on a substrate, a step of irradiating the resist layer thus formed with a predetermined pattern of ionizing radiation and a step of developing the irradiated resist pattern with a developer comprising a solvent mixture composed of a polar organic solvent (A) capable of dissolving poly-(methyacrylic anhydride) and a non-solvent (B) incapable of dissolving poly-(methacrylic anhydride).

Abstract: Patterns to be drawn by a controlled electron beam producing system or a like system, as on a mask for integrated circuits, are classified into nonrepetitive and repetitive patterns. Each repetitive pattern is specified by those coordinates of an elementary pattern and those displacement and numbers of repetition of the elementary pattern which are stored in a data file as are the cases with coordinates of nonrepetitive patterns. In addition to a first register group for each of nonrepetitive patterns, a device for controlling production of the beam comprises a second register group for the data supplied thereto by accessing the data file only once for each repetitive pattern. A sequence controller repeatedly reads the coordinates of the elementary pattern from the register group, with the coordinates varied according to the displacements also read therefrom a plurality of times determined by those numbers of repetition which are also read therefrom.

Abstract: A radiation-sensitive positive resist which is prepared from a homogeneous polymer of any one of the various forms of halogenated alkyl .alpha.-halogenated acrylate expressed by the general structural formula: ##STR1## where: X = fluorine, chlorine or bromineR = alkyl group in which one or more hydrogen atoms are substituted by the corresponding number of fluorine atoms, or aryl group in which said substitution takes place, or alkoxy group in which said substitution takes place, or a copolymer of two or more of the monomers expressed by said general structural formula or a copolymer of any one of said monomers and any one of the different forms of vinyl monomer from those expressed by said general structural formula.

Abstract: A method of treating a photo mask comprising preparing the photo mask which has a conductive transparent substance on a major surface of an insulating substrate and which is formed with a mask pattern of an opaque substance on the conductive transparent substance, and irradiating the mask with an electron beam to inspect and/or retouch said mask.