Abstract: A semiconductor layer different in material from a semiconductor substrate formed on at least one part of the surface of the substrate is partially removed in accordance with a planar configuration forming technique employing irradiation of a radiation such as light, electron beam or X-rays to form a residual layer and ion beams are applied to the upper surface or the substrate at an incidence angle less than 90 degrees so that a non-etching region is formed at the region of the substrate other than the region around and beneath said residual layer according to mutual relationships between the configuration of the residual layer and the incidence angle of the ion beams.

Abstract: A light-reflection type pattern forming system used in the process for producing semiconductor devices. The system comprises a light source, a light-reflection type mask having a highly reflective region with a desired pattern on its surface, and an object to be exposed by the light reflected from said highly reflective region. The reflected light contains the information about the desired pattern and the desired pattern is copied on the object. Since this constitution uses reflected light instead of transmitted light, the absorption of light can be prevented and also the restriction on the range of wavelengths of the light from the source can be removed. The part of the incident light cast on the region other than the highly reflective region is absorbed, irregularly reflected or diverted so as not to expose the object.

Abstract: An electronic device, such as an LSI, comprising a logic circuit and an electronic circuit that comprises, in turn, a large-capacity memory circuit and/or at least one oscillator is provided with a holding circuit between the logic and the electronic circuits and between the electronic circuit and a device output terminal. The holding circuit merely delivers output signals of the logic circuit to the electronic circuit and feeds back output signals of the electronic circuit to the logic circuit in normal operation of the device. During test of the logic and the electronic circuits, the holding circuit selects and holds a test signal of a preselected time-sequential pattern and is switched to select the logic circuit output signals, which are produced by the device with a prescribed combination of logic levels when the device has no defects. Similarly, a holding circuit output signal is given a predetermined time-sequential pattern.

Abstract: A method is disclosed in which an object picture such as an integrated circuit pattern is precisely and exactly detected at high speed by the use of an electron beam. At least two kinds of signals obtained by irradiating an object with an electron beam are detected and subjected to an adding/subtracting operation and a resulting signal is used to detect the object picture. Thus, a satisfactory S/N ratio can be obtained. The method is applicable to the inspection of a mask used for integrated circuits.

Abstract: Disclosed is an electron beam exposure apparatus which comprises a first deflection system for deflecting an electron beam emitted from an electron gun and an objective electron lens for converging the deflected electron beam to apply the beam to a workpiece. Interposed between the objective lens and the workpiece is a second deflection system for deflecting the electron beam in parallel with the optical axis of the apparatus.

Abstract: In the past a film of a transition metal silicide or an aluminum silicon alloy has been deposited on a semiconductor substrate by vacuum evaporation and used as an electrode or wiring of a semiconductor device. According to the present invention, the film is produced by a sputtering method wherein the silicon component of the film is not supplied from the target but from a gaseous silicon compound contained in the sputtering atmosphere.

Abstract: A method of treating a silicon single crystal ingot which comprises the steps of purposely producing lattice strains in a silicon single crystal ingot, annealing the ingot at high temperature, and etching off the surface of the annealed ingot, thereby suppressing the occurrence of lattice defects.

Abstract: A radiant beam exposure method is provided in which an IC pattern is depicted on a semiconductor pellet with the IC pattern being divided into a plurality of pattern sections. Each of the pattern sections is depicted with a number of scanning lines traversing it. Each of the scanning lines corresponds to a train of bits representing a part of the pattern section. The pattern bit train is provided at at least one end with a bit representing jointing portion. The jointing bit is used to joint divided pattern sections.

Abstract: An electron beam exposure apparatus comprises a pair of electrostatic deflecting plates so disposed that the center thereof in the direction of an advancing electron beam emitted from an electron gun is located on the crossover point of said beam, a variable voltage source for said deflecting plates and an aperture disposed in the path of the deflected electron beam.

Abstract: The data corresponding to an IC pattern to be depicted on a semiconductor pellet are compressed and stored in a memory. A plurality of pattern data trains with the same content are compressed into a single pattern data train. A code representing the number of the same patterns is added to the head of the single pattern data train. The data element continuously included in the single pattern data train are encoded into another code for data compression. In this coding, the binary "0" is disposed with the same number as the result of subtraction of 2 from the quotient of n (number of the continuous data elements having the same binary value)/2. Following a series of binary "0"s, the binary "1" is disposed for partition. After the partitive binary "1", the binary "0" or "1" is disposed for indicating odd or even number of the data elements. The binary "1" or "0" is inserted between the code for representing the number of the same line patterns and the compressed single pattern data train.