Patents Assigned to VLT, Inc.
  • Patent number: 9571084
    Abstract: Low-voltage outputs are provided by full-bridge rectification using controlled switches with fault detection monitoring of circuit conditions and disabling switches upon detection of a fault to decouple the converter from the system. Common-source dual MOSFET devices include elements arranged in alternating patterns on the die. Common-source dual synchronous rectifiers include control circuitry powered from the voltage across the complementary switch. A DC-to-DC transformer converts power using a fixed voltage transformation ratio. A clamp phase may be used to reduce power losses, control the output resistance, effectively regulate the voltage transformation ratio, provide narrow band output regulation, and control the rate of change of output voltage. A new point of load converter includes input driver circuitry removed from and output circuitry located at the point of load, with a transformer located near the output circuit and an AC bus between the driver circuit and the primary winding of the transformer.
    Type: Grant
    Filed: April 8, 2015
    Date of Patent: February 14, 2017
    Assignee: VLT, Inc.
    Inventor: Patrizio Vinciarelli
  • Patent number: 9516761
    Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation with the mold forming part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features such as registration features accurately locating the circuit board within the mold cavity, interlocking contours for structural integrity of the singulated module, contours to match component shapes and sizes enhancing heat removal from internal components and reducing the required volume of encapsulant, clearance channels providing safety agency spacing and setbacks for the interconnects.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: December 6, 2016
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
  • Patent number: 9508485
    Abstract: A signal isolator apparatus includes a first substrate for supporting input circuitry including a high frequency oscillator circuit for receiving an input signal, a second substrate for supporting output circuitry including a detector circuit for providing an output signal; and a third substrate having parallel conductive layers separated by insulation. The third substrate has an upper conductive shield formed in a second conductive layer and a lower conductive shield formed in a fifth conductive layer. A transformer is formed between the upper and lower conductive shields and includes a primary winding formed in a third conductive layer and a secondary winding formed in a fourth conductive layer. The oscillator circuit is connected to the primary winding and adapted to excite the primary winding at a first frequency in response to the input signal, and the detector circuit is connected to the secondary winding and adapted to selectively sense the first frequency and provide the output signal.
    Type: Grant
    Filed: January 14, 2015
    Date of Patent: November 29, 2016
    Assignee: VLT, Inc.
    Inventor: Patrizio Vinciarelli
  • Patent number: 9439297
    Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation with the mold forming part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features such as registration features accurately locating the circuit board within the mold cavity, interlocking contours for structural integrity of the singulated module, contours to match component shapes and sizes enhancing heat removal from internal components and reducing the required volume of encapsulant, clearance channels providing safety agency spacing and setbacks for the interconnects.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: September 6, 2016
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
  • Patent number: 9413259
    Abstract: Power from an AC source at a source voltage is converted for delivery to a load at a DC load voltage, where the source voltage may vary between a high line voltage and a low line voltage in a normal operating range. DC-DC voltage transformation and isolation are provided in a first power conversion stage, the first stage having a CA input for receiving power from the source and a CA output for delivering a galvanically isolated unregulated AC adapter module (UAAM) voltage. First stage circuitry for performing the first power conversion stage is provided in a self-contained adapter module having input terminals for connection to the AC source and an output connected to the CA output for providing power to a second power conversion stage wherein the second power conversion stage is external to the adapter module.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: August 9, 2016
    Assignee: VLT, Inc.
    Inventor: Patrizio Vinciarelli
  • Patent number: 9402319
    Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation. The mold may be used to form part of the finished product. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features. Wide cuts may be made in the molds after encapsulation reducing thermal stresses. Blank mold panels may be machined to provide some or all of the above features in an on-demand manufacturing system. Connection adapters may be provided to use the modules in vertical or horizontal mounting positions in connector, through-hole, surface-mount solder variations.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: July 26, 2016
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
  • Patent number: 9325247
    Abstract: A power converter including a transformer, a resonant circuit including the transformer and a resonant capacitor having a characteristic resonant frequency and period, and output circuitry connected to the transformer for delivering a rectified output voltage to a load. Primary switches drive the resonant circuit, a clamp switch is connected to shunt the resonant capacitor, and a switch controller operates the primary switches and the clamp switch in a series of converter operating cycles. The converter operating cycles include power transfer intervals including resonant intervals during which a resonant current at the characteristic resonant frequency flows through a winding of the transformer; and a clamp interval during which the clamp switch provides a low impedance shunt across the resonant capacitor holding the resonant capacitor at a voltage at or near zero volts. The operating cycles may also include energy recycling intervals for charging and discharging capacitances within the converter.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: April 26, 2016
    Assignee: VLT, Inc.
    Inventor: Patrizio Vinciarelli
  • Patent number: 9269661
    Abstract: A semiconductor device includes a semiconductor substrate with doped regions of a first type and doped regions of a second type. A first metallization layer connects to the doped regions of the first type through conductive paths, such that current is able to flow within the metallization layer along a plurality of linear axes. A second metallization layer connects to the doped regions of the second type through conductive paths, such that that current is able to flow within the metallization layer along a plurality of linear axes. Contacts on an exterior surface of the semiconductor device can be arranged concentrically.
    Type: Grant
    Filed: January 14, 2015
    Date of Patent: February 23, 2016
    Assignee: VLT, INC.
    Inventors: Patrizio Vinciarelli, Sergey Luzanov
  • Patent number: 9190206
    Abstract: A vertical PCB inductive device is adapted to be surface mount soldered to a substrate. The inductive device may comprise a transformer having a plurality of windings or one or more discrete inductive devices. The inductive device, being amenable to volume production, may also provide cost savings by reducing the number of layers and the PCB area otherwise required by planar magnetics in a power converter. A power converter may be fashioned to be vertically oriented and surface mount soldered to a substrate such as a customer PCB.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: November 17, 2015
    Assignee: VLT, Inc.
    Inventor: Sergey Luzanov
  • Patent number: 9166481
    Abstract: A method of synchronously operating a power converter in a series of converter operating cycles includes providing an oscillator for generating clock signals at an oscillator frequency, and generating timing control signals for each of multiple events based upon the clock signals. The method further includes to: (i) turn a primary switch ON and OFF at times when essentially zero voltage is impressed across the primary switch and essentially zero resonant current is flowing in the primary switch; and (ii) turn a secondary switch ON and OFF at times when essentially zero current is flowing in the secondary switch and essentially zero voltage is impressed across the secondary switch. The oscillator frequency is preset, and the timing of the timing control signals for one or more selected events may be set independently of other timing control signals and events.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: October 20, 2015
    Assignee: VLT, INC.
    Inventors: Patrizio Vinciarelli, Sergey Luzanov
  • Patent number: 9112422
    Abstract: Low-voltage outputs are provided by full-bridge rectification using controlled switches with fault detection monitoring of circuit conditions and disabling switches upon detection of a fault to decouple the converter from the system. Common-source dual MOSFET devices include elements arranged in alternating patterns on the die. Common-source dual synchronous rectifiers include control circuitry powered from the voltage across the complementary switch. A DC-to-DC transformer converts power using a fixed voltage transformation ratio. A clamp phase may be used to reduce power losses, control the output resistance, effectively regulate the voltage transformation ratio, provide narrow band output regulation, and control the rate of change of output voltage. A new point of load converter includes input driver circuitry removed from and output circuitry located at the point of load, with a transformer located near the output circuit and an AC bus between the driver circuit and the primary winding of the transformer.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: August 18, 2015
    Assignee: VLT, Inc.
    Inventor: Patrizio Vinciarelli
  • Patent number: 9024595
    Abstract: A loop controller includes an error amplifier configured to receive an output of a controlled process and further configured to receive a reference input; and an asymmetric compensator. The asymmetric compensator includes a high pass filter configured to receive an amplified version of the reference input and output a filtered reference; and an asymmetric impedance configured to receive an amplified version of the filtered reference and output a compensation signal. The error amplifier is further configured to sum the compensation signal and the output of the controlled process, and provide an error signal based on a difference between the sum and the reference input. The compensation signal includes a first gain for a rising transition of the controlled process output and a second gain for a falling transition of the controlled process output.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 5, 2015
    Assignee: VLT, Inc.
    Inventors: Eduardo M. A. Oliveira, Jr., Maurizio Salato
  • Patent number: 8975694
    Abstract: A semiconductor device includes a semiconductor substrate with doped regions of a first type and doped regions of a second type. A first metallization layer connects to the doped regions of the first type through conductive paths, such that current is able to flow within the metallization layer along a plurality of linear axes. A second metallization layer connects to the doped regions of the second type through conductive paths, such that that current is able to flow within the metallization layer along a plurality of linear axes. Contacts on an exterior surface of the semiconductor device can be arranged concentrically.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: March 10, 2015
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Sergey Luzanov
  • Patent number: 8966747
    Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation with the mold forming part of the finished product, e.g. providing heat sink fins or a surface mount solderable surface. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features such as registration features accurately locating the circuit board within the mold cavity, interlocking contours for structural integrity of the singulated module, contours to match component shapes and sizes enhancing heat removal from internal components and reducing the required volume of encapsulant, clearance channels providing safety agency spacing and setbacks for the interconnects.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: March 3, 2015
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. Lafleur, Sean Timothy Fleming, Rudolph Mutter, Andrew T. D'Amico
  • Publication number: 20140355218
    Abstract: A method of encapsulating a panel of electronic components such as power converters reduces wasted printed circuit board area. The panel, which may include a plurality of components, may be cut into one or more individual pieces after encapsulation. The mold may be used to form part of the finished product. Interconnection features provided along boundaries of individual circuits are exposed during the singulation process providing electrical connections to the components without wasting valuable PCB surface area. The molds may include various internal features. Wide cuts may be made in the molds after encapsulation reducing thermal stresses. Blank mold panels may be machined to provide some or all of the above features in an on-demand manufacturing system. Connection adapters may be provided to use the modules in vertical or horizontal mounting positions in connector, through-hole, surface-mount solder variations.
    Type: Application
    Filed: May 11, 2012
    Publication date: December 4, 2014
    Applicant: VLT, INC.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur, Sean Timothy Fleming, Rudolph F. Mutter, Andrew T. D'Amico
  • Patent number: D721047
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: January 13, 2015
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Sergey Luzanov
  • Patent number: D752000
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: March 22, 2016
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Sergey Luzanov
  • Patent number: D754083
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: April 19, 2016
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur
  • Patent number: D775092
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: December 27, 2016
    Assignee: VLT, INC.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur
  • Patent number: D775093
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: December 27, 2016
    Assignee: VLT, INC.
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur