Abstract: A method of making a silicon on insulator structure comprises: providing a bonded structure, the bonded structure comprises the first substrate, the second substrate and the insulating buried layer, the insulating buried layer is positioned between the first substrate and the second substrate; peeling off a layer of removing region of the first substrate from the bonded structure to obtain a first film; at a first temperature, performing a first etching to etch the first film to remove a first thickness of the first film; at a second temperature, performing a second etching to etch the first film to planarize the first film and remove a second thickness of the first film, the first temperature being lower than the second temperature, the first thickness being greater than the second thickness, and a sum of the first thickness and the second thickness being a total etching thickness of the first film.

Abstract: The present application provides an apparatus and a method for ingot growth. The apparatus for ingot growth comprises a growth furnace, a crucible, a heater, a lifting mechanism, an infrared detector, a dividing disc, a sensor and a control device. The crucible is located within the growth furnace. The lifting mechanism comprises a lifting wire and a driving device, wherein the lifting wire connects to the top of the ingot via one terminal and to the driving device via another terminal. The bottom of the ingot puts inside the crucible, and the ingot has plural crystal lines thereon. The infrared detector is located outside the growth furnace. The dividing disc is above the growth furnace, connects to the lifting mechanism, and rotates with the ingot synchronously under the driving of the lifting mechanism, and an orthographic projection of bisector of the dividing disc is between two adjacent crystal lines. The sensor is located on the periphery of the dividing disc.

Abstract: A seeding method for crystal growth comprising: a first seeding step: rotating a crucible with a first rotation speed to grow the crystal to a first length; a second seeding step: gradually increasing the rotation speed of the crucible from the first rotation speed to a second rotation speed, and growing the crystal to a second length; a third seeding step: rotating the crucible with the second rotation speed to growing the crystal to a predicted length. By separating the seeding stage to three steps and gradually increasing the rotation speed in the second step of the crucible, the silicon melt convection is enhanced and the temperature at center of the silicon melt is kept to be not lower than the starting temperature of the seeding. Thereby, the removal of dislocation within the seed crystal can be increased, and the growth problems such as broken or polycrystallization can be prevented.

Abstract: The present invention provides a method of making a silicon on insulator (SOI) structure, comprising steps of: providing a bonded structure, the bonded structure comprises a first substrate, a second substrate and an insulating buried layer, the insulating buried layer is positioned between the first substrate and the second substrate; peeling off a layer of removing region of the first substrate from the bonded structure to obtain a SOI structure; and processing the SOI structure with isothermal annealing technology at a pressure which is lower than atmospheric pressure.

Abstract: The present application provides a detection method of metal impurity in wafer. The method comprises conducting a medium temperature thermal treatment for a first predicted time period to the wafer, cooling the wafer and conducting a low temperature thermal treatment for a second predicted time period, cooling the wafer to ambient temperature; providing a liquid of vapor phase decomposition on the wafer to collect metal impurities; atomizing the liquid containing the collected metal impurities, conducting an inductively coupled plasma mass spectrometry analysis and obtaining concentrations of the metal impurities. The present application applies the combination of various thermal treatment without an interrupt of cooling to ambient temperature to contemplate diffusions of various metal impurities to the wafer surface. Accordingly, the detection of metal impurities can be conducted with reduced time cost and enhanced efficiency.

Abstract: A crystal growth method and a crystal growth apparatus are disclosed in the present application. The crystal growth method comprises maintaining rotating of a crucible and meanwhile applying a horizontal magnetic field to silicon melt in the crucible during crystal growth. As and/or after changing magnetic field strength of the horizontal magnetic field, temperature fluctuation may easily occur at a solid-liquid interface of an ingot and the silicon melt. Through changing crucible rotating speed to change forced convection of the silicon melt, the temperature fluctuation at solid-liquid interface, caused by the changing of the magnetic field strength, may be rapidly reduced to stabilize diameter of the ingot.

Abstract: A method of making a silicon on insulator structure comprises: providing a bonded structure, the bonded structure comprises the first substrate, the second substrate and the insulating buried layer, the insulating buried layer is positioned between the first substrate and the second substrate; peeling off a layer of removing region of the first substrate from the bonded structure to obtain a first film; at a first temperature, performing a first etching to etch the first film to remove a first thickness of the first film; at a second temperature, performing a second etching to etch the first film to planarize the first film and remove a second thickness of the first film, the first temperature being lower than the second temperature, the first thickness being greater than the second thickness, and a sum of the first thickness and the second thickness being a total etching thickness of the first film.

Abstract: The present invention provides a method of making a silicon on insulator (SOI) structure, comprising steps of: providing a bonded structure, the bonded structure comprises a first substrate, a second substrate and an insulating buried layer, the insulating buried layer is positioned between the first substrate and the second substrate; peeling off a layer of removing region of the first substrate from the bonded structure to obtain a SOI structure; and processing the SOI structure with isothermal annealing technology at a pressure which is lower than atmospheric pressure.

Abstract: Disclosed a heat shield structure for a single crystal production furnace, which is provided above a melt crucible of a single crystal production furnace and comprises an outer housing and a heat insulation plate disposed within the outer housing. A bottom outer surface of the outer housing faces an interior of the melt crucible, and an angle formed between a plane in which the heat insulation plate is located and a plane in which a bottom of the outer housing is located is an acute angle and faces an outer surface of single crystal silicon. The heat shield design is changed, a heat absorbing plate is additionally provided for transferring heat absorbed to the single crystal silicon, a heat channel is formed in the heat shield, so that a pulling rate is controlled, which improves radial mass uniformity of the single crystal silicon.

Abstract: The present invention provides a method for calculating the liquid-solid interface morphology during growth of the ingot. The method comprises providing a wafer, selecting plural sampling locations on the wafer and detecting electrical resistivity at the plural sampling locations, calculating height differences between the sampling locations based on the detected electrical resistivity, and illustrating the morphology of the liquid-solid interface based on the calculated height differences. The method of the invention has advantages including easy operation and low cost.

Abstract: The present invention provides a method and an apparatus of monocrystal growth. The method comprises providing an apparatus comprising a crucible, a first lifting device for lifting the crucible, a deflector tube and a second lifting device for lifting the deflector tube; setting a theoretical distance between the deflector tube and the melt surface, determining a theoretical ratio of the crucible lifting rate relative to the monocrystal lifting rate based on sizes of the crucible and the monocrystal, and starting to grow the monocrystal. During the growth, the position of one or more of the crucible, the deflector tube and the monocrystal is adjusted, the actual distance between the deflector tube and the melt surface is real-time detected, the deviation value between the theoretical and the actual distances is calculated, a variation of the ratio is obtained by the deviation value, and the theoretical ratio is adjusted based on the variation.

Abstract: A seeding method for crystal growth comprising: a first seeding step: rotating a crucible with a first rotation speed to grow the crystal to a first length; a second seeding step: gradually increasing the rotation speed of the crucible from the first rotation speed to a second rotation speed, and growing the crystal to a second length; a third seeding step: rotating the crucible with the second rotation speed to growing the crystal to a predicted length. By separating the seeding stage to three steps and gradually increasing the rotation speed in the second step of the crucible, the silicon melt convection is enhanced and the temperature at center of the silicon melt is kept to be not lower than the starting temperature of the seeding. Thereby, the removal of dislocation within the seed crystal can be increased, and the growth problems such as broken or polycrystallization can be prevented.

Abstract: The present application provides a method for detecting temperature of thermal chamber comprising: conducting a thermal treatment at a predicted temperature to a selected silicon wafer within a thermal chamber, wherein the predicted temperature comprises plural temperature points set in order; obtaining a haze value corresponding to the predicted temperature; obtaining a linear relationship I between the temperature and the haze; polishing and washing the silicon wafer; conducting a thermal treatment at a predicted temperature to the polished silicon wafer within the thermal chamber; obtaining a linear relationship II between the temperature and the haze; calculating a difference of the haze at same temperature point between the two thermal treatments, and obtaining an actual temperature difference of the thermal chamber based on the difference of the haze.

Abstract: The present application provides a method and a device of chemical mechanical polishing (CMP). The method comprises providing a semiconductor wafer to be subjected to polishing; conducting a CMP process to the wafer, wherein the wafer is on a first plane; conducting a hanging treatment, wherein, in the hanging treatment, the wafer is on a second plane above the first plane, the wafer is hanged to expose the lower surface, and the wafer is in rotation. According to the present application, the hanging treatment can remove the slurry, the polishing particles and byproducts from the wafer surface, therefore, it prevents from the adverse effects caused by the polishing particles and byproducts on the wafer in the following process.

Abstract: The present application provides a process for preparing an epitaxy wafer, and an epitaxy wafer prepared therefrom. The process comprises: step S1: providing a semiconductor substrate wafer, conducting an epitaxy process and forming an epitaxy layer on the wafer; and step S2: conducting a thermal treatment to the wafer to eliminate the haze pattern of the epitaxy layer. According to the process, the thermal treatment after the epitaxy process can facilitate the orientation of atoms on the wafer surface toward the lowest energy orientation, so that the atoms of the epitaxy layer arrange and accumulate uniformly. Therefore, the haze pattern on the wafer surface can be eliminated.

Abstract: The present invention provides a polishing pad, a polishing apparatus and a polishing method for a silicon wafer. The polishing pad comprises a polishing surface in contact with the silicon wafer. The polishing surface is provided with at least one groove. When polishing the silicon wafer, the edge of the silicon wafer is at least partially suspended above the groove. The polishing pad, polishing apparatus and silicon wafer polishing method according to the present invention can reduce the polishing rate at the edge of the silicon wafer while keeping the polishing rate of the entire wafer basically unchanged, thereby improving the flatness of the edge thickness of the silicon wafer as well as improving the production yield.

Abstract: The invention provides a method for positioning a wafer and a semiconductor manufacturing apparatus, which are applied to thin film processes. The method includes: Step S1: Obtain the state distribution of the first surface of the first wafer after the thin film process is performed on the first wafer, wherein the first surface is the surface opposite to a surface that the thin film formed thereon in the thin film process; Step S2: Determine whether the first wafer is located at the ideal positioning center according to the state distribution of the first surface, when the first wafer is not located at the ideal positioning center, according to the state distribution of the first surface adjusts the positioning position of the second wafer to be subjected to the thin film process, so that the second wafer is positioned at the ideal positioning center during the thin film process.

Abstract: A complementary metal-oxide-semiconductor field-effect transistor comprises a semiconductor substrate, N-type and P-type field-effect transistors positioned in the semiconductor substrate. Each of the field-effect transistors includes a germanium nanowire, a III-V compound layer surrounding the germanium nanowire, a potential barrier layer mounted on the III-V compound layer, a gate dielectric layer, a gate, a source region and a drain region mounted on two sides of the gate. The field-effect transistor can produce two-dimensional electron gases and two-dimensional electron hole gases, and enhance the carrier mobility of the complementary metal-oxide-semiconductor field-effect transistor.

Abstract: This invention application provides a method for manufacturing a SOI substrate, and the method comprising: providing a first semiconductor substrate; growing a first insulating layer on a top surface of the first semiconductor substrate for forming a first wafer; irradiating the first semiconductor substrate via a ion beam for forming a doping layer to a pre-determined depth from a top surface of the first insulating layer; providing a second substrate; growing a second insulating layer on a top surface of the second semiconductor substrate for forming a second wafer; bonding the first wafer with the second wafer; annealing the first wafer and second wafer at a deuterium atmosphere; separating a part of the first wafer from the second wafer; and forming a deuterium doped layer on the second wafer.

Abstract: This invention provides a method for growing monocrystalline silicon by applying Czochralski method comprising forming a melt of silicon-containing materials in a crucible and pulling the melt for monocrystalline silicon growth, which is characterized by, introducing a gas containing argon during formation of the melt, and, applying a magnetic field during the pulling step. This invention also provides a method for producing a wafer based on the above monocrystalline silicon.