Abstract: A semiconductor device includes a substrate. The semiconductor device also includes a semiconductor layer disposed in the substrate. The semiconductor device further includes a first dielectric layer disposed on the semiconductor layer. The semiconductor device includes a second dielectric layer disposed on the first dielectric layer. The semiconductor device also includes a pair of thermopile segments disposed on the second dielectric layer. The first dielectric layer and the second dielectric layer form a chamber.

Abstract: An organic light-emitting display device includes quantum dots and an RGB color filter layer having quantum dots and thus is capable of removing 100% of interference among red, green, and blue color filters.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first III-V compound layer disposed on the substrate, a second III-V compound layer disposed on the first III-V compound layer, a p-type doped III-V compound layer disposed on the second III-V compound layer, a gate disposed over the p-type doped III-V compound layer, a source and a drain disposed on opposite sides of the gate, and a dielectric layer disposed between the p-type doped III-V compound layer and the gate. A method for forming the above semiconductor device is also provided.

Abstract: An electrical fuse matrix includes a plurality of anti-fuse structures, a plurality of top metal plates, and a plurality of bottom metal plates. The anti-fuse structures are arranged in a matrix, and each of the anti-fuse structure includes a top conductive structure, a bottom conductive structure, and a dielectric film disposed between the top conductive structure and the bottom conductive structure. The anti-fuse structure has an hourglass shape. The top metal plates are disposed on the top conductive structures. The bottom metal plates are disposed on the bottom conductive structures.

Abstract: A semiconductor device including a transistor on a substrate; an interlayer insulating layer on the transistor; a first metal-containing layer on the interlayer insulating layer; and a second metal-containing layer on the first metal-containing layer, wherein the second metal-containing layer includes a resistor, the resistor includes a first insulating layer on the first metal-containing layer; a resistor metal layer on the first insulating layer; and a second insulating layer on the resistor metal layer, and the resistor metal layer includes a recessed side surface.

Abstract: Provided is a method of evaluating a silicon wafer, the method including a first determination that determines the presence or absence of an abnormality by inspecting a surface of an evaluation-target silicon wafer with a light scattering type surface inspection device; and a second determination that determines the presence or absence of an abnormality through observing, with an atomic force microscope, a region of the surface of the evaluation-target silicon wafer, where the presence of an abnormality has not been confirmed in the first determination.

Abstract: The photosensitive region includes a first impurity region and a second impurity region having a higher impurity concentration than that of the first impurity region. The photosensitive region includes one end positioned away from the transfer section in the second direction and another end positioned closer to the transfer section in the second direction. A shape of the second impurity region in plan view is line-symmetric with respect to a center line of the photosensitive region along the second direction. A width of the second impurity region in the first direction increases in a transfer direction from the one end to the other end. An increase rate of the width of the second impurity region in each of sections, obtained by dividing the photosensitive region into n sections in the second direction, becomes gradually higher in the transfer direction. Here, n is an integer of two or more.

Abstract: A semiconductor power module includes a base plate, an insulating substrate, a power semiconductor element, an external terminal, a main terminal, a connected body, a case, a highly-insulating voltage-resisting resin material, a sealing resin, and a cover. The main terminal is connected to the connected body. The connected body is directly joined to the metal plate. The connected body is provided with a receiving section in which the main terminal is received. The receiving section is provided with a slit portion. The slit portion extends from a lower end side of the receiving section toward an upper end side thereof. The lower end side is located on a side close to the insulating substrate. The upper end side is located opposite to the side close to the insulating substrate.

Abstract: An organic light-emitting display apparatus includes a plurality of first emission units, each including a first organic light-emitting device configured to emit light in at least a first direction and through a first display surface, a plurality of second emission units, each including a second organic light-emitting device configured to emit in a second direction opposite to the first direction and through a second display surface. The first emission units and the second emission units are alternately disposed. The apparatus further includes a transmissive area disposed adjacent to but not overlapping with the plurality of first emission units and the plurality of second emission units when viewed from a direction perpendicular to the first display surface, and capable of transmitting external light through the first and second display surfaces in the transmissive area.

Abstract: A building automation system (BAS) includes building equipment located within a building and a BAS network configured to facilitate communications between the building equipment. The building equipment operate to affect a variable state or condition within the building. The BAS includes a BAS-BIM integrator configured to receive BAS points from the BAS network and to integrate the BAS points with a building information model (BIM). The BIM includes a plurality of BIM objects representing the building equipment. The BAS includes an integrated BAS-BIM viewer configured to use the BIM with the integrated BAS points to generate a user interface. The user interface includes a graphical representation of the BIM objects and the BAS points integrated therewith.

Abstract: Techniques regarding selectively tuning the operating frequency of superconducting Josephson junction resonators are provided. For example, one or more embodiments described herein can comprise a method that can include chemically altering a Josephson junction of a Josephson junction resonator via a plasma treatment. The method can also comprise selectively tuning an operating frequency of the Josephson junction resonator based on a property of the plasma treatment.

Abstract: According to a semiconductor device herein, the device includes a substrate. An active device is formed in the substrate. The active device includes a collector region, a base region formed on the collector region, and an emitter region formed on the base region. An isolation structure is formed in the substrate around the active device. A trench filled with a compressive material is formed in the substrate and positioned laterally adjacent to the emitter region and base region. The trench extends at least partially into the collector region.

Abstract: A building automation system (BAS) includes building equipment located within a building and a BAS network configured to facilitate communications between the building equipment. The building equipment operate to affect a variable state or condition within the building. The BAS includes a BAS-BIM integrator configured to receive BAS points from the BAS network and to integrate the BAS points with a building information model (BIM). The BIM includes a plurality of BIM objects representing the building equipment. The BAS includes an integrated BAS-BIM viewer configured to use the BIM with the integrated BAS points to generate a user interface. The user interface includes a graphical representation of the BIM objects and the BAS points integrated therewith.

Abstract: The present disclosure relates to an image sensor having a photodiode surrounded by a back-side deep trench isolation (BDTI) structure, and an associated method of formation. In some embodiments, a plurality of pixel regions is disposed within an image sensing die and respectively comprises a photodiode configured to convert radiation into an electrical signal. The photodiode comprises a photodiode doping column with a first doping type surrounded by a photodiode doping layer with a second doping type that is different than the first doping type. A BDTI structure is disposed between adjacent pixel regions and extending from the back-side of the image sensing die to a position within the photodiode doping layer. The BDTI structure comprises a doped liner with the second doping type and a dielectric fill layer. The doped liner lines a sidewall surface of the dielectric fill layer.

Abstract: A semiconductor device includes a device cell including a gate component configured to receive a gate control signal and a temperature sensing component adjacent to the device cell. Each of the temperature sensing component and the gate component includes polycrystalline silicon.

Abstract: Embodiments of the invention are directed to a configuration of nanosheet FET devices in a first region of a substrate. Each of the nanosheet FET devices in the first region includes a first channel nanosheet, a second channel nanosheet over the first channel nanosheet, a first gate structure around the first channel nanosheet, and a second gate structure around the second channel nanosheet, wherein the first gate structure and the second gate structure pinch off in a pinch off area between the first gate structure and the second gate structure. The first gate structure includes a doped region, and the second gate structure includes a doped region. At least a portion of the pinch off area is undoped.

Abstract: Systems and techniques that facilitate spurious junction prevention via in-situ ion milling are provided. In various embodiments, a method can comprise forming a tunnel barrier of a Josephson junction on a substrate during a shadow evaporation process. In various instances, the method can further comprise etching an exposed portion of the tunnel barrier during the shadow evaporation process. In various embodiments, the shadow evaporation process can comprise patterning a resist stack onto the substrate. In various instances, the etching the exposed portion of the tunnel barrier can leave a protected portion of the tunnel barrier within a shadow of the resist stack. In various instances, the shadow of the resist stack can be based on a direction of the etching the exposed portion of the tunnel barrier.

Abstract: A bendable backplane structure is provided. The bendable backplane structure includes a first flexible layer, and a metal layer which is disposed on the first flexible layer and includes a first metal section and a second metal section, wherein the first metal section includes a first extension, the second metal section includes a second extension, and the first extension is disposed corresponding to the second extension in a lamination direction from the first flexible layer toward the metal layer. The bendable backplane further also includes a second flexible layer which is disposed on the metal layer.

Abstract: Radar sensor, having an antenna assembly and a monolithic microwave integrated circuit that is arranged on a circuit board of the radar sensor and comprises at least one antenna connection that is to be connected to the antenna assembly, in particular is implemented in a ball grid, provides radar signals to be emitted, which can be generated by the microwave circuit, or accepts received radar signals from the antenna assembly, the connection of the antenna connection to the antenna assembly being formed at least in part by a waveguide, wherein, for connecting the at least one antenna connection to the waveguide designed as a wave duct, the circuit board comprises, at the position of the antenna connection, a through-opening leading to the side of the circuit board opposite the microwave circuit, through which the antenna connection is connected to a radiation element projecting into the waveguide arranged on the opposite side of the circuit board at the position of the antenna connection.

Abstract: A semiconductor device includes a semiconductor body having a base region incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process. Furthermore, the epitaxial layer field stop zone is formed with an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In some embodiments, the enhanced doping profile includes multiple doped regions with peak doping levels where a first doped region adjacent to a first side of the field stop zone has a first peak doping level that is not higher than a last peak doping level of a last doped region adjacent to the base region. The epitaxial layer field stop zone of the present invention enables complex field stop zone doping profiles to be used to obtain the desired soft-switching characteristics in the semiconductor device.