Abstract: A circuit arrangement is disclosed for controlling the switching of a field effect transistor (FET). A current controlled amplifier may be configured to amplify a current in a current sense device to generate an amplified current, wherein the current in the current sense device indicates a current through the FET. A comparator may be coupled to the current sense amplifier to compare a voltage corresponding to the amplified current with a voltage reference and to generate a comparator output based on the comparison, wherein the comparator output controls whether the FET is on or off.

Abstract: There is provided an interpolation circuit of an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals sequentially have a 90 degrees phase shift and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.

Abstract: An electrical power pulse generator system and a method of the system's operation are described herein. A main energy storage capacitor supplies a negative DC power and a kick energy storage capacitor supplies a positive DC power. A main pulse power transistor is interposed between the main energy storage capacitor and an output pulse rail and includes a main power transmission control input for controlling power transmission from the main energy storage capacitor to the output pulse rail. A positive kick pulse power transistor is interposed between the kick energy storage capacitor and the output pulse rail and includes a kick power transmission control input for controlling power transmission from the kick energy storage capacitor to the output pulse rail. A positive kick pulse power transistor control line is connected to the kick power transmission control input of the positive kick pulse transistor.

Abstract: An apparatus for permanently controlling an electronic switching unit, the apparatus including a controlling driver unit for supplying a control signal to the electronic switching unit using a charge storage device, and a charging driver unit for recharging the charge storage device.

Abstract: An integrated circuit gating circuit includes a first control stage that outputs a first internal signal based on an enable signal and a clock signal, a second control stage that outputs a second internal signal based on the first internal signal and the clock signal, and an output driver that outputs an output clock signal based on the second internal signal. The second control stage includes a first multi-finger transistor that is connected between a second node outputting the second internal signal and the 0-th node and operates based on the clock signal. A first portion of the first multi-finger transistor is formed in a first row defined on a semiconductor substrate, and a second portion of the first multi-finger transistor is formed in a second row defined on the semiconductor substrate.

Abstract: One or more embodiments of a power circuit can comprise a capacitor in series between a power source and a gate of a transistor, to receive a driver output of a first voltage from the power source. The power circuit can further comprise a first diode in parallel between the power source and the gate of the transistor. In some embodiments, when the driver output is present and exceeds a first breakdown voltage of a second diode, and the second diode enables flow of current from the first cathode to the ground, resulting in the capacitor being negatively charged up to a second voltage corresponding to excess of the first voltage over the first breakdown voltage. In additional embodiments, after the capacitor is at least partially charged, when the driver output is not present, the capacitor discharges a negative current based on the negative charging of the capacitor up to the second voltage.

Abstract: A track-and-hold circuit with a high sampling rate and reduced power consumption is provided. A track-and-hold circuit performing switching between a track mode in which a data signal that is equivalent to an input data signal is output and a hold mode in which a data signal which is input at a time of switching from the track mode to the hold mode is held and output, by using a clock signal, such that only the data signal in the hold mode is output, the track-and-hold circuit including: two sampling circuits configured to be connected in parallel to an input of the data signal and receive an in-phase data signal; a clock circuit configured to input a clock signal, which has a phase opposite to a phase of a clock signal input to one of the two sampling circuits, to the other of the two sampling circuits; and a multiplexer circuit configured to select and output a data output of either one of the two sampling circuits that is in the hold mode, by using the clock signal.

Abstract: Methods and apparatus for implementing a current-mirror based level shifter circuit are provided. The current-mirror based level shifter circuit includes a current-mirror circuit, a feedback control circuit, a power down circuit and a plurality of inverter circuits. The apparatus is configured to provide a wide voltage shifting range using the current-mirror based level shifter circuit. The apparatus comprising a feedback loop with two diode connected transistors may provide a constant drivability to the node that drives the output, when a current-mirror circuit is turned-off.

Abstract: Technology includes a current sensor that detects electric current flowing through an object. The current sensor includes a magnetic core through which the object is inserted, a coil wound around the magnetic core, a transmission line that transmits electric current supplied from the coil, a terminating resistor that converts electric current from a terminating end of the transmission line into voltage and outputs the voltage, and an impedance matching unit that implements impedance matching between the coil and the terminating resistor. The impedance matching unit raises, to a characteristic impedance of the transmission line, at least one of an impedance viewed from the terminating end of the transmission line toward the terminating resistor and an impedance viewed from a starting end of the transmission line toward the coil, in a band of frequency components involving amplitude attenuation among frequency components of the voltage output from the terminating resistor.

Abstract: A bias circuit is provided. The bias circuit includes a comparator circuit configured to compare a first voltage at a first input with a second voltage at a second input and generate a digital value at an output. A level shifter circuit is coupled to the comparator circuit. The level shifter is configured to receive a reference voltage at an input and generate the second voltage at an output. A charge pump circuit is coupled to the comparator circuit. The charge pump circuit is configured to generate the first voltage at an output based on the digital value.

Abstract: A drive assist circuit includes a pulse generation circuit which outputs a pulse to control an assist operation when an assist signal makes a first transition corresponding to a transition of a gate signal from a high level to a low level. The pulse generation circuit includes a delay circuit provided in one of two inputs of a logic gate. The delay circuit is configured such that a delay is greater when an input makes a transition corresponding to the first transition of the assist signal, as compared to a case where the input makes a transition corresponding to an inverse of the first transition.

Abstract: A light switch cover for converting a standard toggle switch into a remote-controlled toggle switch.

Abstract: A switch driving circuit that drives a switch is provided. The switch driving circuit includes: a surge detecting unit that detects a surge voltage caused by switching of a state of the switch; a speed setting unit that sets, based on the surge voltage detected by the surge detecting unit, a switching speed of the switch when the state of the switch is switched; and a fault determination unit that determines whether a fault has occurred on the surge detecting unit. The speed setting unit is configured to change a setting of the switching speed to a fault setting when the fault determination unit determines that a fault has occurred on the surge detecting unit, from a normal setting in a state where the fault determination unit determines that no fault has occurred on the surge detecting unit, while maintaining driving of the switch.

Abstract: A signal processing circuit for processing a sensing signal from a sensing circuit includes a plurality of input capacitors, an amplifier, an input switch group, a plurality of storage capacitors and a plurality of storage control switches. The plurality of input capacitors are configured to receive the sensing signal from one of a differential input nodes of the signal processing circuit and couple the sensing signal to a plurality of floating nodes. The amplifier, coupled to the plurality of floating nodes, is configured to amplify the sensing signal coupled from the plurality of floating nodes. The input switch group is coupled between the plurality of floating nodes and the plurality of input capacitors. The plurality of storage control switches, coupled between the plurality of floating nodes and the plurality of storage capacitors, are configured to couple offset information of the plurality of input capacitors to the plurality of storage capacitors.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to transmit signal in isolated gate drivers. An example apparatus includes a first encoder including: an edge detector coupled to a first sensor; a first clock counter coupled to the edge detector; a first signal selector coupled to the first clock counter; and a first multiplexer including coupled to a signal generator, the first clock counter, and the first signal selector; and a second encoder including: a level detector coupled to a second sensor; a second clock counter coupled to the level detector; a second signal selector coupled to the level detector and the second clock counter; and a second multiplexer coupled to the first multiplexer, a reference voltage, the second signal selector, and a modulator.

Abstract: One or more techniques and/or systems are provided for providing power to a plurality of dispensers. For example, a supply coupler, such as an alternating current to direct current power converter, is coupled to an energy storage component and/or a load coupler of a power distribution apparatus. The supply coupler provides power over the load coupler to one or more dispensers for operation. The supply coupler provides power to the energy storage component for energy storage. Responsive to a load on the power distribution apparatus exceeding a supply current of the power provided by the supply coupler (e.g., multiple dispensers may attempt to perform concurrent dispense events), the energy storage component may discharge energy to provide additional power to one or more dispensers to facilitate concurrent dispense events. Because the power distribution apparatus may connect to multiple dispensers, a cord management device may be used for power cord management.

Abstract: An integrated circuit which adjusts a period for enabling a transmitter, and includes a data delay circuit delaying data to generate transmission data; a transmission/reception terminal; a receiver receiving reception data transferred to the transmission/reception terminal, in response to a reception enable signal; a transmitter transmitting the transmission data to the transmission/reception terminal in response to a transmission enable signal; a shift circuit generating a plurality of preliminary transmission enable signals by sequentially delaying a signal; a phase comparison circuit comparing a phase of each of the plurality of preliminary transmission enable signals and a phase of the transmission data; and a selection circuit selecting one of the plurality of preliminary transmission enable signals as a transmission enable signal according to a phase comparison result of the phase comparison circuit.

Abstract: A universal sensor interface system for a luminaire includes a sensor receiving cavity that is formed in the luminaire and defined by a sensor receiving receptacle. Further, the universal sensor interface system includes a sensor device that is configured to be removably coupled to the sensor receiving receptacle of the luminaire and disposed in the sensor receiving cavity. The sensor device receives electrical energy from the luminaire and establishes data communication with the luminaire when the sensor device is disposed in the sensor receiving cavity. The transfer of electrical energy and data communication between the luminaire and the sensor device are enabled either wirelessly or using connector systems such as a pogo connector system. The luminaire includes a translation engine that is configured to transform data received from the sensor device to a format that is compatible with the luminaire and/or a light control system of the luminaire and vice-versa.

Abstract: A bootstrap circuit including: a charge pump; a power unit including a bootstrap capacitor, wherein the bootstrap capacitor is charged using an output voltage of the charge pump; and a switch driver for generating a bootstrap signal based on a clock signal and an analog signal, wherein the analog signal is input to an analog switch, the switch driver for controlling the analog switch using the bootstrap signal, and including a first body switch connected between an input terminal and a body of the analog switch.

Abstract: A plurality of drive circuits each drive a corresponding one of a plurality of power semiconductor elements connected in parallel. Each of the drive circuits includes a control command unit, a current detector, a differentiator, and an integrator. The current detector detects a gate current that flows into a gate terminal of a corresponding one of the power semiconductor elements after the control command unit outputs a turn-on command. The differentiator performs time differentiation of the gate current detected by the current detector. The integrator performs time integration of the gate current detected by the current detector. Based on a differential value and an integral value in each of the drive circuits, the determination unit determines whether an overcurrent state occurs or not in any of the plurality of power semiconductor elements.