Patents Examined by Anthony J Amoroso
  • Patent number: 11921573
    Abstract: Systems, methods, and computer-readable storage media configured to predict future system failures are disclosed. Performance metrics (e.g., key performance indicators (KPIs)) of a system may be monitored and machine learning techniques may utilize a trained model to evaluate the performance metrics and identify trends in the performance metrics indicative of future failures of the monitored system. The predicted future failures may be identified based on combinations of different performance metrics and the impact that the performance metric trends of the group of different performance metrics will have on the system in the future. Upon predicting that a system failure will occur, operations to mitigate the failure may be initiated. The disclosed embodiments may improve overall performance of monitored systems by: increasing system uptimes (i.e.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: March 5, 2024
    Assignee: Accenture Global Solutions Limited
    Inventors: Badrinarayanan Damal Vijayaraghavan, Atul Goel, Harshith Vuppala, Rani Gopalakrishnan
  • Patent number: 11921596
    Abstract: A data storage infrastructure may establish a partition that includes a first data center and a second data center that is geographically separated from the first data center. The data storage infrastructure may replicate a full snapshot and one or more incremental snapshots of a virtual machine from a first data management platform to a second data management platform, where the virtual machine is migrated from a first host of the first host group to a second host of the second host group upon a failover event occurring at the first data center. The data storage infrastructure may then capture an incremental snapshot of the virtual machine based on linking a first instance of the virtual machine that was replicated from the first data management platform and a second instance of the virtual machine that is managed by the second data management platform.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: March 5, 2024
    Assignee: Rubrik, Inc.
    Inventors: Disheng Su, Bharadwaj Rayala, Li Ding
  • Patent number: 11914458
    Abstract: Systems and methods are disclosed herein for monitoring, detecting, and mitigating hardware and software failures. An error detection module monitors the execution of software processes and detects failures of the monitored processes. The error detection module may monitor reboot events and correlate reboot events with failures of the monitored software processes. If a monitored process fails, the error detection module may log the failure and its cause. If the same process has failed numerous times, causing the user device to experience a reboot loop, remedial action may be taken based on the cause of the failure.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: February 27, 2024
    Assignee: Rovi Guides, Inc.
    Inventors: Todd Kulick, Igor Pichkov
  • Patent number: 11914481
    Abstract: A system and method for configuring fault tolerance in nonvolatile memory (NVM) are operative to set a first threshold value, declare one or more portions of NVM invalid based on an error criterion, track the number of declared invalid NVM portions, determine if the tracked number exceeds the first threshold value, and if the tracked number exceeds the first threshold value, perform one or more remediation actions, such as issue a warning or prevent backup of volatile memory data in a hybrid memory system. In the event of backup failure, an extent of the backup can still be assessed by determining the amount of erased NVM that has remained erased after the backup, or by comparing a predicted backup end point with an actual endpoint.
    Type: Grant
    Filed: January 13, 2023
    Date of Patent: February 27, 2024
    Assignee: NETLIST, INC.
    Inventors: Scott H. Milton, Jeffrey C. Solomon, Kenneth S. Post
  • Patent number: 11899951
    Abstract: A micro controller unit (MCU) includes a flash memory, wherein the flash memory determines a key value of an application when the MCU is powered on, and, when the key value of the application is invalid, the flash memory enters a mode that enables reprogramming of the flash memory.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: February 13, 2024
    Assignee: LG ENERGY SOLUTION, LTD.
    Inventor: Hojoon Lee
  • Patent number: 11892901
    Abstract: Disclosed are data gathering and analysis systems, methods, and computer-readable storage media to facilitate an investigation process. The method includes accessing a data object representing an investigative issue as part of initiating an investigative session. The method further includes causing presentation, on a display of a device, of a user interface configured to receive user search queries and present search results for each received search query. The method further includes tracking user activity including one or more user actions performed during the investigative session. The method further includes creating a record of the user activity, and linking the record of the user activity with the data object representing the investigative issue.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: February 6, 2024
    Assignee: Palantir Technologies Inc.
    Inventors: David Skiff, Allen Cai, Benjamin Lee, Christopher Yu, Hind Kraytem, Jason Ma, Myles Scolnick, Tarik Benabdallah, Zhixian Shen
  • Patent number: 11886314
    Abstract: A memory device is provided to include: a plurality of memory cells; a peripheral circuit configured to perform an operation on the plurality of memory cells; a temperature circuit configured to measure a temperature of the memory device; a monitoring component configured to generate, based on whether a measured temperature is within a reference range, monitoring information representing an operation mode that is either a normal mode in which the operation is performed or a protection mode in which the operation is suspended; and an operation controller configured to output a signal for controlling the operation according to the monitoring information. The monitoring component is further configured to store the monitoring information and output the monitoring information to the operation controller in response to receiving the measured temperature from the temperature circuit.
    Type: Grant
    Filed: January 4, 2022
    Date of Patent: January 30, 2024
    Assignee: SK HYNIX INC.
    Inventors: Jung Ae Kim, Jee Yul Kim
  • Patent number: 11874728
    Abstract: A diagnostics tool aids in the efficient collection of relevant error data for addressing faults in connected software systems. Context information is collected from a software system that is being displayed. Configuration of the software system is collected, and used to identify relevant connected software systems. Error data is collected via respective log interfaces from the error logs of the software system being displayed, and relevant connected systems. The context, configuration, and error data is stored in a database. Based at least upon the configuration information, a query is formulated and posed to the database. A corresponding query result is received and processed to return an error report to a user interface, for inspection (e.g., by a user or a support staff member). Certain embodiments may further generate an appropriate recommendation based upon the query result. The recommendation may be generated with reference to a stored ruleset and/or artificial intelligence.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: January 16, 2024
    Assignee: SAP SE
    Inventor: Tobias Moessle
  • Patent number: 11860758
    Abstract: A system is described that obtains first performance data collected during execution of a first application at a first group of computing devices, determines, based on the first performance data, at least one metric for quantifying performance of the first application, and compares the at least one metric to a corresponding benchmark derived from second performance data collected during execution of one or more second applications at a second group of computing devices. Each of the one or more second applications being different than the first application. The system determines whether the at least one metric is within a threshold amount of the corresponding benchmark, and further determines, determines, based at least in part on the at least one metric is not within the threshold amount of the corresponding benchmark, a fix to the first application and outputs, for presentation at a developer device, an indication of the fix.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: January 2, 2024
    Assignee: Google LLC
    Inventors: Fergus Gerard Hurley, Dino Derek Hughes, Olivier Benoit Gaillard, David Renaud Ghislain Chapelier, Johannes Tonollo, Simon James MacMullen, Yevhen Anisimov, Ioannis Ilkos, Benjamin Miles
  • Patent number: 11853151
    Abstract: An embedded device detection method, comprising the following steps: executing a task by an embedded device, wherein the task comprises multiple functions; when an abnormal interruption occurs to the task, obtaining a stack pointer and a program counter corresponding to the abnormal interruption by a detection device, wherein the program counter is configured to record a memory address in use when the abnormal interruption occurs to the task; obtaining a stack space corresponding to a first target function being executed according to the program counter when the abnormal interruption occurs to the task; finding out a second target function before the first target function is executed according to the stack pointer and the stack space; and correcting the task according to the second target function.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: December 26, 2023
    Assignee: Realtek Semiconductor Corporation
    Inventors: Siwei Jiang, Kun-Hsuan Wu, Hong Zhang, Shuyu Deng
  • Patent number: 11847619
    Abstract: At least some example embodiments provide a system-state monitoring method and device and a storage medium. The method includes determining a standard operation mode of a system, the standard operation mode including a plurality of operation states of the system in a unit time period. The method further includes determining, according to current operation data of the system, a current operation mode of the system and determining, by comparing the current operation mode with the standard operation mode, whether or not the system is in the standard operation mode. The plurality of operation states of the system are determined to be the standard operation mode, such that changes in system operation patterns can be readily detected, thereby facilitating a timely adjustment of the monitored system or peripheral mechanisms in cooperation therewith and improving system performance.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: December 19, 2023
    Assignee: SIEMENS LTD., CHINA
    Inventors: Lin Fei Zhou, Xiao Liang, Jing Li, Daniel Schneegass
  • Patent number: 11847013
    Abstract: Data associated with a write request is stored at a storage device of multiple solid-state storage devices. A determination as to whether the data stored at the storage device is readable is made by determining whether a number of subsequent programming operations have been performed since the data was stored at the storage device. A notification that the stored data is readable from the storage device is generated upon determining that the data is readable.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: December 19, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Gordon James Coleman, Andrew R. Bernat, Peter E. Kirkpatrick
  • Patent number: 11841776
    Abstract: Methods, systems and apparatuses may provide for technology that includes a chip having a first die including a first processing logic to execute a first application instance and generate a first output of the first application instance, and a second processing logic to execute a second application instance and generate a second output of the second application instance. The chip may also include a second die coupled to the first die, wherein the second die includes a safety monitor detect a condition associated with one or more of an error in the first output, an error in the second output, or a discrepancy between the first output and the second output. The safety monitor may also initiate a transition of the chip into a safe state in response to the condition.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: December 12, 2023
    Assignee: Intel Corporation
    Inventors: Nabajit Deka, Riccardo Mariani, Asad Azam, Roger May, Prashanth Gadila
  • Patent number: 11836064
    Abstract: A method of monitoring an operating state of a computing device includes running a system agent on the computing device. An introduced process is executed on the computing device, and a captured parameter relating to at least one of the system agent and the introduced process is captured. The captured parameter is compared to at least one pre-determined parameter. Where the captured parameter differs from the pre-determined parameter by more than a pre-determined threshold, a signal indicative of a change in operating state of the computing device is output.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: December 5, 2023
    Assignee: 1E Limited
    Inventor: Andrew Mayo
  • Patent number: 11822445
    Abstract: Methods and systems are provided for rapid failure recovery for a distributed storage system for failures by one or more nodes.
    Type: Grant
    Filed: January 10, 2023
    Date of Patent: November 21, 2023
    Inventors: Maor Ben Dayan, Omri Palmon, Liran Zvibel
  • Patent number: 11815994
    Abstract: Embodiments may generally be directed to systems and techniques to detect failure events in data pipelines, determine one or more remedial actions to perform, and perform the one or more remedial actions.
    Type: Grant
    Filed: February 24, 2023
    Date of Patent: November 14, 2023
    Assignee: Capital One Services, LLC
    Inventor: Patrice Bramble
  • Patent number: 11815995
    Abstract: A memory device is provided that includes a memory array including a first array, a first redundant array that is local to the first array, a second array, and a second redundant array that is local to the second array, a cache array including a first cache, a first redundant cache that is local to the first cache, a second cache and a second redundant cache that is local to the second cache, and circuits comprising logic to execute operations. The operations include, responsive to an identification of a defective column in the first array, performing a local defect write repair and responsive to an identification of another defective column in the first array and a determination that the first redundant array is fully utilized, performing a global defect write repair by transferring data into the second redundant array through the first cache and the second redundant cache.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: November 14, 2023
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Che-Wei Liang, Shuo-Nan Hung, Hung-Wei Lu, Ming-Cheng Tu
  • Patent number: 11809452
    Abstract: A method for facilitating data synchronization across a plurality of platforms is provided. The method includes retrieving a change event, the change event corresponding to an event stream from a first platform; parsing the change event to identify a record and a data operation; examining a synchronization database to determine whether a corresponding record is persisted in a database of a second platform; inserting the record into the synchronization database when the corresponding record is not persisted in the platform, the inserted record including a change indicator; and updating, by using the synchronization database, the database of the second platform to include the record.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: November 7, 2023
    Assignee: JPMORGAN CHASE BANK, N.A.
    Inventors: Stanley M Devan, Satyajit Arivukkodi Krishnamurthy, Naga Virajitha Kommera, David Anthony Quesenberry, Kenneth L. Nieman
  • Patent number: 11803452
    Abstract: A duplex operation system including: a plurality of general-purpose devices on each of which a plurality of virtual machines are mounted; and a virtual machine controller that controls a duplex operation performed by two systems, an active system and a standby system, of the virtual machines. When detecting a failure of the active system, the virtual machine controller stops the virtual machine of the active system, activates the virtual machine of the standby system corresponding to the stopped active system, and reconfigures the standby system of the activated virtual machine on the hardware of the stopped virtual machine, and when detecting a failure in the virtual machine of the reconfigured standby system, the virtual machine controller reconfigures the standby system of the failed virtual machine on the general-purpose device 13 different from the general-purpose device 11 in which the virtual machine of the active system has been stopped.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: October 31, 2023
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Takato Toda, Nobuhiro Kimura, Kotaro Mihara
  • Patent number: 11797373
    Abstract: An integrated circuit includes a functional circuit, a detection circuit, a processing circuit, and a recovery circuit. The detection circuit detects a fault in the functional circuit and generates a fault indication indicative of the detected fault. The processing circuit receives the fault indication and identifies a functional domain identifier (ID) associated with the fault. Based on the fault indication, the processing circuit generates context tag data that is indicative of a type of the fault and an operational state of the functional circuit when the fault is detected therein. Further, the processing circuit assigns a priority level to the fault based on the context tag data and the functional domain ID. The recovery circuit performs, based on the functional domain ID, the context tag data, and the first priority level, a recovery operation to recover the functional circuit from the fault.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: October 24, 2023
    Assignee: NXP B.V.
    Inventors: Neha Srivastava, Ankur Behl