Abstract: A method for detecting an anomaly includes retrieving a log file that includes log entries, grouping the log entries into clusters of log entry types based on number of occurrences and average time interval, and discovering a sequence of the log entry types within each of the clusters. The sequence of the log entry types is based on a shortest path from a first one of the log entry types to a last one of the log entry types.

Abstract: An anomaly with a disk array enclosure (DAE) of a set of DAEs connected to a host server is detected. Each DAE is chained to another DAE by first and second chains and includes a serial attached SCSI (SAS) expander and a peer SAS expander. The SAS expander in a DAE forms part of the first chain. The peer SAS expander in the DAE forms part of the second chain. Upon detection, DAE log collection is triggered to obtain logs for storage in a repository, separate from the DAEs. The logs are tagged with an anomaly class of a set of anomaly classes. For each anomaly class, a number of logs stored in the repository is limited to a threshold number.

Abstract: A data processing apparatus (2) has scalar processing circuitry (32-42) and vector processing circuitry (38, 40, 42). When executing main scalar processing on the scalar processing circuitry (32-42), or main vector processing using a subset of said plurality of lanes on the vector processing circuitry (38, 40, 42), checker processing is executed using at least one lane of the plurality of lanes on the vector processing circuitry (38, 40, 42), the checker processing comprising operations corresponding to at least part of the main scalar/vector processing. Errors can then be detected based on a comparison of an outcome of the main processing and an outcome of the checker processing. This provides a technique for achieving functional safety in a high end processor with better performance and reduced hardware cost compared to a dual/triple core lockstep approach.

Abstract: Methods, apparatus, and processor-readable storage media for automated alert augmentation for deployments of software-defined storage are provided herein. An example computer-implemented method includes obtaining an alert from at least one software-defined storage device; determining one or more items of additional information pertaining to one or more of the alert and the at least one software-defined storage device; augmenting the alert based at least in part on the one or more determined items of additional information; generating a modified version of the augmented alert by incorporating, into the augmented alert, dependency information pertaining to the at least one software-defined storage device and one or more additional software-defined storage devices; and performing one or more automated actions based at least in part on the modified version of the augmented alert.

Abstract: Systems and methods reduce processor access time to different system memories. One such system comprises a tightly-coupled memory (TCM) that stores a first of N parts of a firmware binary image; multiple memory regions, which store a second to Nth part of the firmware binary image respectively, each of the memory regions being coupled to a bus; a processor coupled to the TCM and that executes the parts of the firmware binary image; and a memory manager hardware accelerator coupled between the processor and the bus, and that predicts which part of the firmware image is to be executed next, while the processor executes a different part of the firmware image.

Abstract: A method includes monitoring a temperature of a memory component of a memory sub-system to determine that the temperature of the memory component corresponds to a first monitored temperature value; writing data to the memory component of the memory sub-system while the temperature of the memory component corresponds to the first monitored temperature value; determining that the first monitored temperature value exceeds a threshold temperature range; monitoring the temperature of the memory component of the memory sub-system to determine that the temperature of the memory component corresponds to a second monitored temperature value that is within the threshold temperature range; and rewriting the data to the memory component of the memory sub-system while the temperature of the memory component corresponds to the second monitored temperature value.

Abstract: Methods and systems are provided for rapid failure recovery for a distributed storage system for failures by one or more nodes.

Abstract: A memory controller receives, via a first interface, a first read request requesting a requested data granule. Based on receipt of the first read request, the memory controller transmits, via a second interface, a second read request to initiate access of the requested data granule from a system memory. Based on a determination to schedule accelerated data delivery and receipt by the memory controller of a data scheduling indication that indicates a timing of future delivery of the requested data granule, the memory controller requests, prior to receipt of the requested data granule, permission to transmit the requested data granule on the system interconnect fabric. Based on receipt of the requested data granule at the indicated timing and a grant of the permission to transmit, the memory controller initiates transmission of the requested data granule on the system interconnect fabric and transmits an error indication for the requested data granule.

Abstract: Disclosed are implementations for software debugging and application development, including a method that includes receiving instrumentation requests for application data resulting from execution of an application process on an application system, generating from the received instrumentation requests injection point objects configured to obtain blocks of application data, determining risk of adverse impact by an injection point object on performance and/or state of the application system, and processing the injection point object based on the determined risk of adverse impact.

Abstract: In a fault processing method, when it is determined that a computer crashes, a baseboard management controller in the computer can send a read request message to a processor in the computer, where the read request message is used for requesting reading of first error data recorded by the processor, receive a read response message returned by the processor, and obtain, according to the read response message, the first error data recorded by the processor.

Abstract: Based on a test step execution order for a test case such as one against a database system, a specific test step to be executed next is identified. In response to identifying the specific test step, a test step message is published to indicate that the specific test step is to be executed next, which causes a subscriber of the test step message to execute the specific test step. In response to determining that the specific test step has ended, a dependent test step message is published accordingly to cause a subscriber of the dependent test step message to perform: determining whether a next test step should be executed following the specific test step in the test step execution order; in response to determining that a next test step should be executed, the foregoing may be repeated by using the next test step in place of the specific test step.

Abstract: Exemplary methods, apparatuses, and systems include a hypervisor receiving an error message from an agent within a first virtual machine run by the hypervisor. In response to the error message, the hypervisor determines and initiates a corrective action for the hypervisor to take in response to the error message. An exemplary corrective action includes initiating a reset of the first virtual machine or a reset of a second virtual machine.

Abstract: A memory device comprises a memory control unit including a processor configured to control operation of the memory array according to a first memory management protocol for memory access operations, the first memory management protocol including boundary conditions for multiple operating conditions comprising program/erase (P/E) cycles, error management operations, drive writes per day (DWPD), and power consumption; monitor operating conditions of the memory array for the P/E cycles, error management operations, DWPD, and power consumption; determine when a boundary condition for one of the multiple operating conditions is met; and in response to determining that a first boundary condition for a first monitored operating condition is met, change one or more operating conditions of the first memory management protocol to establish a second memory management protocol for the memory access operations, the second memory management protocol including a change boundary condition of a second monitored operating con

Abstract: A memory system, a memory controller and an operating method are disclosed. By dividing a read count table including read count values respectively for a plurality of memory blocks into one or more read count table segments each including one or more read count values of a resolution, and managing one or more flags respectively corresponding to the read count table segments, and set the flag corresponding to the read count table segment in which at least one read count value is changed among the read count table segments, it is possible to minimize additional operational costs required to recover the read count table upon occurrence of an SPO.

Abstract: According to one embodiment, in response to a request to revert a virtual machine (VM) to a previously backed up consistent state, whether there are one or more existing consistent states on the VM is determined. In response to determining that there are one or more existing consistent states on the VM, a consolidation or deletion of the one or more existing consistent states is initiated based on a selection to consolidate or to delete the one or more existing consistent states. Whether the consolidation or deletion of the one or more existing consistent states was successful is determined. A recovery operation to revert the VM to the previously backed up consistent state is initiated in response to determining that the consolidation or deletion of the one or more existing consistent states was successful.

Abstract: The present disclosure relates to an assembly including a first processor having a first core, a second core and a controller, and a second processor having a first core, and wherein the first core and the second core of the first processor, and the first core of the second processor are configured to execute a first procedure. The controller of the first processor is configured to compare a first result from executing the first procedure on the first core of the first processor with a second result from executing the first procedure on the second core of the first processor; and comparing each of the first and second results with a third result from executing the first procedure on the first core of the second processor, if the first and second results differ from one another.

Abstract: Embodiments are disclosed for managing heap metadata corruption. The techniques include detecting a metadata corruption error in a first heap disposed in a first region of memory. The techniques also include generating a second heap in a free memory region that is disposed beyond a break value address of a memory allocation system. The techniques further include updating a first entry for the first heap in a heap directory. Additionally, the techniques include generating a second entry for the second heap in the heap directory. The techniques also include processing a call to the memory allocation system for the first heap based on the first entry and the second entry.

Abstract: A computer-implemented method and system of testing and maintaining outage resilience of server resources of a server infrastructure by means of a hybrid simulation is presented. The server infrastructure comprises a plurality of servers executing a plurality of applications and the method comprises measuring a processor utilization for each of the servers of the server infrastructure, determining a resilience ratio of the server infrastructure by simulating the outage of at least one of the servers based on the measured processor utilization, and in response to the resilience ratio of the server infrastructure falls below a resilience threshold, initiating an assignment of additional resources for executing at least one of the plurality of applications to the server infrastructure.

Abstract: A method of testing an operations support system (OSS). The method comprises receiving an input by a test tool executing on a computer system from a user interface of the test tool selecting an OSS application to test, querying the data store by the test tool for test system configuration information associated with the selected OSS application, automatically generating test case OSS input data by the test tool, testing a plurality of different user interface screens of the OSS by the test tool based on the test system configuration information associated with the selected OSS application and based on the automatically generated test case OSS input data, capturing screen shots of test results presented in the user interface screens of the OSS by the test tool, and storing the screen shots of test results in a test results data store.

Abstract: A storage system includes a first storage controller including a plurality of main storage media and one or more processor cores, and a second storage controller including a plurality of main storage media and one or more processor cores and performing communication with the first storage controller. Storage areas of the main storage media in the first storage controller are allocated to an address map. In response to the occurrence of failures in one or mode main storage media of the main storage media of the first storage controller, the first storage controller performs restarting to reallocate the storage areas of the main storage media excluding one or more main storage media having caused the failures to an address map reduced than before the occurrence of the failures. The second storage controller continues operating during the restarting of the first storage controller.