Abstract: An apparatus and method for building and operating of a YIG-based filter-attenuator module with closed-loop control. The module combines both signal filtering and amplitude control functions by utilizing an yttrium-iron-garnet (YIG) resonator. A technique for a closed-loop calibration and control also disclosed. This apparatus and method provides a cost effective harmonic rejection/amplitude control solution for microwave test-and-measurement instruments such as signal generators and spectrum analyzers.

Abstract: The invention relates to a method for operating a mechanical resonator in an electronic oscillator, comprising determining a state space description of the resonator, in which state variables are the mass, the stiffness or dimensions of components used in the crystal resonator; providing a table with frequency correction factors as a function of a state space of a resonator; finding a frequency correction factor corresponding to the determined state space; and multiplying the output frequency of the resonator with the correction factor, and to an electronic oscillator, comprising a mechanical resonator, wherein an output frequency of the oscillator is multiplied by a frequency correction factor, the frequency correction factor being obtained from determination of the state variables of the resonator, in particular dominant mechanical state variables.

Abstract: A slow-clock calibration method, a slow-clock calibration unit, a clock circuit and a mobile communication terminal are provided. The calibration method includes: obtaining a current temperature of the crystal; searching a unique frequency-divide coefficient corresponding to the current temperature from a preset data base; if the coefficient is found in the data base, inputting the unique coefficient into a frequency divider; if the coefficient is not found in the data base, obtaining an actual sleep length of the mobile communication terminal, if the actual sleep length is not equal to a required sleep length, calculating a required frequency-divide coefficient and updating the data base with the required frequency-divide coefficient, and if the actual sleep length of the mobile communication terminal is equal to the required sleep length, updating the data base with a current frequency-divide coefficient. Accordingly, slow-clock calibration is realized with reduced crystal costs.

Abstract: An apparatus comprises a digitally controlled circuit having a variable capacitance and a controller configured to adjust a magnitude of the variable capacitance of the digitally controlled circuit. The digitally controlled circuit comprises a plurality of gain elements, the plurality of gain elements comprising one or more positive voltage-to-frequency gain elements and one or more negative voltage-to-frequency gain elements. The controller is configured to adjust the magnitude of the capacitance by adjusting the gain provided by respective ones of the gain elements in an alternating sequence of the positive voltage-to-frequency gain elements and the negative voltage-to-frequency gain elements.

Abstract: Provided is an oscillation circuit that can limit a maximum value and a minimum value of a frequency even when some troubles are caused in a V/I conversion circuit. The oscillation circuit includes a current controlled oscillator configured to oscillate based on an input current, and a current limiting circuit configured to: compare the input current with a first constant current and with a second constant current; limit, when the input current reaches the first constant current, a maximum current value of the input current with a transistor arranged on a path of the input current; and limit, when the input current is lowered to the second constant current, a minimum current of the input current through addition of current on the path of the input current by a transistor arranged in parallel with the path of the input current.

Abstract: A technique includes using a first oscillator to clock operations of a radio of an integrated circuit (IC). The technique includes intermittently using the first oscillator to frequency tune a second oscillator of the IC.

Abstract: A system and method for emergency starting of a fuel cell vehicle is provided. In particular, a high-voltage converter, a balance of power (BOP), and a controller are included in the system. The high-voltage converter is configured such that one side thereof is connected to a high-voltage battery via a battery switch and the other side thereof is connected in parallel to a plurality of fuel cells. The BOP is connected in parallel to the high-voltage converter and the fuel cells. The controller is configured to control the power supplied from the high-voltage battery to the BOP without conversion by connecting the battery switch upon the failure of the high-voltage converter or high-voltage battery.

Abstract: The present disclosure is directed towards systems and method for actively tuning a phase locked loop based on vibration excitation levels experienced by the phase locked loop. A bandwidth of the phase locked loop can be actively increased or decreased based upon a detected vibration level. In an embodiment, the phase locked loop includes a controllable oscillator, an output module, a filter module and a detector. The filter module can be configured to receive a bandwidth control signal to modify a bandwidth of the phase locked loop based on a vibration signal. In an embodiment, the vibration signal corresponds to a vibration level experienced by the phased locked loop. The detector can be configured to receive a PLL output signal from the output module and to receive a PLL input signal.

Abstract: A dual-resonator YIG oscillator with a main YIG resonator and a stabilizing YIG resonator both suspended in a common magnetic field. The main YIG resonator takes on the high-Q factor aspects of the oscillator, while the stabilizing YIG resonator helps stabilize the operation of the main YIG resonator, and also allows the main YIG resonator operate at higher magnetic field strengths, achieving higher frequency operation. The stabilizing YIG resonator also enables the oscillator's active device to operate in a more linear, lower phase noise, regime. As compared to conventional YIG oscillators, the disclosed dual resonator YIG oscillator provides significant performance improvements, such as higher frequency operation, lower power consumption, higher tuning speed, and lower phase noise.

Abstract: A low-complexity differential inductor and common-mode impedance network for reducing effects of flicker noise in an oscillator output signal have been disclosed. An oscillator includes a planar conductive loop comprising a first terminal, a second terminal, and a center tap. The planar conductive loop is formed from a first conductive layer above an integrated circuit substrate. The center tap is coupled to a first power supply node. The oscillator includes a planar conductive structure extending from a first point proximate to the center tap. The planar conductive structure extends along a line of symmetry of the planar conductive loop to a second point proximate to the first terminal and the second terminal. The planar conductive structure may be formed from the first conductive layer and may be directly coupled to the center tap.

Abstract: A resonator element includes a substrate having a first region performing thickness shear vibration, a second region located in a periphery of the first region and having a smaller thickness than the first region, a fixed end, and a free end opposite to the fixed end in the first region in a plan view. Excitation electrodes are disposed on a front and a rear of the first region and have regions overlapping each other in the plan view. A center of the first region and a center of the regions overlapping each other are located between a center of the substrate and the free end in the plan view. When Cs is a distance between the center of the regions overlapping each other and the center of the substrate in the plan view, a relation of 105 ?m<Cs<130 ?m is satisfied.

Abstract: A phase locked loop system has a voltage-controlled variable-load ring oscillator (VLCO) that operates in a frequency band determined by a selected load on each stage of the ring oscillator. Each stage of the VLCO has multiple load selection transistors, each coupled to a load capacitor. Apparatus is provided for driving the load selection transistors according to a load configuration; and apparatus is provided for determining an operating load configuration such that a period of a divided reference signal approximately matches a period of a divided VLCO signal with the VLCO control voltage input clamped to a reference voltage. Once the load configuration is set, the loop is allowed to lock. In a particular embodiment, devices are provided for slowly tweaking the VLCO load to help keep the VLCO operating near an optimum control voltage despite drift of circuit parameters with temperature or time.

Abstract: A circuit may include a ring oscillator circuit and monitoring circuitry. The ring oscillator circuit has a group of inverters in a loop, whereby the group of inverters includes first, second, and third output nodes. The monitoring circuitry may monitor for error events in a signal that has passed through the inverters from any one of the first, second, or third output nodes, and may generate first and second monitoring circuitry outputs. The circuit may further include an error correction circuit that produces an error correction output based on the first and second monitoring circuitry outputs. Accordingly, the monitoring circuitry may generate first and second updated monitoring circuitry outputs based on the error correction output. The first and second updated monitoring circuitry outputs may be logically combined using a logic circuit to reset the signal that has passed through the loop.

Abstract: A crystal unit includes a crystal substrate, a pair of excitation electrodes formed respectively on both surfaces of the crystal substrate, and a coil pattern formed around at least one of the pair of excitation electrodes. An oscillator includes a package and a crystal unit accommodated in the package. The crystal unit includes a crystal substrate, a pair of excitation electrodes formed respectively on both surfaces of the crystal substrate, and a coil pattern formed around at least one of the pair of excitation electrodes. An oscillation circuit is accommodated in the package and electrically connected to the crystal unit.

Abstract: An electronic circuit comprises: an input terminal; an output terminal; first and second supply rails; first, second, third, and fourth field effect transistors, FETs, each of a first type and each having respective gate, source and drain terminals; and first and second loads. The source of the first FET is connected to the first supply rail, the drain of the first FET and the source of the second FET are connected to the output terminal, the drain of the second FET is connected to the second supply rail, the gate of the third FET and the gate of the fourth FET are connected to the input terminal, the drain of the third FET is connected to the second supply rail, the first load is connected between the first supply rail and the source of the third FET, and the second load is connected between the drain of the fourth FET and the second supply rail.

Abstract: The apparatus and method of the present invention is a closed loop system that obtains, stores and transfers motive energy. Preferably, the majority of the electricity generated by the method of the present invention is utilized to service a load or supplied to the grid. A portion of the electric power produced is used to recharge the batteries for subsequent use of the electric motor. The system of the present invention controls and manages the battery power by controlling the charging and discharging of the battery reservoir via a series of electrical and mechanical innovations controlled by electronic instruction using a series of devices to analyze, optimize and perform power production and charging functions in sequence to achieve its purpose.

Abstract: An oscillator includes a front side voltage divider, a rear side voltage divider, and an oscillation unit. The front side voltage divider includes a first resistor connected between a first and second potential sources, and a first output terminal configured to changeably connect to a connection position in the first resistor so as to vary an obtained output voltage. The rear side voltage divider includes a second resistor connected between the first output terminal and a third potential source; and a second output terminal configured to changeably connect to a connection position in the second resistor so as to vary an obtained output voltage. The oscillation unit includes a variable capacitance element with a capacitance varied according to the output voltage from the second output terminal. The oscillation unit varies an output frequency based on a variation in a resonance point associated with a variation in the capacitance.

Abstract: Methods and systems for a multi-core multi-mode voltage-controlled-oscillator (VCO) may comprise generating a plurality of oscillating signals utilizing a plurality of voltage controlled oscillators (VCOs) arranged symmetrically on an integrated circuit, where interconnects for the VCOs may be arranged in quiet zones at locations equidistant from each pair of the plurality of VCOs. An interconnection ring may be centered within the arranged VCOs that comprises at least two conductive lines that couple to output terminals of each of said plurality of VCOs. The plurality of VCOs may receive control signals from interconnects coupled to at least one conductive line in the interconnection ring. The plurality of VCOs may receive control signals from a conductive line in said interconnection ring. A positive terminal of a first VCO of a pair of adjacent VCOs of the plurality of VCOs may be coupled to a same conductive line of the interconnection ring as a negative terminal of a second of the pair of adjacent VCOs.

Abstract: A magnetoresistive effect oscillator executes a first step of applying a current, which has a first current density larger than a critical current density JO for oscillation, to a magnetoresistive effect element for a time TP, and then executes a second step of applying a current, which has a second current density JS smaller than the first current density and not smaller than the critical current density JO for oscillation, to the magnetoresistive effect element. The following formulae (1), (2) and (3), or the following formulae (1) and (4) are satisfied on an assumption that an average value of the first current density during the time TP in the first step is JP, a critical current density for magnetization reversal of the magnetoresistive effect element is JR, and a magnetization reversal time of the magnetoresistive effect element is TR: 0.1 × T R ? ( J R - J O ) J p - J S < T p < 0.

Abstract: Various aspects of an injection-locked oscillator and method for controlling jitter and/or phase noise are disclosed herein. In accordance with an embodiment, an injection-locked oscillator includes one or more circuits that are configured to receive a pair of complementary phase output signals from one or more gain stages of the injection-locked oscillator. The one or more circuits may be configured to receive one or more switching signals. The received pair of complementary phase output signals are shorted by use of the one or more received switching signals. The shorting reduces the phase difference between an input signal and an output signal of the injection-locked oscillator.