Abstract: A method for performing new material development. The method comprises receiving a user simulation scenario from a user wherein the user simulation scenario is in a-cyclic graph format and includes a plurality of material development modules represented as vertices. The user simulation scenario also includes a starting module. Each vertex includes data information including at least one input file source and at least one output file destination. Relationships between the modules are represented as edges and each edge includes at least one of previous module and subsequent module. Each edge also includes data flow information between the previous module and the subsequent module. The method further comprises receiving a request to invoke the user simulation scenario and the request includes the input file source for the starting module. Traversing the vertices along the edges is performed in response to receiving the request and to the data flow information.

Abstract: A portable train simulator, including a microprocessor, a display and an input device for the microprocessor. A first program drives the display to depict indicia of a control stand and to respond to control inputs from the input device. A second program drives the display to depict a track to be traversed from a data file in response to the control inputs. A virtual control stand is one of the elements that allows the true portability of a train simulator. The system can display and switch between the present operating parameters of the train and/or a history of the operating parameters of the train, as selected by the input device. Thus, the system can switch from playback mode to simulation mode to provide a take-over of recorded conditions to allow an operator to explore alternate methods for managing the train.

Abstract: A virtual speaker demonstration system is disclosed that permits a retail outlet to use a reference speaker to demonstrate the performance of multiple different demonstration speakers. A user interface permits a user to select a demonstration speaker and signal processing is performed so that the output from the reference speaker simulates the output of the selected demonstration speaker. The invention provides benefits to all three of the consumer, the retailer, and the manufacturer. The consumer can listen to and compare multiple demonstration speakers easily and conveniently from the same reference speaker. The retailer to use a single (or few) reference speaker to demonstrate the performance of multiple demonstration speakers, saving costs and space. The manufacturer to be able to display and demonstrate to consumers a broader range of the manufacturer's product line.

Abstract: An engine crankshaft torque observer (10) and method of operation. An engine combustion process (14) is modeled (26) to develop modeled pressure estimates of combustion chamber pressures in engine cylinders according to certain engine inputs, such as fuel (20), EGR (22), and timing (24), that influence combustion chamber pressures. Kinematics (16) relating reciprocal motion of pistons in the engine cylinders to an engine crankshaft and engine friction (18) relating running friction of the engine to engine crankshaft rotation are also modeled (28; 30). A processor processes the certain engine inputs through the combustion process model to develop modeled pressure estimates which are processed through the kinematics model to develop modeled positive torque contribution due to combustion processes and through the friction model to develop modeled torque loss due to running friction.

Abstract: A processor based computer system having dependency checking logic and a register stack, wherein the system overrides the dependency logic such that move instructions associated with the stack registers may be executed in parallel. The system operates such that it can be determined whether a stack underflow exception has occurred and if it has, the move instructions can be flushed, and a micro-code handler algorithm invoked that operates to allow execution of the move instructions in parallel without a stack underflow exception.

Abstract: What is described is a method to reduce variations in signal delays along paths in a design of an integrated circuit by balancing wire widths. The method operates by performing a circuit simulation to determine simulated signal delays along the circuit paths based on first wire widths for a given circuit, then running a delay model analysis to calculate predicted signal delays along the circuit paths based on first wire widths for the given circuit. The method then calculates a correction difference between the predicted signal delays and the simulated signal delays, and derives delay targets from the correction difference. Finally, the method calculates second wire widths using the delay model analysis to meet the delay targets. Preferably, the signal delays are clock signal delays, the circuit simulation is a SPICE circuit simulation, and the delay model is an Elmore delay model. Also described is a system which includes a CPU and certain memory components for accomplishing the method.

Abstract: Methods and apparatuses for structure prediction based on model curvature are described. A simulation result corresponding to an integrated circuit or other structure is generated. The result includes contour data representing a feature value, for example, height (or intensity) of the structure at various points. Three or more points are used to determine a curvature of the result at a predetermined location. The curvature information can be used to determine boundaries of the structure. For example, when used with an integrated circuit layout, the curvature can be used for optical and process correction (OPC) purposes to modify an integrated circuit layout such that the resulting integrated circuit more closely resembles the designed integrated circuit than would otherwise be possible. In one embodiment, both slope and curvature of the integrated circuit structure are used for OPC purposes.

Abstract: The present invention is a method of simulating the effects of a plurality of channels on a signal that includes the steps of acquiring a state transition matrix for each of said plurality of channels; acquiring an error matrix for each of said plurality of channels; selecting the first channel to be simulated; assuming that the signal is in a particular state; receiving the signal; generating a first number; determining the state to which the signal transitions; transitioning the signal to the state determined in the last step; generating a second number; determining what errors, if any, to inject into the signal by comparing the second number to entries in the column of the error matrix of the corresponding channel that matches the state of the signal; if one of the errors determined in the last step is lost signal then discarding the signal, not injecting any other error into the signal, selecting another channel if the user desires, assuming that the next signal selected is in the same state to which the

Abstract: A method of efficiently simulating logic designs comprising signals that are capable of having more than two unique decimal values and one or more unique drive states, such as designs based upon the new N-nary logic design style, is disclosed. The present invention includes a signal model that models N-nary signal value, drive strength, and signal definition information in a specific format that supports the ability of the simulator to simulate the operation of the N-nary logic gates such as adders, buffers, and multiplexers by arithmetically and logically manipulating the unique decimal values of the N-nary signals. The simulator comprises an input logic signal model reader, an arithmetic/logical operator, an output logic signal model generator, and an output message generator that generates one or more output- or input-signal-specific output messages that pack relevant simulation data into a format optimized to the architecture of the simulation host.

Abstract: A method of processing a figure and a recorded medium are used to obtain an enlarged figure or a reduced figure by moving the sides of a polygon, which is composed by putting a plurality of horizontal trapezoids upon each other, each of the trapezoids having upper and lower sides parallel to the X-axis, in the direction of the Y-axis to the outside or inside of the polygon in parallel with each other. The method comprises the steps of: selecting an objective horizontal trapezoid, extracting first, second and third groups of segments regarding the objective, lower and upper horizontal trapezoids, creating new first, second and third groups of segments moved to outside or inside of the polygon, removing unnecessary groups of segments, sorting the contact point and the division point, drawing parallel lines parallel to X-axis from the contact and division points, and storing the contact and division points included in the parallel line.

Abstract: An information design system uses an input module, a construction module, a performance metrics module, and an output module to create and output several models of a proposed information design system. The input module receives descriptive input which is validated and transformed into quantitative input. The construction module uses the quantitative input and information from a library of hardware and software component models to create and calibrate one or more models. The performance metrics module calculates performance metrics for the models, which then can be compared based on these metrics. A preferred information system design can then be selected from the models.

Abstract: The present invention provides a method of connecting dissimilar finite element meshes. A first mesh, designated the master mesh, and a second mesh, designated the slave mesh, each have interface surfaces proximal the other. Each interface surface has a corresponding interface mesh comprising a plurality of interface nodes. Each slave interface node is assigned new coordinates locating the interface node on the interface surface of the master mesh. The slave interface surface is further redefined to be the projection of the slave interface mesh onto the master interface surface.