Abstract: A technique to arbitrate computer memory request signals includes selecting a first memory request signal (associated with a first requestor), associating an access count value with the first memory request signal, and allowing the first memory requestor to access the computer memory access count value consecutive times.

Abstract: A processor employing a dependency link file. Upon detection of a load which hits a store for which store data is not available, the processor allocates an entry within the dependency link file for the load. The entry stores a load identifier identifying the load and a store data identifier identifying a source of the store data. The dependency link file monitors results generated by execution units within the processor to detect the store data being provided. The dependency link file then causes the store data to be forwarded as the load data in response to detecting that the store data is provided. The latency from store data being provided to the load data being forwarded may thereby be minimized. Particularly, the load data may be forwarded without requiring that the load memory operation be scheduled.