Patents Examined by David Chen
  • Patent number: 11979463
    Abstract: Systems and method for updating vehicles during transport. In particular, systems and methods are provided for transport vehicles to provide secure wireless updates to autonomous vehicles being transported. By updating vehicles during transport, significant time savings can be achieved, as vehicles can arrive at a destination ready for deployment. A secure protocol can be used by the transport vehicle for the updates to protect software and other data.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: May 7, 2024
    Assignee: GM Cruise Holdings LLC
    Inventor: Wilbur O Araujo
  • Patent number: 11968566
    Abstract: A system described herein may maintain records, in a distributed ledger, that include parameters (e.g., Quality of Service (“QoS”) parameters and/or Multi-Access/Mobile Edge Computing (“MEC”) device management parameters) that are associated with particular applications and/or MEC operator systems. The system may identify a particular record, from the distributed ledger, that is associated with a particular MEC operator system. The particular record may indicate a first set of MEC configuration parameters implemented by the MEC device operator system, and one or more triggers based on which the first set of MEC configuration parameters were implemented by the MEC device operator system. The system may record a set of modified application parameters, that are generated based on the identified first set of MEC configuration parameters and the one or more triggers, to the distributed ledger.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: April 23, 2024
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Raghuram Parvataneni, John Patrick Hickey, III, Syed Rehman, Anil K. Guntupalli, Mahesh Chapalamadugu
  • Patent number: 11962628
    Abstract: A system and method for improving event and user communications and experiences. (e.g., managing meetings and their participants) is disclosed. By treating events such as meetings and their participants (meeting leaders and invited attendees) as a managed system, the present invention improves the quality and outcomes of meetings and the satisfaction of the participants. The present invention also makes joining of this intelligently-managed system particularly simple for new as well as returning participants, by providing a unique approach to the issues at the pre-meeting, meeting, and post-meeting phases in order to generate scores for the particular meeting, each participant (meeting leader and attendees), and a meeting graph linking the performance of each participant (meeting leader and attendees). This score is used to adjust and predict participant (meeting leader and attendees) behavior in subsequent meetings.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: April 16, 2024
    Assignee: Stretch Meetings, Inc.
    Inventors: Beth Polish, Nathaniel Polish, Seth Godin, Robert Gehorsam
  • Patent number: 11961781
    Abstract: The present disclosure relates to a radio frequency device that includes a mold device die and a multilayer redistribution structure underneath the mold device die. The mold device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion, and a first mold compound with nanotube particles. The FEOL portion includes isolation sections and an active layer surrounded by the isolation sections. The nanotube particles are dispersed throughout a bottom portion of the first mold compound, and have a higher thermal conductivity than the first mold compound alone. The bottom portion of the first mold compound resides over the active layer and top surfaces of the isolation sections. The multilayer redistribution structure includes a number of bump structures, which are at a bottom of the multilayer redistribution structure and electrically coupled to the FEOL portion of the mold device die.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: April 16, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, Todd Gillenwater
  • Patent number: 11963379
    Abstract: A display device includes: a display panel including a display region and a non-display region; a window member on the display panel; and an adhesive member between the display panel and the window member. The adhesive member includes: a first adhesion portion overlapping the display region, and a second adhesion portion extending from the first adhesion portion and overlapping the non-display region. The display panel includes: a substrate, a display element layer on the substrate and overlapping the display region, a driving chip on the substrate and overlapping the non-display region, and an encapsulation member on the display element layer. The driving chip is configured to provide a driving signal to the display element layer. The first adhesion portion connects the window member to the encapsulation member. The second adhesion portion connects the window member to the substrate and encloses the driving chip, but does not overlap the driving chip.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: April 16, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Euiyun Jang, Cheolgeun An, Wonjoon Choi, Jeongho Hwang
  • Patent number: 11963403
    Abstract: A display device includes a first substrate. A transistor is disposed on the first substrate. A light-emitting element is connected to the transistor. An insulating layer is disposed between the transistor and the light-emitting element. A second substrate at least partially overlaps the first substrate. A color conversion layer is disposed on the second substrate. The insulating layer includes a first insulating layer and a second insulating layer. A distance between the first insulating layer and the first substrate is less than a distance between the second insulating layer and the first substrate. The first insulating layer includes a light blocking material.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: April 16, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seung Hyun Park, Joo Sun Yoon, Woo Sik Jun, Yun-Mo Chung
  • Patent number: 11942504
    Abstract: Image sensors include a pixel die that is stacked on a logic die. The logic die includes at least one function logic element disposed on a bond side thereof, and a logic oxide array of raised logic oxide features also disposed on the bond side. The pixel die includes a pixel array disposed on a light receiving side thereof, and a pixel oxide array of raised pixel oxide features disposed on a bond side of the pixel die. A plurality of outer bonds is disposed between an outer region of the logic die and an outer region of the pixel die. A plurality of inner bonds is formed at an inner region of the image sensor between the pixel oxide array and the logic oxide array, the inner bonds being spaced apart by a plurality of fluidly connected air gaps that extend between the logic die and the pixel die.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: March 26, 2024
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventor: Sing-Chung Hu
  • Patent number: 11943311
    Abstract: An ephemeral content distribution system associated with exchanging calibrated communications using a wave dynamic communication protocol based at least on a current wave-state of a user is disclosed. The system transmits a wave-based request for wave dynamic communications associated with a first user. The system processes wave-geographic information associated with a bounded geographical region based on a wave-state of a second user that received the wave-based request. The system processes wave-identity information associated with the wave-state of the second user. The system next receives a response of the second user to the wave-based request in accordance with the wave-state of the second user.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: March 26, 2024
    Inventors: Brett Harrison Serper, Karan Verma
  • Patent number: 11916007
    Abstract: A semiconductor device includes a substrate comprising an antenna and a conductive feature; an integrated circuit (IC) die attached to the substrate and comprising a radio frequency (RF) circuit; and a flexible circuit integrated with the substrate, where the flexible circuit is electrically coupled to the IC die and the substrate, a first portion of the flexible circuit being disposed between opposing sidewalls of the substrate, a second portion of the flexible circuit extending beyond the opposing sidewalls of the substrate, the second portion of the flexible circuit comprising an electrical connector at a distal end.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: February 27, 2024
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Ashutosh Baheti, Eung San Cho, Saverio Trotta
  • Patent number: 11916177
    Abstract: An illumination device disclosed in an embodiment of the invention includes a substrate, a plurality of light emitting elements disposed on the substrate, a resin layer disposed on the plurality of light emitting elements, a first phosphor layer disposed on an upper surface of the resin layer, and a plurality of second phosphor layers disposed on side surfaces of the resin layer, and a first light blocking layer disposed between the first phosphor layer and the second phosphor layer. The first phosphor layer and the second phosphor layer may have different colors.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: February 27, 2024
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Dong Il Eom
  • Patent number: 11908876
    Abstract: A solid-state imaging device with high productivity and improved dynamic range is provided. In the imaging device including a photoelectric conversion element having an i-type semiconductor layer, functional elements, and a wiring, an area where the functional elements and the wiring overlap with the i-type semiconductor in a plane view is preferably less than or equal to 35%, further preferably less than or equal to 15%, and still further preferably less than or equal to 10% of the area of the i-type semiconductor in a plane view. Plural photoelectric conversion elements are provided in the same semiconductor layer, whereby a process for separating the respective photoelectric conversion elements can be reduced. The respective i-type semiconductor layers in the plural photoelectric conversion elements are separated by a p-type semiconductor layer or an n-type semiconductor layer.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: February 20, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuki Okamoto, Yoshiyuki Kurokawa, Hiroki Inoue, Takuro Ohmaru
  • Patent number: 11887909
    Abstract: In a copper/titanium/aluminum bonded body of the present invention, a copper member made of copper or a copper alloy and an aluminum member made of aluminum or an aluminum alloy are bonded via a titanium layer, an intermetallic compound containing Cu and Ti is formed at a bonded interface of the copper member and the titanium layer, and a maximum value of a length Li of an intermetallic compound unformed part along the bonded interface is 20 ?m or less in the bonding interface of the copper member and the titanium layer, the intermetallic compound unformed part being a part free of formation of the intermetallic compound, and a ratio ?Li/L0 is 0.16 or less, ?Li being a total length of the intermetallic compound unformed part along the bonded interface and of L0 being a total length of the bonded interface along the bonded interface.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: January 30, 2024
    Assignee: MITSUBISHI MATERIALS CORPORATION
    Inventor: Nobuyuki Terasaki
  • Patent number: 11888036
    Abstract: A manufacturing method of an epitaxial silicon wafer includes forming an epitaxial film made of silicon on a surface of a silicon wafer in a trichlorosilane gas atmosphere; and setting the nitrogen concentration of the surface of the epitaxial film through inward diffusion from a nitride film on the epitaxial film, the nitride film being formed by subjecting the silicon wafer provided with the epitaxial film to heat treatment in a nitrogen atmosphere.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: January 30, 2024
    Assignee: SUMCO CORPORATION
    Inventors: Kazuya Kodani, Toshiaki Ono, Kazuhisa Torigoe
  • Patent number: 11876118
    Abstract: A semiconductor structure includes a substrate, a gate structure on the substrate, and a source structure and a drain structure on opposite sides of the gate structure. The gate structure includes a gate electrode on the substrate and a gate metal layer on the gate electrode. The gate metal layer has at least one notch, which exposes the gate electrode below. The electric potential of the source structure is different from that of the gate structure.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: January 16, 2024
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Shin-Cheng Lin, Cheng-Wei Chou
  • Patent number: 11862693
    Abstract: A semiconductor device may include a substrate having a source region and a drain region, and a gate arranged over the substrate and between the source region and the drain region. A first interlevel dielectric (ILD) layer may be at least partially arranged over the substrate and the gate. A conductive field plate may be arranged over the first ILD layer. At least one drain contact may extend through the first ILD layer over the drain region and may be coupled to the conductive field plate. A drain captive structure may be disposed in the first ILD layer and adjacent to the drain region, the drain captive structure having a trench comprising an air gap, wherein the drain captive structure is laterally spaced apart from sidewalls of the gate.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: January 2, 2024
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Bong Woong Mun, Jeoung Mo Koo
  • Patent number: 11864425
    Abstract: An electroluminescent display device includes a plurality of sub-pixels arranged on a substrate along a first direction and a second direction crossing the first direction, and a light-emitting diode disposed in each of the plurality of sub-pixels and including a first electrode, a light-emitting layer and a second electrode, wherein among the plurality of sub-pixels, the sub-pixel of an nth row and an mth column has a same color as the sub-pixel of an (n+1)th row and an (m?1)th column, where n is a natural number and m is a natural number large than 4, and wherein among the plurality of sub-pixels, the sub-pixel of the nth row and a kth column has a same color as the sub-pixel of the nth row and a (k?2)th column, where k is a natural number smaller than or equal to m.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: January 2, 2024
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Heume-Il Baek, Ho-Jin Ryu
  • Patent number: 11824031
    Abstract: A semiconductor package structure and a method for manufacturing the same are provided. The semiconductor package structure includes a substrate, a chip and a dielectric structure. The substrate includes a first portion and a second portion surrounding the first portion. The second portion defines a cavity over the first portion. The chip includes a terminal on an upper surface of the chip. The dielectric structure fills the cavity and laterally encroaches over the upper surface of the chip. The dielectric structure is free from overlapping with the terminal of the chip.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: November 21, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chih-Cheng Lee, Jiming Li
  • Patent number: 11812610
    Abstract: Electronic devices (e.g., semiconductor devices, which may be configured for 3D NAND memory devices), comprise pillars extending through a stack of alternating conductive tiers and insulative tiers. The conductive tiers, which may include control gates for access lines (e.g., word lines), include conductive rails along an outer sidewall of the conductive tiers, distal from the pillars extending through the conductive tiers. The conductive rails protrude laterally beyond outer sidewalls of the insulative tiers. The conductive rails increase the amount of conductive material that may otherwise be in the conductive tiers, which may enable the conductive material to exhibit a lower electrical resistance, improving operational performance of the electronic devices.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: November 7, 2023
    Assignee: Micron Technology, Inc.
    Inventors: John D. Hopkins, Rita J. Klein, Jordan D. Greenlee
  • Patent number: 11798847
    Abstract: There is provided a semiconductor device comprising a semiconductor substrate having an active area in which a plurality of active elements are formed, and a non-active area excepting the active area; at least one electrode pad electrically connected to any of the active elements. At least one Through Silicon VIA electrode is formed, being electrically connected to the electrode pad by way of the non-active area. The non-active area has an insulating region obtained by forming an insulating film on the semiconductor substrate, and a dummy section obtained by leaving a base material of the semiconductor substrate in the insulating region. The dummy section is provided in a position where an outer edge of the Through Silicon VIA electrode does not intersect with the boundary between the insulating region and the dummy section.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: October 24, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Osamu Koike, Yutaka Kadogawa
  • Patent number: 11784200
    Abstract: An image sensing device includes a photoelectric conversion element configured to generate photocharges in response to incident light, a floating diffusion configured to temporarily store the photocharges generated by the photoelectric conversion element, and a transfer gate configured to transmit the photocharges generated by the photoelectric conversion element to the floating diffusion region. The transfer gate includes a main transfer gate disposed to overlap a center section of the photoelectric conversion element and configured to operate in response to a first transmission signal, and a sub transfer gate disposed to overlap a boundary region of the photoelectric conversion element and configured to operate in response to a second potential level different from the first potential level.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: October 10, 2023
    Assignee: SK HYNIX INC.
    Inventors: Tae Lim Gu, Yun Hui Yang