Abstract: A demodulation and roll-off filter apparatus comprises a demodulation portion, a decimation portion, a demodulation and roll-off filter portion, and a modulation portion. The demodulation portion converts a pass-band signal received from an A/D converter into a base-band signal. The decimation filter portion lowers the sampling frequency of the base-band signal into a frequency four times higher than the frequency of a demodulation carrier used for the demodulation and roll-off filter portion. The modulation portion converts a base-band signal received from the decimation filter portion into a pass-band signal. The demodulation and roll-off filter portion performs a simplified demodulation and roll-off filter process for the pass-band signal.

Abstract: Digital samples of an analog speech/music signal are converted to compressed digital samples from which first and second bit assignment signals are derived to respectively represent quantization levels corresponding to high and low transmission rates. The compressed digital samples are quantized according to the first bit assignment signal and split into higher significant bits corresponding to the second bit assignment signal and lower significant bits corresponding to the difference between the two bit assignment signals. Supplementary information is combined with the higher significant bits and assembled into a higher-priority cell for transmission to an ATM network and the corresponding lower significant bits are assembled into a lower-priority cell which may be discarded by the network. At the destination, the supplementary information is used to recover the first and second bit assignment signals.

Abstract: A circuit for regenerating a clock signal from an NRZ encoded signal. The NRZ signal is filtered, differentiated, and applied to a nested phase-locked loop. The main loop of the phase-locked loop includes a voltage controlled crystal oscillator. The inner loop of the nested phase-locked loop includes a voltage controlled oscillator which multiplies the frequency of the signal provided by the crystal oscillator to obtain the regenerated clock signal. Tunable low pass filters are used in the differentiating circuit as delay elements. The voltage controlled oscillator includes a tunable low pass filter and an integrator. The control voltage for the inner loop voltage controlled oscillator is used to control the low pass filters of the differentiating circuit in a frequency locked loop.

Abstract: A maximum-likelihood decoding method for decoding an input signal subject to intersymbol interference. An assumption is made of a measure of an interference caused by a future signal that is later in a sequence than an assumed data sequence, on the basis of a predetermined bits of sample values of said input signal that are earlier in a sequence than an assumed data sequence stored in an assumed path memory (104). An assumed sample value of said input signal by referring to this measure of interference. Maximum-likelihood decoding is conducted on said input signal, on the basis of this assumed sample value and a sample value of said input signal; a plurality of survivor paths are generated and stored in a path memory (102); data for the most likely one of survivor paths is output as a decoded data sequence.

Abstract: A communication device is arranged to send a communication signal in the form of code pulses down an electric fence line which is energized by electric pulses from a fence energizer. The code pulses are generated to be distinct and separate from the electric pulses generated to energize the fence. A controller is included to control the charge and discharge of an energy storage device to generate at least the code pulses to be transmitted along the electric fence line. A coupling device is also included to couple both the code pulses and the electric fence energizing signal to the fence.

Abstract: A mobile radio receiver for a digital radio transmission system includes a recognition arrangement (6) for searching a received digital signal for pulses (i) of a frequency correction burst which recurs with a predetermined frequency in the digital signal and for determining the pulse positions (t). A frequency estimation arrangement (7) derives estimates of the predetermined frequency. In order to improve the initial synchronization of the mobile radio receiver with a base station, the recognition arrangement includes an averaging circuit (14) which averages with weight factors (Us) the pulse positions (t) that have been determined in successive observation intervals, the weight factors (Us) being proportional to the individual pulse heights (U).

Abstract: Digital data is communicated using trellis coded QAM. Symbols are coded for transmission using a rate 1/2 convolutional encoder punctured to rate 2/3. The coded symbols are transmitted for receipt at a receiver. At the receiver, two sets of branch metrics are computed for each received symbol. The received symbols are decoded by using the branch metrics to effect two passes through a modified rate 1/2 Viterbi decoder for each symbol.

Abstract: A binary signal encoding technique for reducing the amount of electromagnetic interference (EMI) caused by the transmission of high-speed binary signals over an unshielded twisted pair of conductors. Duobinary modulation, combined with low-pass filtering to confine the signals' frequency spectrum, and stop-band filtering to reduce critically high spectral lines, results in an acceptably low level of electromagnetic emission from the twisted pair. Moreover, duobinary modulation and stop-band filtering to reduce spectral lines avoids the need for signal scrambling to reach acceptable radiation levels by spreading the signal energy across the frequency spectrum.

Abstract: A fractionally spaced cross-polarization interference canceller, wherein a compensation signal is generated through an adaptive filter operating in a frequency that is an integer multiple of a transmission data frequency. The cross-polarization interference canceller includes a mechanism for generating an error signal used to control coefficients of the adaptive filter in the integer multiple frequency. The mechanism is realized, for example, by using a waveform generator generating an estimate of a baseband signal in the integer multiple frequency using a plurality of estimates of transmission data and coefficients determined by an impulse response of a transmission path.

Abstract: The invention relates to tests for verifying the integrity of circuits (16) for serial bi-directional transmissions. These tests are capable of testing transceivers (12) operating a very high frequency without creating interference and consist in either leaving the serial output of the transceiver (12) disconnected from the line (L), or disconnecting (INF) its adaptation impedance, commanding the transmission of signals, and comparing the signals transmitted to the reception signals detected by the same transceiver. In a variant, the adaptation impedance of the transceiver of the remote station may be disconnected.

Abstract: A digital time division multiple access (TDMA) radio communications system employs a digital information source for providing digital information, a transmitter for transmitting encoded digital information in a radio-frequency (RF) signal to a receiver which demodulates the encoded symbols into digital information to be utilized by an output device. The receiver, synchronizes, compensates for frequency drift, samples and divides the samples into halfslots of samples. The halfslots are subdivided into subslots numbered from 1 to N, where N represents the last received subslot. Subslots 1 and N are demodulated into digital information in a forward and reverse direction, respectively with metrics calculated. If the metrics indicate a signal with a larger signal-to-noise ratio from subslot N, subslot N-1 is demodulated in a reverse sense with another reverse metric calculated, and vice versa.

Abstract: The invention relates to a clock recovery for a digital data signal. A phase detector receives the data signal and transmits it after clock recovery. A phase correcting device creates and transmits, by means of a number of auxiliary clock signals phase shifted with respect to each other and originating from an incoming clock signal (CK.sub.in), a recovered clock signal (CK.sub.out) for the data signal. The recovered clock signal is fed to the phase detector, which detects a phase position error, if any, between the data signal and its recovered clock signal and emits information regarding this to the phase correcting device.

Abstract: A receiver for receiving and decoding a carrier signal is described. The carrier signal is modulated with a digital signal. The receiver includes a receiver section (162) for demodulating the received carrier signal. The demodulated signal is then sent through an A/D converter (164) for converting the demodulated signal into a digital format. A digital signal processor (166) receives the digital format and calculates the autocorrelation function of the digital format. The digital signal processor (166) then computes the ratio of the autocorrelation at two different reference points and compares this value to a plurality of values stored in its memory locations. The plurality of stored values representing different signal quality measurements.

Abstract: Stable feedback circuitry is disclosed for recreating selected CW components of a signal without distortion. Chirp-Z pulses relating to the CW component are continuously replicated at the rate necessary to separate the pulse replications by half the uniform Chirp-Z pulse duration.

Abstract: A baseband signal generator according to the present invention performs differential encoding and mapping processings for a digital baseband signal and limits bandwidths of the obtained symbol mapping data of an I phase and a Q phase by digital filters. Each digital filter includes a circuit for accumulating symbol mapping data corresponding to a plurality of symbol sections, a plurality of ROMs provided corresponding to the plurality of symbol sections for storing symbol data corresponding to a predetermined filter waveform, and an adder for adding symbol data output from there ROMs. The adder outputs a digital baseband signal whose bandwidth is limited, which signal is converted into an analog baseband signal by a D/A converter and supplied to an analog modulation unit.

Abstract: A tap-weight controller of a matched filter includes a tapped delay line having a series of delay elements for receiving an incoming digital signal to produce successively delayed signals at successive taps of the delay line so that the signal at the center tap coincides with the output of a decision feedback equalizer (DFE). Correlation circuits are provided corresponding respectively to tap-weight multipliers of a transversal filter and to the taps of the delay line of the tap-weight controller. In each correlation circuit, correlation is detected between the output of the DFE and a signal from the corresponding tap of the delay line, and a signal indicating the detected correlation is integrated over a prescribed interval. An adder has a first input for receiving the detected correlation signal and a second input for receiving the integrated signal or a tap-weight control signal to produce a summed signal.

Abstract: A data transmission system is proposed in which an auxiliary bitstream of low bitrate (AUX) is coded together with a main bitstream of high bitrate (PRIM) without increasing the transmission rate above the high bitrate. This auxiliary bitstream (AUX) is moreover transmitted synchronously with the main bitstream (PRIM). Transmitter (T) divides the main bitstream (PRIM) in periodically occurring blocks of Y bits and codes one bit of the auxiliary bitstream (AUX) in each of the blocks by using a first (AMI) or a second (VAMI) coding law according to the binary value of that bit. The second law is constructed by violating the first coding law (AMI) according to a predetermined violation law. Redundancy in the first coding law (AMI) is used to introduce symbol sequences not permitted under this first coding law (AMI) and to so obtain the second coding law (VAMI).

Abstract: A receiver for digital radio communications has an equalizer which is powered off for reduced power consumption when received radio waves undergo relatively small intersymbol interference. When intersymbol interference is significantly large, the equalizer is powered on to remove the intersymbol interference for better signal reception. The receiver has a signal quality decision circuit which powers on the equalizer when the quality of the received signal is poor, and powers off the equalizer when the quality of the received signal is good. The receiver consumes a relatively small amount of electric power overall.

Abstract: A data decoder using a dynamically indexed channel state metric to decode symbols recovered from a channel that provides an index value corresponding to a signal strength indication less an average signal strength for a symbol time period, selects a channel metric, corresponding to the index value, from predetermined values, and weights a decoder decision for the symbol time period in accordance with the channel metric.

Abstract: When supplied with an external synchronizing signal from an input terminal (2), a synchronizing separating circuit (6) separates and detects a horizontal synchronizing signal from the input signal and generates an HD pulse. When supplied with the HD pulse, a flip-flop (9) is set to generate a pulse. This output pulse is integrated by an integrating circuit (8) and an integrated output from the integrating circuit (8) is used to adjust a width of an output pulse from the flip-flop (9) to a value corresponding to a horizontal scanning frequency. The flip-flop (9) can be set only when supplied with the HD pulse, thereby preventing the flip-flop (9) from outputting a pulse whose width is longer than the width of the HD pulse. Therefore, the length of the back porch can be prevented from being reduced more than it is needed.