Patents Examined by Dzung Tran
  • Patent number: 11289512
    Abstract: A substrate includes: a base substrate, a thin film transistor disposed on the base substrate, an organic insulating layer disposed on the thin film transistor, an inorganic passivation layer disposed on the organic insulating layer, and at least a portion of the organic insulating layer which is in contact with the inorganic passivation layer is provided with a concave-convex structure.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: March 29, 2022
    Assignees: BOE Technology Group Co., Ltd., Hefei BOE Optoelectronics Technology Co., Ltd.
    Inventors: Na Zhao, Liyun Deng
  • Patent number: 11282910
    Abstract: The present disclosure provides an array substrate, a manufacturing method thereof, and a display device. The array substrate includes: a base substrate, a gate on the base substrate, a conductive wire above the base substrate, a first insulating layer on the gate and the base substrate, and a shielding structure on the base substrate. A first orthographic projection of the conductive wire on the base substrate is spaced apart from a second orthographic projection of the gate on the base substrate. A third orthographic projection of the shielding structure on the base substrate is located between the first orthographic projection and the second orthographic projection. The shielding structure is used to at least partially shield a crosstalk of the conductive wire to the gate.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: March 22, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Li Wang, Libin Liu
  • Patent number: 11276739
    Abstract: A display substrate is provided. The display substrate includes a substrate (1), a first transistor (2) and a second transistor (3) on the substrate (1), directions of intrinsic threshold voltage shifts of the first transistor (2) and the second transistor (3) being opposite; and a shift adjustment structure (4) on the substrate (1). The shift adjustment structure (4) may be configured to input adjustment signals to the first transistor (2) and the second transistor (3) respectively to make threshold voltages of the first transistor (2) and the second transistor (3) shift in directions opposite to the directions of their intrinsic threshold voltage shifts respectively.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: March 15, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yanan Niu, Jiushi Wang, Zhanfeng Cao, Qi Yao, Feng Zhang, Wusheng Li, Feng Guan, Lei Chen, Hongwei Tian
  • Patent number: 11276653
    Abstract: An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The transistor is configured to generate a quantum dot. The ring resonator is over the substrate and includes a conductive loop and an impedance matching element. The conductive loop overlaps with the transistor. The impedance matching element is on the conductive loop and is configured to determine a resonance frequency of the ring resonator.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: March 15, 2022
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yuan Chen, Jiun-Yun Li, Rui-Fu Xu, Chiung-Yu Chen, Ting-I Yeh, Yu-Jui Wu, Yao-Chun Chang
  • Patent number: 11276740
    Abstract: The semiconductor device includes: a first conductor pattern disposed on an insulating surface; and a second conductor pattern disposed on the insulating surface and spaced apart from the first conductor pattern, wherein, in a planar view, a first side of the first conductor pattern and a second side of the second conductor pattern are each formed of a plurality of sides, the first side and the second side face each other, and each of a maximum length of a plurality of sides constituting the first side and a maximum length of a plurality of sides constituting the second side is shorter than the minimum distance between the first side and the second side.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: March 15, 2022
    Assignee: Japan Display Inc.
    Inventor: Kenta Kajiyama
  • Patent number: 11271049
    Abstract: The present disclosure provides an array substrate, a preparation method thereof and a related device. The array substrate includes a plurality of sub-pixel areas, each of the plurality of sub-pixel areas includes a pixel drive circuit and a photo compensation circuit arranged above a substrate, the pixel drive circuit includes a pixel storage capacitor coupled with a drive transistor, and the photo compensation circuit includes a photosensitive storage capacitor coupled with a photosensitive device; and the pixel storage capacitor and the photosensitive storage capacitor are arranged in a laminated manner, and the pixel storage capacitor and the photosensitive storage capacitor share a same electrode plate.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: March 8, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Guoying Wang, Zhen Song
  • Patent number: 11264409
    Abstract: There is provided an array base plate, including: a substrate; a first patterned part disposed on the substrate and adjacent to an encapsulation region of the substrate; a second patterned part disposed on the substrate, in a same layer as the first patterned part and adjacent to the first patterned part; wherein the first patterned part includes a through part on its side close to the second patterned part. There is also provided a manufacturing method for manufacturing the array base plate, and a display panel including the array base plate.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: March 1, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Nini Bai, Feng Kang, Liangliang Liu, Liang Tang, Zhiyong Xue, Hailong Li
  • Patent number: 11263964
    Abstract: The present application relates to a display panel, a display screen and a display terminal. The display panel comprises a substrate provided with pixel circuits thereon; a pixel-defining layer; a light-emitting structure layer; a first electrode layer disposed on the pixel circuits and comprising a plurality of first electrodes; a second electrode disposed on the light emitting structure layer and being a surface electrode; and a scanning line and a data line both connected to each of the pixel circuits; wherein, sub-pixels in adjacent sub-pixel rows are staggered with one another and/or sub-pixels in adjacent sub-pixel columns are staggered with one another; the scanning line supplies a voltage to the pixel circuit to control turning-on and turning-off of the pixel circuit, and when the pixel circuit is turned on, a drive current from the data line is directly supplied to the first electrode to control light-emitting of the corresponding sub-pixel.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: March 1, 2022
    Assignee: YUNGU (GU'AN) TECHNOLOGY CO., LTD.
    Inventors: Junhui Lou, Yanqin Song
  • Patent number: 11264577
    Abstract: A display device is disclosed, The display device includes a substrate including a first area, a second area, and a first bending area located between the first and second areas. The first bending area is bent about a first bending axis extending in a first direction. The display device also includes a first inorganic insulating layer arranged over the substrate and having a first opening or a first groove at least in the first bending area, an organic material layer filling at least a part of the first opening or the first groove, and a first conductive layer extending from the first area to the second area across the first bending area and located over the organic material layer.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: March 1, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD
    Inventors: Yoonsun Choi, Wonsuk Choi, Cheolsu Kim, Sangjo Lee
  • Patent number: 11251347
    Abstract: A semiconductor light source includes at least one first emission unit, at least one second emission unit, and an optics, wherein the optical system has an inner region that converges radiation from the first emission unit, the optical system has an outer region that expands radiation from the second emission unit, a first light emission region of the inner region completely covers the first emission unit when viewed in plan view, and at least partially covers the second emission unit, a second light emission region of the outer region is partially or completely beside the second emission unit when viewed in plan view, and the inner region and the outer region have differently shaped light entry regions.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: February 15, 2022
    Assignee: OSRAM OLED GmbH
    Inventors: Ulrich Streppel, Désirée Queren
  • Patent number: 11244895
    Abstract: A substrate tie cell on an IC is provided. The substrate tie cell includes a diffusion region. The diffusion region is a p-type diffusion region on or within a p-type substrate, an n-type diffusion region on or within an n-type well within a p-type substrate, an n-type diffusion region on or within an n-type substrate, or a p-type diffusion region on or within a p-type well within an n-type substrate. The substrate tie cell further includes a plurality of adjacent gate interconnects (n adjacent gate interconnects) extending over the diffusion region, where n?4. The diffusion region is configured to be at one of a first voltage or a second voltage, and the gate interconnects are configured to be at an other of the first voltage or the second voltage. In one configuration, the first voltage is a power supply voltage and the second voltage is a ground voltage.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: February 8, 2022
    Assignee: QUALCOMM INCORPORATED
    Inventors: Ramesh Manchana, Sudheer Chowdary Gali, Biswa Ranjan Panda, Dhaval Sejpal, Stanley Seungchul Song
  • Patent number: 11239401
    Abstract: A semiconductor light-emitting device includes a substrate having a base, a conductive layer and an insulating layer, a semiconductor light-emitting element and a resin member. The base has a pair of base first side surfaces and a pair of base third side surfaces. The conductive layer includes a front-surface segment and a side-surface segment. The front surface segment includes a front-surface first part. The insulating layer includes an insulating-layer first part and an insulating-layer second part. The resin member covers the insulating-layer first part and the insulating-layer second part of the insulating layer. A first thickness of the insulating-layer first part is greater than a second thickness of the insulating-layer second part.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: February 1, 2022
    Assignee: ROHM CO., LTD.
    Inventors: Tomoichiro Toyama, Hideaki Anzai, Kenya Hashimoto, Ryo Yatagai
  • Patent number: 11233108
    Abstract: A display device according to an embodiment of the present invention includes: a substrate; a first organic light-emitting diode including a first lower electrode provided above the substrate and for each pixel, a first organic layer provided above the first lower electrode, a first light-emitting layer provided within the first organic layer and for each pixel and including a thermally activated material, and an upper electrode provided above the first organic layer; and a first drive TFT provided between the substrate and the first organic light-emitting diode, connected to the first lower electrode, and arranged overlapping the first light-emitting layer as viewed in a plan view.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: January 25, 2022
    Assignee: Japan Display Inc.
    Inventor: Jun Takagi
  • Patent number: 11227880
    Abstract: A method of manufacturing a display apparatus includes forming a first conductive layer on a base substrate including a panel area and a margin area disposed next to the panel area, the margin area including a dummy pattern area, forming a photoresist layer on the first conductive layer, forming a photoresist pattern by exposing and developing the photoresist layer, forming a first conductive pattern by etching the first conductive layer using the photoresist pattern, and removing the photoresist pattern. The forming the first conductive pattern includes forming a first pixel circuit pattern in the panel area, and forming a dummy pattern in the dummy pattern area of the margin area. An opening ratio of a portion where the dummy pattern is not formed with respect to the dummy pattern area is about 30% or more.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: January 18, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jonghee Park, Jin Seock Kim
  • Patent number: 11227904
    Abstract: A method for manufacturing a light-emitting layer, an electroluminescent device and a display device are provided, and the method includes: providing a base substrate formed with a pixel definition layer, so that a plurality of barrier wall structures of the pixel definition layer define a plurality of pixel regions that include pixel regions arranged along a first direction and pixel regions arranged along a second direction; forming a solution layer on the base substrate formed with the pixel definition layer, so that the solution layer includes a solution formed in the plurality of pixel regions and a solution formed on first barrier wall structures and the solution in the pixel regions does not blend with the solution on the first barrier wall structures; performing a drying process on the solution layer so that the solution in each pixel region forms a light-emitting structure to obtain a light-emitting layer.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: January 18, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Qing Dai
  • Patent number: 11222931
    Abstract: A display device includes a TFT layer, a light-emitting element layer provided in an upper layer than the TFT layer and including a first electrode, a second electrode, and a light-emitting layer of visible light, and a sealing layer covering the light-emitting element layer. An infrared light emission layer and an infrared light detection element are provided in a lower layer than the sealing layer.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: January 11, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kaoru Abe, Manabu Niboshi, Koji Yamabuchi, Shinichi Kawato
  • Patent number: 11217616
    Abstract: An image sensing device includes a substrate layer structured to include photoelectric conversion elements, grid structures disposed over the substrate layer to divide space above the substrate into different sensing regions, and color filter layers disposed over the photoelectric conversion elements between the grid structures. The grid structures includes an air layer, a light guide layer disposed over the air layer, and a capping film configured to cover the air layer and the light guide layer.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: January 4, 2022
    Assignee: SK hynix Inc.
    Inventor: Young Woong Do
  • Patent number: 11205699
    Abstract: One illustrative transistor device disclosed herein includes a gate structure positioned above a semiconductor substrate and first and second overall epitaxial cavities formed in the semiconductor substrate on opposite sides of the gate structure. In one embodiment, each of the first and second overall epitaxial cavities includes a substantially vertically oriented upper epitaxial cavity and a lower epitaxial cavity, wherein the substantially vertically oriented upper epitaxial cavity extends from an upper surface of the semiconductor substrate to the lower epitaxial cavity. A lateral width of the lower epitaxial cavity is greater than a lateral width of the upper epitaxial cavity. The device also includes epitaxial semiconductor material positioned in each of the first and second overall epitaxial cavities.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: December 21, 2021
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Arkadiusz Malinowski, Baofu Zhu, Frank W. Mont, Julien Frougier, Ali Razavieh
  • Patent number: 11205691
    Abstract: A display panel and a display device are provided, and the display panel includes a substrate and a pixel layer disposed on the substrate. The pixel layer includes a plurality of pixel units arranged in an array. The display panel includes a main light-transmitting region surrounded by the plurality of pixel units, and an orthographic projection of the main light-transmitting region on the substrate is not overlapped with orthographic projections of the plurality of pixel units on the substrate, so that external light is allowed to pass through the main light-transmitting region of the display panel, and then is received by an image acquisition device disposed on a side of the display panel.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: December 21, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yanliu Sun, Ming Zhu, Ge Shi, Haijun Niu, Yuyao Wang, Shiyu Zhang, Song Yang, Zheng Fang, Jiahui Han, Yujie Liu, Hao Zhang
  • Patent number: 11195892
    Abstract: An electroluminescence display device includes an array of pixels in which pixels emitting light of a specific color are regularly aligned and which includes at least a plurality of pixels emitting light of different colors, and in which, in the pixel, a common electrode, a first blocking layer, a light emitting layer, a second blocking layer, and a pixel electrode are laminated in this order when viewed from a viewing direction, at least the light emitting layer, the second blocking layer, and the pixel electrode are provided independently for each pixel, adjacent pixels are separated by a bank, and, at least in a part of the array of pixels, on the bank, the second blocking layer belonging to another pixel having a light-emission color different from that of one pixel is partially overlapped on the light emitting layer belonging to the one pixel.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: December 7, 2021
    Assignee: Japan Display Inc.
    Inventor: Norihisa Maeda