Abstract: A mechanism is provided in a computing system for controlling virtualized storage operable to communicate with a host and with mapped and unmapped storage resource pools. A selection component selects a target for a destructive data storage operation from the mapped storage resource pool. Responsive to the selection of the target, a virtual targeting component creates a virtual target from the unmapped storage resource pool to represent the target. Responsive to the selection of the target, a storage move component moves the target to a protected storage resource pool. Responsive to the creation of the virtual target from the unmapped storage resource pool, storage move component, moves the virtual target to the used storage resource pool. The computing system then performs the destructive data storage operation on the virtual target.

Abstract: A determination is made as to whether a first indicator is configured to allow borrowing of storage space to a first type of storage pool from a second type of storage pool. In response to determining that the first indicator is configured to allow borrowing of storage space from the second type of storage pool, a logical unit is created in the second type of storage pool and a listener application is initiated. The listener application determines that free space that is adequate to store the logical unit has become available in the first type of storage pool. The logical unit is moved from the second type of storage pool to the first type of storage pool, in response to determining, via the listener application, that free space that is adequate to store the logical unit has become available in the first type of storage pool.

Abstract: A system includes a host device that may be configured to initiate memory requests to a system memory. The system also includes a memory controller that may be configured receive the memory requests and to format the memory requests into memory transactions that are conveyed to the memory device via a memory interface. The memory transactions include a plurality of memory write command types. Each memory write command type corresponds to a different respective schedule for conveying a corresponding data payload.

Abstract: A method and apparatus for a late lock acquire mechanism is herein described. In response to detecting a late-lock acquire event, such as expiration of a timer, a full cachet set, and an irrevocable event, a late-lock acquire may be initiated. Consecutive critical sections are stalled until a late-lock acquire is completed utilizing fields of access buffer entries associated with consecutive critical section operations.

Abstract: Methods and apparatus relating to a replacement policy for hot code detection are described. In some embodiments, it may be determined which entry amongst a plurality of entries stored in storage unit is to be replaced next. The entries may correspond to hot code and may store age and execution frequency information corresponding to the hot code. Other embodiments are also described and claimed.

Abstract: A method and system manages memory in a network of virtual machines, including a copy of a master virtual machine (VM) memory system, the copy accessible to a memory server. The method includes determining whether a memory page requested by a clone VM memory system is fetchable from the memory server, the clone VM memory system hosted in a host memory system; if the memory page is fetchable from the memory server, fetching the memory page from the memory server; determining whether there is sufficient space in the host memory system to load the memory page; if there is insufficient space in the host memory system, evicting a selected memory page from the host memory system; and loading the memory page into the host memory system and the clone VM memory system.

Abstract: A system implements a method to non-disruptive restoration of storage services provided by a storage volume of the system. Upon detecting a disruption of storage services at the storage volume, the method freezes the input/output (I/O) operations of applications that are accessing the storage volume. The disrupted storage services are restored. And the configurations of the storage volume are maintained during restoration of the disrupted storage services. Afterward, the frozen I/O operations are activated, allowing the applications to continue their accessing of the storage volume.

Abstract: A recording medium coupled to a drive device includes a management information storage area and a master boot record. Management information used for a mounting process of the recording medium by the drive device is stored in the management information storage area and a starting location and an area size of a drive area is stored in the master boot record.

Abstract: A disk drive is disclosed comprising a head actuated over a disk, a volatile semiconductor memory (VSM), and a command queue. A plurality of write commands received from a host are stored in the command queue, and write data for the write commands is stored in the VSM. A flush time needed to flush the write data from the VSM to the disk is computed, and the write data is flushed from the VSM to a non-volatile memory (NVM) in response to the flush time.

Abstract: A method for memory protection in a multiprocessor system, involving receiving a request at a first carrier to perform a memory operation at a memory address, wherein the first carrier receives the request from a processor, determining by the first carrier whether the processor is permitted to access memory at the memory address using a carrier identification (ID) of a second carrier, wherein the second carrier is associated with a memory controller used to access the memory, and sending the request to the second carrier, if the processor is permitted to access the memory.

Abstract: A Phase-Change Memory (PCM) Content Addressable Memory (CAM) utilized to store addresses of defective rows or columns of a memory array or memories attached to a backside bus of a concentrator device.

Abstract: A memory access control device for controlling access to a plurality of memory devices with differing latency, controls, when performing a first access and then a second access, the timing of performing the second access, according to a memory device accessed in the first access and a memory device accessed in the second access.

Abstract: A data processing system includes at least a first through third processing nodes coupled by an interconnect fabric. The first processing node includes a master, a plurality of snoopers capable of participating in interconnect operations, and a node interface that receives a request of the master and transmits the request of the master to the second processing unit with a nodal scope of transmission limited to the second processing node. The second processing node includes a node interface having a directory. The node interface of the second processing node permits the request to proceed with the nodal scope of transmission if the directory does not indicate that a target memory block of the request is cached other than in the second processing node and prevents the request from succeeding if the directory indicates that the target memory block of the request is cached other than in the second processing node.

Abstract: A data processing system includes at least a first through third processing nodes coupled by an interconnect fabric. The first processing node includes a master, a plurality of snoopers capable of participating in interconnect operations, and a node interface that receives a request of the master and transmits the request of the master to the second processing unit with a nodal scope of transmission limited to the second processing node. The second processing node includes a node interface having a directory. The node interface of the second processing node permits the request to proceed with the nodal scope of transmission if the directory does not indicate that a target memory block of the request is cached other than in the second processing node and prevents the request from succeeding if the directory indicates that the target memory block of the request is cached other than in the second processing node.

Abstract: A system includes a host device that may be configured to initiate memory requests to a system memory. The system also includes a memory controller that may be configured receive the memory requests and to format the memory requests into memory transactions that are conveyed to the memory device via a memory interface. The memory transactions include a plurality of memory write command types. Each memory write command type corresponds to a different respective schedule for conveying a corresponding data payload.

Abstract: Systems and methods are provided for improved identification of removable storage media. A scanner may be used to read an identifier, such as a barcode, on a removable storage media. In the event that the scanner reads the identifier incorrectly due to a defect in the barcode, such as a damaged label, misaligned identifier, or because the scanner is incapable of reading the identifier type or the scanner's field of view is incorrect, a media management component receives the scanned identifier data and matches it to a known set of media identifiers to create a subset of matching identifier data. A closest matching media identifier may be identified from the subset of matching identifier data. An index may be updated with information indicating the closest matching media identifier and a location of the removable storage media.

Abstract: Provided are a method and apparatus for efficiently transferring a massive amount of multimedia data between two processors. The apparatus includes a first local switch, which connects a virtual page of a first processor element to a shared memory page, a second local switch, which connects a virtual page of a second processor element to the shared memory page, a shared page switch, which connects a predetermined shared memory page of a shared physical memory to the first or second local switch, and a switch manager, which remaps a certain shared memory page of the shared physical memory that stores data of a task performed by the first processor element to the virtual page of the second processor element. Accordingly, since memory remapping is used, the massive amount of multimedia data can be transmitted by changing a method of mapping a memory, unlike a case when multimedia data is transmitted by using a memory bus.

Abstract: A distributed shared memory multiprocessor that includes a first processing element, a first memory which is a local memory of the first processing element, a second processing element connected to the first processing element via a bus, a second memory which is a local memory of the second processing element, a virtual shared memory region, where physical addresses of the first memory and the second memory are associated for one logical address in a logical address space of a shared memory having the first memory and the second memory, and an arbiter which suspends an access of the first processing element, if there is a write access request from the first processing element to the virtual shared memory region, according to a state of a write access request from the second processing element to the virtual shared memory region.

Abstract: The system utilizes a plurality of layers to provide a robust storage solution. One layer is the RAID engine that provides parity RAID protection, disk management and striping for the RAID sets. The second layer is called the virtualization layer and it separates the physical disks and storage capacity into virtual disks that mirror the drives that a target system requires. A third layer is a LUN (logical unit number) layer that is disposed between the virtual disks and the host. By using this approach, the system can be used to represent any number, size, or capacity of disks that a host system requires while using any configuration of physical RAID storage.

Abstract: Techniques for controllably allocating a portion of a plurality of memory banks as cache memory are disclosed. To this end, a configuration tracker and a bank selector are employed. The configuration tracker configures whether each memory bank is to operate in a cache or not. The bank selector has a plurality of bank distributing functions. Upon receiving an incoming address, the bank selector determines the configuration of memory banks currently operating as the cache and applies an appropriate bank distributing function based on the configuration of memory banks. The applied bank distributing function utilizes bits in the incoming address to access one of the banks configured as being in the cache.