Abstract: A storage system includes a Central Processing Unit (CPU) that has a physically-addressed solid state disk (SSD), addressable using physical addresses associated with user data and provided by a host. The user data is to be stored in or retrieved from the physically-addressed SSD in blocks. Further, a non-volatile memory module is coupled to the CPU and includes flash tables used to manage blocks in the physically addressed SSD. The flash tables have tables that are used to map logical to physical blocks for identifying the location of stored data in the physically addressed SSD. The flash tables are maintained in the non-volatile memory modules thereby avoiding reconstruction of the flash tables upon power interruption.

Abstract: An information recording device comprises a memory component configured to hold data, a first file system controller configured to manage data held in the memory component on the basis of a first file name formed by a first code, and a wireless component configured to send and receive wireless signals. The first file system controller receives, from an access device connected to the information recording device, the first file name and a second file name that corresponds to the first file name and is formed by a second code that is different from the first code, identifies specific data having the first file name out of the data held in the memory component, and sends the second file name and the specific data to another information recording device connected via the wireless component.

Abstract: Improved data management systems for managing and maintaining unstructured data in a computing system environment. Data content is associated with particular types of metadata to create data objects. In certain examples, the metadata is stored in various fields of the data objects, certain fields being designated as permanently read-only after their creation. Such fields can include, for instance, a unique identifier, a type of content and a classification governing copy permissions relating to the data object. Data objects, or didgets, can be grouped into logical containers referred to as chambers, which are further grouped by common control elements or attributes into domains. Chambers within a particular domain can generally freely share information therebetween, including copies of various types of didgets. A control program, or didget manager, in each domain manages the creation of didgets and subsequent operations directed thereto.

Abstract: A system and method are provided for updating a non-volatile memory (NVM) in an image forming device by employing the programmability of an electronically readable/writable memory module such as a customer replaceable unit monitor (CRUM) associated with a customer replaceable unit (CRU) as a vehicle for completing the needed updates in NVM values at the time of replacement of the CRU. Replacement of the CRU, where such replacement is verified by return of an expended CRU to the manufacturer, provides confirmation of updates to the NVM values. The CRUM provides a secure means to change image output terminal (IOT) set points and CRU related values stored in NVM locations that otherwise would require a manufacturers' customer service personnel visit to update. By providing an NVM location (chain/link), the value to be used and a one-time use authentication string, an automated update to the NVM is performed in a secure manner.

Abstract: A storage management application determines that a source virtual tape requires reclamation, identifies all block addresses for active data of a source virtual tape and sorts the block addresses in an ascending order, identifies a target virtual tape which has sufficient free capacity to store the active data of said source virtual tape and the last written block address on said target virtual tape, and sends a command to the VTL-system instructing it to perform reclamation including information about said source and said target virtual tape, the sorted list of block addresses denoting active data on the source virtual tape and the starting block address on the target virtual tape. The reclamation logic references the active data host blocks of said source volume to said target virtual tape starting at said starting block address by just updating the host block to disk block mapping table.

Abstract: A plurality of storage nodes in a single chassis is provided. The plurality of storage nodes in the single chassis is configured to communicate together as a storage cluster. Each of the plurality of storage nodes includes nonvolatile solid-state memory for user data storage. The plurality of storage nodes is configured to distribute the user data and metadata associated with the user data throughout the plurality of storage nodes such that the plurality of storage nodes maintain the ability to read the user data, using erasure coding, despite a loss of two of the plurality of storage nodes. The plurality of storage nodes configured to initiate an action based on the redundant copies of the metadata, responsive to achieving a level of redundancy for the redundant copies of the metadata. A method for accessing user data in a plurality of storage nodes having nonvolatile solid-state memory is also provided.

Abstract: The system utilizes a plurality of layers to provide a robust storage solution. One layer is the RAID engine that provides parity RAID protection, disk management and striping for the RAID sets. The second layer is called the virtualization layer and it separates the physical disks and storage capacity into virtual disks that minor the drives that a target system requires. A third layer is a LUN (logical unit number) layer that is disposed between the virtual disks and the host. By using this approach, the system can be used to represent any number, size, or capacity of disks that a host system requires while using any configuration of physical RAID storage.

Abstract: Shared cache modules, systems, and methods are provided herein. The shared cache module is useable with at least one initiator on a serial attached small computer system interface system. The shared cache module includes a memory device and a memory interface. The memory device assigns each of the at least one initiator to a portion of a cache memory on the memory device. The memory interface indexes the assignment and communicates with the at least one initiator to perform a memory task.

Abstract: A method for controlling memory refresh operations in dynamic random access memories. The method includes determining a count of deferred memory refresh operations for a first memory rank. Responsive to the count approaching a high priority threshold, issuing an early high priority refresh notification for the first memory rank, which indicates the pre-determined time for performing a high priority memory refresh operation at the first memory rank. Responsive to the early high priority refresh notification, the behavior of a read reorder queue is dynamically modified to give priority scheduling to at least one read command targeting the first memory rank, and one or more of the at least one read command is executed on the first memory rank according to the priority scheduling. Priority scheduling removes these commands from the re-order queue before the refresh operation is initiated at the first memory rank.

Abstract: A method and a memory manager for managing data storage in a plurality of types of memories. The types of memories may comprise a primary memory, such as DRAM, and a secondary memory, such as a phase change memory (PCM) or Flash memory, which may have a limited lifetime. The memory manager may be part of an operating system and may manage the memories as part of a unified address space. Characteristics of data to be stored in the memories may be used to select between the primary and secondary memories to store the data and move data between the memories. When the data is to be stored in the secondary memory, health information on the secondary memory and characteristics of the data to be stored may be used to select a location within the secondary memory to store the data.

Abstract: Improved data management systems for managing and maintaining unstructured data in a computing system environment. Data content is associated with particular types of metadata to create data objects. In certain examples, the metadata is stored in various fields of the data objects, certain fields being designated as permanently read-only after their creation. Such fields can include, for instance, a unique identifier, a type of content and a classification governing copy permissions relating to the data object. Data objects, or didgets, can be grouped into logical containers referred to as chambers, which are further grouped by common control elements or attributes into domains. Chambers within a particular domain can generally freely share information therebetween, including copies of various types of didgets. A control program, or didget manager, in each domain manages the creation of didgets and subsequent operations directed thereto.

Abstract: A method, system and computer program product for implementing load-reserve and store-conditional instructions in a multi-processor computing system. The computing system includes a multitude of processor units and a shared memory cache, and each of the processor units has access to the memory cache. In one embodiment, the method comprises providing the memory cache with a series of reservation registers, and storing in these registers addresses reserved in the memory cache for the processor units as a result of issuing load-reserve requests. In this embodiment, when one of the processor units makes a request to store data in the memory cache using a store-conditional request, the reservation registers are checked to determine if an address in the memory cache is reserved for that processor unit. If an address in the memory cache is reserved for that processor, the data are stored at this address.

Abstract: A multi-core processor system includes a number of cores, a memory system, and a common access bus. Each core includes a core processor; a dedicated core cache operatively connected to the core processor; and, a core processor rate limiter operatively connected to the dedicated core cache. The memory system includes physical memory; a memory controller connected to the physical memory; and, a dedicated memory cache connected to the memory controller. The common access bus interconnects the cores and the memory system. The core processor rate limiters are configured to constrain the rate at which data is accessed by each respective core processor from the memory system so that each core processor memory access is capable of being limited to an expected value.

Abstract: A solution for managing a software image being stored in a plurality of physical blocks of a storage system comprises monitoring each access to the physical blocks, calculating a predicted sequence of access to the physical blocks according to the monitored accesses, and reorganizing the physical blocks according to the predicted sequence. The monitoring may be performed as the physical blocks are accessed during the booting of virtual images on the software image.

Abstract: Methods and systems for using one or more solid-state drives (SSDs) as a shared cache memory for a plurality of storage controllers coupled with the SSDs and coupled with a plurality of storage devices through a common switched fabric communication medium. All controllers share access to the SSDs through the switched fabric and thus can assume control for a failed controller by, in part, accessing cached data of the failed controller in the shared SSDs.

Abstract: Storage systems with reduced energy consumption, methods of operating thereof, corresponding computer program products and corresponding program storage devices. Some non-limiting examples of a write method include: configuring a plurality of storage disk units such that at any given point in time there are at least two storage disk drives operating in active state in any storage disk unit; caching in a cache memory one or more write requests and generating a consolidated write request corresponding to a stripe in a RAID group; destaging the consolidated write request; and writing the destaged consolidated write request in a write out of place manner to one or more storage disk drives operating at the destage point of time in active state.

Abstract: A storage system is provided with storage devices that are basis of a pool and a primary volume and a controller that is coupled to the plurality of storage devices and a host computer and that is provided with a cache region. In a case that a write request specifies a secondary volume storing a snapshot of a primary volume the write data is stored in a first cache sub region of the cache region and a response to the write request is transmitted to the host computer. In the case in which a page in the pool is unallocated to a virtual region of a write destination of the write data, a page is allocated to the virtual region, and write data is stored in the first cache sub region into the allocated page.

Abstract: A method of an aspect includes determining to prune a filemark cache. The filemark cache has entries that each store filemark metadata for a different corresponding filemark of a plurality of open virtual tape files. The method also includes pruning the filemark cache by removing a portion of the entries of the filemark cache. Other methods, apparatus, and articles are also disclosed.

Abstract: Multi-port memory having an additional control bus for passing commands between ports have individual ports that can be configured to respond to a command received from an external control bus or to a command received from the additional control bus. This facilitates various combinations of ports to vary the bandwidth or latency of the memory to facilitate tailoring performance characteristics to differing applications.

Abstract: An apparatus is provided comprising a physical memory sub-system including a first memory of a first memory class and a second memory of a second memory class, the second memory being communicatively coupled to the first memory. The apparatus is configured such that the first memory and the second memory are capable of receiving instructions via the memory bus. A system and method are also provided for circuit cooperation. The system includes a first semiconductor platform including at least one first circuit, and at least one additional semiconductor platform stacked with the first semiconductor platform and including at least one additional circuit. Furthermore, the system is operable such that the at least one first circuit and the at least one additional circuit cooperate to carry out at least one task.