Patents Examined by Felisa Hiteshew
  • Silicon epitaxial wafer and process for manufacturing the same
    Patent number: 7229501
    Abstract: The present invention provides a silicon epitaxial wafer having an excellent IG capability all over the radial direction thereof and a process for manufacturing the same. The present invention is directed to a silicon epitaxial wafer having an excellent gettering capability all over the radial direction thereof, wherein density of oxide precipitates detectable in the interior of a silicon single crystal substrate after epitaxial growth is 1×109/cm3 or higher at any position in the radial direction.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: June 12, 2007
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventor: Hiroshi Takeno
  • Method of preparing nanocrystals
    Patent number: 7229497
    Abstract: A population of nanocrystals having a narrow and controllable size distribution and can be prepared by a continuous flow method.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: June 12, 2007
    Assignee: Massachusetts Institute of Technology
    Inventors: Nathan E. Stott, Klavs F. Jensen, Moungi G. Bawendi, Brian K. H. Yen
  • Methods and devices for high throughput crystallization
    Patent number: 7229500
    Abstract: Crystallization Photoresist (PR) apparatus and methods which allow for fast screening and determination of protein crystallization conditions with small protein quantities and rapid crystallization. The apparatus comprise a first region comprising a first nucleation catalyst material and a second region comprising a second nucleation catalyst material, with the first and second regions positioned adjacent to each other and configured to support at least one crystal, and with the first region having a variation in a nucleation property of the first nucleation catalyst material in the first region. The crystal may be supported at an interface of the adjacent regions.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: June 12, 2007
    Assignee: Parallel Synthesis Technologies, Inc.
    Inventors: Robert C. Haushalter, Xiao-Dong Sun
  • Process for producing silicon single crystal layer and silicon single crystal layer
    Patent number: 7229496
    Abstract: A thermal processing operation is performed for a silicon wafer W (silicon single-crystal layer) in an atmosphere gas which is formed by a hydrogen gas or an inert gas or a mixture gas of these gases at a temperature in a range of 600° C. to 950° C. (here, the temperature should not be greater than 950° C.). By doing this, a quality of a surface of the silicon single-crystal layer is improved.
    Type: Grant
    Filed: March 5, 2003
    Date of Patent: June 12, 2007
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Takashi Shibayama, Yoshio Murakami, Takayuki Shingyoji
  • Manufacturing method for semiconductor device, semiconductor device and semiconductor wafer
    Patent number: 7229499
    Abstract: A manufacturing method for a semiconductor device formed in a device region composed of a plurality of semiconductor layers on a substrate, the method including a trench forming step of forming a trench on the substrate around the device region and a semiconductor growth step of growing the semiconductor layer in the device region.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: June 12, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Masahiro Ishida
  • Quartz glass crucible and method for the production thereof
    Patent number: 7226508
    Abstract: A known quartz glass crucible for crystal pulling consists of a crucible wall, having an outer layer which is provided in an external area thereof with a crystallisation promoter which results in crystallisation of quartz glass, forming cristobalite when the quartz glass crucible is heated according to specified use in crystal pulling. The aim of the invention is to provide a quartz glass crucible which has a long service life. As a result, the crystallisation promoter contains, in addition to a silicon, a first component which acts as a reticulating agent in quartz glass and a second component which is free of alkali metals and which acts as an agent forming separating points in quartz glass. The above mentioned components are contained and incorporated into a doping area (8) of the outer layer (6) having a layer thickness of more than 0.2 mm.
    Type: Grant
    Filed: April 3, 2003
    Date of Patent: June 5, 2007
    Assignees: Heraeus Quarzglas GmbH & Co. KG, Siltronic AG
    Inventors: Gabriele Korus, Martin Arndt, Hilmar Laudahn, Manfred Schwarzbauer
  • Single crystal silicon producing method, single crystal silicon wafer producing method, seed crystal for producing single crystal silicon, single crystal silicon ingot, and single crystal silicon wafer
    Patent number: 7226506
    Abstract: A method for eliminating slip dislocations in producing single crystal silicon, a seed crystal capable of eliminating the slip dislocations, a single crystal silicon ingot from which the slip dislocations have been eliminated and a single crystal silicon wafer, are disclosed. Single crystal silicon is produced by dipping a seed crystal in a melt and pulling the seed crystal up along the axis of the seed crystal, using a single crystal (1) in which the <110> crystal orientation (10) is inclined at a predetermined angle ? with respect to the axial direction (9) so that the edge direction (8) of the {111} crystal plane is inclined with respect to the axial direction (9). When single crystal silicon is grown while pulling up a seed crystal by the CZ method, a single crystal silicon ingot of a large diameter and a heavy weight can be pulled up by eliminating slip dislocations from the thick crystal.
    Type: Grant
    Filed: April 17, 2003
    Date of Patent: June 5, 2007
    Assignee: Sumco Techxiv Corporation
    Inventors: Tetsuhiro Iida, Yutaka Shiraishi, Ryota Suewaka, Junsuke Tomioka
  • High resistivity silicon wafer and method for fabricating the same
    Patent number: 7226571
    Abstract: A high resistivity p type silicon wafer with a resistivity of 100 ?cm or more, in the vicinity of the surface being formed denuded zone, wherein when a heat treatment in the device fabrication process is performed, a p/n type conversion layer due to thermal donor generation is located at a depth to be brought into contact with neither any device active region nor depletion layer region formed in contact therewith or at a depth more than 8 ?m from the surface, and a method for fabricating the same. The high resistivity silicon wafer can cause the influence of thermal donors to disappear without reducing the soluble oxygen concentration in the wafer, whereby even if various heat treatments are performed in the device fabrication process, devices such as CMOS that offer superior characteristics can be fabricated. The wafer has wide application as a substrate for a high-frequency integrated circuit device.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: June 5, 2007
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Nobumitsu Takase, Shinsuke Sadamitsu, Takayuki Kihara, Masataka Hourai
  • Method for producing single crystal and single crystal
    Patent number: 7226507
    Abstract: The present invention is a method for producing a single crystal of which a whole plane in a radial direction is a defect-free region with pulling the single crystal from a raw material melt in a chamber by Czochralski method, wherein a pulling condition is changed in a direction of the crystal growth axis during pulling the single crystal so that a margin of a pulling rate is always a predetermined value or more that the single crystal of which the whole plane in a radial direction is a defect-free region can be pulled. Thereby, there can be provided a method for producing a single crystal in which when a single crystal is produced by CZ method, the single crystal of which a whole plane in a radial direction is a defect-free region entirely in a direction of the crystal growth axis can be produced with stability.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: June 5, 2007
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Nobuaki Mitamura, Tomohiko Ohta, Izumi Fusegawa, Masahiro Sakurada, Atsushi Ozaki
  • Method for vanishing defects in single crystal silicon and single crystal silicon
    Patent number: 7226505
    Abstract: A method for eliminating defects in single crystal silicon, which comprises subjecting single crystal silicon prepared by the CZ method to an oxidation treatment and then to an ultra high temperature heat treatment at a temperature of at least 1300° C., or comprises subjecting single crystal silicon which is prepared by the CZ method and is not subjected to an oxidation treatment (a bare wafer) to an ultra high temperature heat treatment in an oxygen atmosphere and at a temperature of higher than 1200° C. and lower than 1310° C. The method allows the elimination of void defects present in single crystal silicon with reliability.
    Type: Grant
    Filed: December 25, 2002
    Date of Patent: June 5, 2007
    Assignee: Sumco Techxiv Corporation
    Inventors: Masahiko Ando, Masaru Yuyama, Shiro Yoshino
  • Silicon cleaning method for semiconductor materials and polycrystalline silicon chunk
    Patent number: 7223303
    Abstract: A cleaning method cleans silicon for semiconductor materials using pure water treated by a reverse osmosis treatment and by ion exchange treatment and reduces the aluminum and iron remaining on the silicon surface.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: May 29, 2007
    Assignees: Mitsubishi Materials Corporation, Mitsubishi Polycrystalline Silicon America Corporation
    Inventor: Hirotake Ohta
  • Laser apparatus, laser irradiation method, and manufacturing method of semiconductor device
    Patent number: 7223306
    Abstract: It is an object to provide a laser apparatus, a laser irradiating method and a manufacturing method of a semiconductor device that can perform uniform a process with a laser beam to an object uniformly. The present invention provides a laser apparatus comprising an optical system for sampling a part of a laser beam emitted from an oscillator, a sensor for generating an electric signal including fluctuation in energy of the laser beam as a data from the part of the laser beam, a means for performing signal processing to the electrical signal to grasp a state of the fluctuation in energy of the laser beam, and controlling a relative speed of an beam spot of the laser beam to an object in order to change in phase with the fluctuation in energy of the laser beam.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: May 29, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Miyairi, Akihisa Shimomura, Tamae Takano, Masaki Koyama
  • Controlling melt-solid interface shape of a growing silicon crystal using a variable magnetic field
    Patent number: 7223304
    Abstract: Methods and system for controlling crystal growth in a Czochralski crystal growing apparatus. A magnetic field is applied within the crystal growing apparatus and varied to control a shape of the melt-solid interface where the ingot is being pulled from the melt. The shape of the melt-solid interface is formed to a desired shape in response to the varied magnetic field as a function of a length of the ingot.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: May 29, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Zheng Lu
  • Nanoscale junction arrays and methods for making same
    Patent number: 7220310
    Abstract: A nanoscale junction array includes an elongated nanowire and a plurality of elongated nanobelts. Each nanobelt has a proximal end and an opposite distal end. The proximal end of each nanobelt is attached to a different location on the nanowire. Each nanobelt extends radially away from the nanowire. A type of nanoscale junction array, a nanopropeller, includes an elongated nanowire and a plurality of elongated nanoblades. The nanoscale junction array is formed from Zinc Oxide using a metal vaporization process.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: May 22, 2007
    Assignee: Georgia Tech Research Corporation
    Inventors: Zhong L. Wang, Pu X. Gao
  • Method of producing polycrystalline thin film and method of producing an oxide superconducting element
    Patent number: 7220315
    Abstract: A production method for a polycrystalline thin film, depositing polycrystalline thin film on a polycrystalline substrate. The temperature of the polycrystalline substrate is set within a range from 150° C. to 250° C., the ion beam energy of the ion beam is adjusted within a range from 175 eV to 225 eV, and the ion beam is irradiated at an angle of incidence from 50° to 60° with respect to the normal for the film forming surface of the polycrystalline substrate. By this production method, the grain boundary inclination angle, formed by identical crystal axes of the crystal grains along a plane parallel to the film forming surface of the polycrystalline substrate, is limited to 20° or less, and a polycrystalline thin film having a strong crystal orientation can be stably produced.
    Type: Grant
    Filed: July 29, 2003
    Date of Patent: May 22, 2007
    Assignee: Fujikura Ltd.
    Inventor: Yasuhiro Iijima
  • Low defect density silicon having a vacancy-dominated core substantially free of oxidation induced stacking faults
    Patent number: 7217320
    Abstract: The present invention relates to a process for preparing a single crystal silicon ingot, as well as to the ingot or wafer resulting therefrom. The process comprises controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, and (iii) a cooling rate of the crystal from solidification to about 750° C., in order to cause the formation of a segment having a first axially symmetric region extending radially inward from the lateral surface of the ingot wherein silicon self-interstitials are the predominant intrinsic point defect, and a second axially symmetric region extending radially inward from the first and toward the central axis of the ingot.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: May 15, 2007
    Assignee: MEMC Electronics Materials, Inc.
    Inventors: Chang Bum Kim, Steven L. Kimbel, Jeffrey L. Libbert, Mohsen Banan
  • Method and device for producing an electronic GaAs detector for x-ray detection for imaging
    Patent number: 7217324
    Abstract: The invention relates to a method for producing an X-ray detector for imaging. By increasing the epitaxial layers, a GaAs material (1) is placed on a substrate n<+> (or p<+>) (2). p<+> (or n<+>)< >ions are then implanted on the external face (11) of the material (1) in order to form a p<+>/i/n<+> structure after annealing. Ohmic contacts (12) are subsequently disposed on the two faces and individual detectors (pixels) (13) are produced over the entire surface using means of dry or chemical masking and pickling. The epitaxial material (1) has a thickness d? that is sufficient to absorb effectively the X photons and means can be used to reduce the residual doping of said material (1). The material obtained in this way is suitable for medical (mammography, dental, etc.) and industrial imaging.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: May 15, 2007
    Assignee: Universite Pierre et Marie Curie
    Inventor: Jacques Bourgoin
  • Crystallization apparatus, crystallization method, device and phase modulation element
    Patent number: 7214270
    Abstract: The present invention comprises a light modulation optical system having a first element which forms a desired light intensity gradient distribution to an incident light beam and a second element which forms a desired light intensity minimum distribution with an inverse peak shape to the same, and an image formation optical system which is provided between the light modulation optical system and a substrate having a polycrystal semiconductor film or an amorphous semiconductor film, wherein the incident light beam to which the light intensity gradient distribution and the light intensity minimum distribution are formed is applied to the polycrystal semiconductor film or the amorphous semiconductor film through the image formation optical system, thereby crystallizing a non-crystal semiconductor film. The pattern of the first element is opposed to the pattern of the second element.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: May 8, 2007
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Yukio Taniguchi, Masakiyo Matsumura, Noritaka Akita
  • Methods of crystal optimization
    Patent number: 7214266
    Abstract: The present invention provides an automated method of optimising crystallisation conditions for macromolecules comprising forming a trial comprising a sample comprising a gel forming component and the macromelecule to be crystallized, wherein at least one component of the trial is dispensed using an automatic liquid dispensing system.
    Type: Grant
    Filed: October 2, 2003
    Date of Patent: May 8, 2007
    Assignee: Imperial Innovations Limited
    Inventor: Naomi E. Chayen
  • Si-doped GaAs single crystal substrate
    Patent number: 7214269
    Abstract: A Si-doped gallium arsenide single crystal substrate has a carrier concentration of 0.1×1018 to 5.0×1018/cm3. The substrate is made by Vertical Bridgeman (VB) method or Vertical Gradient Freeze (VGF) method, and a minimum value and a maximum value of the carrier concentration in substrate plane are within a dispersion of 10% or less of an average carrier concentration in substrate plane.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: May 8, 2007
    Assignee: Hitachi Cable, Ltd.
    Inventors: Michinori Wachi, Kenya Itani