Patents Examined by Gary Portka
  • Patent number: 9823877
    Abstract: Disclosed herein are system, method, and computer program product embodiments for virtual machine (VM) backup from a storage snapshot. An embodiment operates by receiving selective backup parameters including a VM to backup and then creating a VM snapshot associated with the VM. Next, an offset table associated with a virtual disk of the VM stored on a storage is retrieved. The embodiment further includes generating a storage snapshot and deleting the VM snapshot and then promoting the storage snapshot to a new logical unit number. The promoted storage snapshot is then mounted to the backups server. The virtual disk data is backed up to a backup storage using the offset table from the storage snapshot. The storage snapshot is dismounted from the backup server and deleted from the storage.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: November 21, 2017
    Assignee: Veeam Software AG
    Inventors: Alexey Vasilyev, Alexander Baranov
  • Patent number: 9824025
    Abstract: An information processing system comprising a storage device and an information processing device, wherein the information processing device includes a data holding unit which holds first data, a first detection unit which detects a first state of access, and a transmission unit which transmits the first state of access detected by the first detection unit to the storage device, and the storage device includes a storage unit which stores second data, a reception unit which receives the first state of access transmitted from the transmission unit, a second detection unit which detects a second state of access, which is a state of access to the second data, and a control unit which rearranges the second data in the storage unit on the basis of the states of access.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: November 21, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Atsushi Takada, Kazuo Mineno, Isamu Ooishi, Tetsuya Sano, Satoshi Hongo, Satoshi Matsumoto, Yasuhiko Kondo, Kazuhisa Hiramatsu, Makoto Iwadare
  • Patent number: 9817767
    Abstract: A semiconductor apparatus may include: a buffer configured to store write request data input in response to a write request from a host; a memory device configured to store data evicted from the buffer; and a controller configured to control the buffer and the memory device to process the write request.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: November 14, 2017
    Assignees: SK Hynix Inc., Industry-University Cooperation Foundation Hanyang University
    Inventors: Sungbae Lee, Yong Ho Song
  • Patent number: 9817578
    Abstract: Storage space is reclaimed by cleaning and compacting data objects where data objects are stored by immutable storage. A storage area of which space needs to be reclaimed is identified. Active and stale data objects stored in a storage area are identified, and only active data objects are transferred to a shadow storage area from the storage area when recovering storage space. I/O operations can be fulfilled from the storage area and the shadow storage area. Compaction requests and I/O requests are throttled according to QOS parameters. Recovery of storage space does not cause a failure to meet performance requirements for any storage volume.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: November 14, 2017
    Assignee: eBay Inc.
    Inventors: Vinay Pundalika Rao, Mark S. Lewis, Anna Povzner
  • Patent number: 9811264
    Abstract: Deploying client-specific applications in a storage system utilizing redundant system resources, including: identifying a redundant controller in the storage system, wherein the storage system includes at least a first controller and the redundant controller; and executing one or more applications on the redundant controller, wherein the one or more applications are executed in a container.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: November 7, 2017
    Assignee: Pure Storage, Inc.
    Inventors: John Colgrove, Lydia Do, Ethan Miller, Terence Noonan
  • Patent number: 9785578
    Abstract: An apparatus and method are provided for controlling access to a memory device. The apparatus has a pending access requests storage that is used to store access requests waiting to be issued to the memory device, and memory access control circuitry is then used to issue to the memory device access requests selected from the pending access requests storage. Access requests are received at an interface of the apparatus from at least one requesting device, and access request evaluation circuitry within the apparatus is arranged to apply criteria to determine, for a current access request, whether to accept that current access request or reject that current access request. The criteria applied takes account of at least one access timing characteristic of the memory device. The access request evaluation circuitry is responsive to determining that the current access request is to be accepted, to cause that current access request to be stored in the pending access requests storage.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: October 10, 2017
    Assignee: ARM Limited
    Inventors: Mark Andrew Brittain, Michael Andrew Campbell
  • Patent number: 9787771
    Abstract: The present invention permits improved data access and improved date management in a computer system. To this end, data are divided into individual partial data (F) and stored in cells (Z) of storage devices (C) in such a way that the partial data (F) being accessed and managed are present in the computer system in a redundant manner. Computer units (CL) are able to access the redundantly stored data. The fact that they are stored in the storage devices (C) ensures that the computer units (CL) accessing said data are supplied more rapidly. This is achieved in particular owing to the fact that the redundantly stored data are accessed in accordance with parameters of data transmissions between the computer units (CL) and the data storage devices (C) and that, in according with said data transmission parameters, the redundantly stored data are moved to and from the data storage devices (C) by corresponding copy and delete operations.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: October 10, 2017
    Assignee: AC TECHNOLOGIES S.A.
    Inventor: Thomas Binzinger
  • Patent number: 9778997
    Abstract: A server backup method and a backup system using the server backup method are provided. The server backup method includes continuously collecting a plurality of dirty pages during a running operation and determining a backup start time point according to a quantity of the collected dirty pages. The server backup method also includes suspending the running operation according to the backup start time point and executing a backup snapshot operation to generate a data backup snapshot corresponding to the dirty pages, and executing a backup transmission operation to transmit the data backup snapshot.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: October 3, 2017
    Assignee: Industrial Technology Research Institute
    Inventors: Po-Jui Tsao, Yi-Feng Sun, Chuan-Yu Cho, Tzi-Cker Chiueh
  • Patent number: 9772939
    Abstract: For flash-optimized data placement in multi-tiered, log-structured storage systems, based on at least one key-level data heat metric, sets of key-value pairs determined to exhibit similar data heat characteristics are grouped. Those key-value pairs exhibiting a hotter data heat characteristic are placed into a separate flash memory log-structured data container than those key-value pairs exhibiting a colder data heat characteristic.
    Type: Grant
    Filed: January 5, 2015
    Date of Patent: September 26, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Aayush Gupta, Sangeetha Seshadri
  • Patent number: 9760478
    Abstract: A read leveling method for a memory device is provided. The memory device includes a first memory block and at least a second memory block. The read leveling method includes the following steps. Determining whether a block read count of the first memory block is larger than or equal to a first threshold. Detecting a page read count of a page of the first memory block when the block read count of the first memory block is larger than or equal to the first threshold. Determine whether the block read count of the first memory block is larger than or equal to a second threshold. Move data of one of the page of the first memory block to a page of the second memory block when the block read count of the first memory block is larger than or equal to the second threshold.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: September 12, 2017
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yu-Ming Chang, Tai-Chun Kuo, Wei-Chieh Huang, Ping-Hsien Lin, Tzu-Hsiang Su
  • Patent number: 9760445
    Abstract: Data protection using change-based measurements in block-based backup is disclosed. Block change information indicating an extent of change associated with a volume may be determined. The block change information may be based at least in part on stored information indicating monitored changes to blocks in the volume. A backup operation may be initiated based at least in part on the determined block change information.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: September 12, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: Shelesh Chopra, Vladimir Mandic
  • Patent number: 9760457
    Abstract: A read cache may include portions of files stored on media of a media library. Embodiments described herein may include systems and methods for restoring a read cache, including restoring stub files to a read cache on an ad hoc basis.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: September 12, 2017
    Assignee: KIP CR P1 LP
    Inventors: Robert C. Sims, Brian J. Bianchi, William H. Moody, II
  • Patent number: 9734088
    Abstract: A method for accessing data blocks stored in a computer system. The method may include hardware components for controlling access to a memory unit of the computer system. The memory unit includes a page table and an operating system, where each data block of the data blocks is accessed via a virtual address. The method further includes: adding an entry in the page table for each data block of a first set of the data blocks, the page table represents the virtual address; checking that a first entry of the added entries represents a first virtual address, in response to receiving a request of a first data block via the first virtual address by a memory management unit of the computer system; and obtaining a first physical address of the first data block from the hardware components, and the added entry is provided without indication of the first physical address.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: August 15, 2017
    Assignee: International Business Machines Corporation
    Inventors: Matthias Klein, Marco Kraemer, Carsten Otte, Christoph Raisch
  • Patent number: 9734089
    Abstract: A method for accessing data blocks stored in a computer system. The method may include hardware components for controlling access to a memory unit of the computer system. The memory unit includes a page table and an operating system, where each data block of the data blocks is accessed via a virtual address. The method further includes: adding an entry in the page table for each data block of a first set of the data blocks, the page table represents the virtual address; checking that a first entry of the added entries represents a first virtual address, in response to receiving a request of a first data block via the first virtual address by a memory management unit of the computer system; and obtaining a first physical address of the first data block from the hardware components, and the added entry is provided without indication of the first physical address.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: August 15, 2017
    Assignee: International Business Machines Corporation
    Inventors: Matthias Klein, Marco Kraemer, Carsten Otte, Christoph Raisch
  • Patent number: 9728233
    Abstract: An apparatus has magnetic logic units a logic circuit configured to receive a serial input bit stream at an input node. Individual bits of data from the serial input bit stream are serially written into individual magnetic logic units without buffering the serial input bit stream between the input node and the individual magnetic logic units. Individual bits of data from individual magnetic logic units are serially read to produce a serial output bit stream on an output node without buffering the serial output bit stream between the individual magnetic logic units and the output node.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: August 8, 2017
    Assignee: Crocus Technology Inc.
    Inventors: Thao Tran, Douglas Lee, Bertrand Cambou
  • Patent number: 9720613
    Abstract: A system and method for allocating storage devices within a multi-node data storage system. The system maintains a data structure including a generation number indicating an incarnation of the data structure, a highest cylinder ID index value observed to be in use within the data storage system, and a safe index value indicating a lowest cylinder ID index value for use when allocating a new cylinder index. Following receipt of an allocation request, the system assigns a cylinder ID index to the allocation request, the cylinder ID index being greater than the safe index value. The assigned cylinder ID index is compared to the highest cylinder ID index value observed to be in use within said data storage system, and when the cylinder ID index is greater than the highest cylinder ID index value, increments the generation number and highest cylinder ID index value maintained within the data structure.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: August 1, 2017
    Assignee: Teradata US, Inc.
    Inventor: Gary Lee Boggs
  • Patent number: 9715445
    Abstract: A memory system or flash card may include an algorithm for identifying and accounting for the rewrite frequency of data to be written to the card. The file system partition or file type of data may be used for monitoring rewrite frequency and predicting future rewrites. A learning algorithm that monitors rewrites may be implemented in firmware for accurate and dynamic identification of file types/partitions with the most likely rewrites. The identification of rewrites may be used to sort the data into groups (e.g. hot data=likely rewritten, and cold data=not likely to be rewritten). The hot data may stay in single level cell (SLC) update blocks longer, while the cold data can be moved to MLC blocks sooner.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: July 25, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Narendhiran Chinnaanangur Ravimohan, Vithya Kannappan, Saranya Nedunchezhiyan, Sivaraj Velusamy
  • Patent number: 9715463
    Abstract: A code protection scheme for controlling access to a memory region in an integrated circuit includes a processor with an instruction pipeline that includes multiple processing stages. A first processing stage receives one or more instructions. A second processing stage receives address information identifying a protected memory region of the memory from the first processing stage and protection information for an identified protected memory region. The protection information indicates a protection state assigned to each protected memory region. Based on the instruction type of the received instruction and the protection information associated with a particular protected memory region, the second processing stage determines whether to enable or disable access to the particular protected memory region by the processor or other external host.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: July 25, 2017
    Assignee: Synopsys, Inc.
    Inventors: Pranab Bhooma, Carlos Basto, Kulbhushan Kalra
  • Patent number: 9690716
    Abstract: A processor includes a processing core to execute an application comprising instructions encoding a transaction with a persistent memory via a non-persistent cache, wherein the transaction is to create a mapping from a virtual address space to a memory region identified by a memory region identifier (MRID) in the persistent memory, and tag a cache line of the non-persistent cache with the MRID, in which the cache line is associated with a cache line status, and a cache controller, in response to detecting a failure event, to selectively evict contents of the cache line to the memory region identified by the MRID based on the cache line status.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: June 27, 2017
    Assignee: Intel Corporation
    Inventors: Sheng Li, Sanjay Kumar, Victor W. Lee, Rajesh M. Sankaran, Subramanya R. Dulloor
  • Patent number: 9692767
    Abstract: Systems and methods for managing access data are disclosed. One method can comprise receiving prediction information relating to one or more content options and requesting access information associated with the prediction information. At least a portion of the received access information can be processed to provide a preliminary access decision. A request for access relating to the one or more data options can be received and an access decision based at least in part on the preliminary access decision can be provided.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: June 27, 2017
    Assignee: thePlatform, LLC
    Inventors: Alfred Joseph Stappenbeck, Jr., Joseph Lesh