Patents Examined by Gary Portka
  • Patent number: 8990534
    Abstract: A method for resource management of a data processing system is described herein. According to one embodiment, a token is periodically pushed into a memory usage queue, where the token includes a timestamp indicating time entering the memory usage queue. The memory usage queue stores a plurality of memory page identifiers (IDs) identifying a plurality of memory pages currently allocated to a plurality of programs running within the data processing system. In response to a request to reduce memory usage, a token is popped from the memory usage queue. A timestamp of the popped token is then compared with current time to determine whether a memory usage reduction action should be performed.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: March 24, 2015
    Assignee: Apple Inc.
    Inventors: Lionel D. Desai, Neil G. Crane, Damien P. Sorresso, Joseph Sokol, Jr.
  • Patent number: 8990535
    Abstract: A method for operating a memory controller capable of controlling a maximum count of a read retry operation is disclosed. The method includes programming a first real time clock (RTC) value indicating a time-of-day when a program operation is performed when the program operation for programming a data to a storage region of a non-volatile memory, obtaining information for the storage region by using the first RTC value read from the non-volatile memory and a second RTC value indicating a time-of-day when a read operation is performed, when the read operation for the data programmed to the storage region is performed, and decreasing a maximum count of a read retry operation by using the information, when the read retry operation is performed for the storage region.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: March 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun Seok Kim, Sung Bin Kim, Sung-Hwan Bae, Jong-Nam Baek, Sang Hoon Lee
  • Patent number: 8977827
    Abstract: A read cache may include portions of files stored on media of a media library. Embodiments described herein may include systems and methods for restoring a read cache, including restoring stub files to a read cache on an ad hoc basis.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: March 10, 2015
    Assignee: KIP CR P1 LP
    Inventors: Robert C. Sims, Brian J. Bianchi, William H. Moody, II
  • Patent number: 8972685
    Abstract: Techniques and mechanisms for exchanging information from a memory controller to a memory device via a command/address bus. In an embodiment, the memory device samples a first portion of a command during a first sample period and samples a second portion of the command during a second sample period, the first portion and second portion exchanged via the command/address bus. The first sample period and the second sample period are concurrent with, respectively, a first transition of a clock signal and a second transition of the clock signal. In another embodiment, a mode of the memory device determines a relationship between the first transition and the second transition.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: March 3, 2015
    Assignee: Intel Corporation
    Inventors: Kuljit S. Bains, James A. McCall
  • Patent number: 8966156
    Abstract: Disclosed is a memory device which comprises a data storing part having plural physical storage spaces; and a control part for storing data in the data storing part, wherein each of the physical storage spaces comprises a main area for storing user data at a write operation and a spare area for storing additional data other than the user data, the additional data including a logical address corresponding to a physical storage space and a link value indicating a physical storage space to be accessed next.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: February 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Wonmoon Cheon
  • Patent number: 8959297
    Abstract: An apparatus and associated methodology for a data storage system having a data storage space operably transferring user data via input/output (I/O) commands between the data storage system and another device. The data storage space includes a first memory device operably storing location information for a selected user data set corresponding to one of the I/O commands. The first memory also operably stores a first amount of the selected user data set. The data storage space also includes a second memory device different than the first memory device and operably storing a different second amount of the selected user data set. The data storage system has a controller that interleaves an entirety of the selected user data set from the first and second memory devices during execution of another of the I/O commands.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: February 17, 2015
    Assignee: Spectra Logic Corporation
    Inventors: Joshua Daniel Carter, Burkhard Eichberger, Matthew Thomas Starr
  • Patent number: 8949515
    Abstract: Disclosed is a storage device using non-volatile semiconductor memory that achieves high performance and long life for the device. When managing the non-volatile semiconductor memory (2), physical blocks are classified into three types: scratch blocks (22), data blocks (23), and erased blocks (24). Data writing from a host device (3) is performed on the scratch blocks. When the number of empty pages within a scratch block becomes less than a predetermined number or no longer exists, the block is treated thereafter as a data block, and one of the erased blocks is newly assigned as a scratch block. If there are insufficient erased blocks, a block with relatively less valid data is selected from among the data blocks. After copying all valid data included in the block to a scratch block, the block is erased, and thus an erased block is acquired.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: February 3, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Masataka Nishi, Ryo Fujita, Ryoichi Inada, Takuma Nishimura, Masahiro Shiraishi, Koji Matsuda
  • Patent number: 8949503
    Abstract: A protocol controller disposed between switches in a fiber channel fabric switch circuit and disk drive units for converting a protocol to enable one-to-one connectivity established between controllers and disk drive units.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: February 3, 2015
    Assignee: Hitachi, Ltd.
    Inventor: Kazuhisa Aruga
  • Patent number: 8943294
    Abstract: Disclosed is a software architecture supporting a large-capacity collective memory layer in a multi-node system by using a remote direct memory access technique and a software virtualization technique and a computing system performing computing processing by using the architecture. In particular, provided is a software architecture including: a memory region managing module collectively managing a predetermined memory region of a node, a memory service providing module providing a large-capacity collective memory service to a virtual address space in a user process, and a memory sharing support module supporting sharing of the large-capacity collective memory of the multi-node system.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: January 27, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Gyu II Cha, Young Ho Kim, Eun Ji Lim, Dong Jae Kang, Sung In Jung
  • Patent number: 8938599
    Abstract: In a method of implementing a graph storage system, the graph storage system is stored on a plurality of computing systems. A global address space is provided for distributed graph storage. The global address space is managed with graph allocators, in which a graph allocator allocates space from a block of the distributed global memory in order to store a plurality of graphs.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: January 20, 2015
    Assignee: Hewlett-Packard Development Company, L. P.
    Inventors: Michael Mihn-Jong Lee, Indrajit Roy, Vanish Talwar, Alvin AuYoung, Parthasarathy Ranganathan
  • Patent number: 8935484
    Abstract: A write-absorbing, volatile memory buffer for use with a processor module and a non-volatile memory is disclosed. The write-absorbing buffer operates as a dirty cache that can be used to look up both read and write requests, although allocating new blocks only for write requests and not read requests. The blocks are small sized, and a write-only least-recently used cache replacement policy is used to transfer data in the blocks to the non-volatile memory. The write-absorbing buffer can be used to store copy-on-write pages for at least one virtual machine associated with the processor module and reduce write overhead to the non-volatile memory.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: January 13, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jichuan Chang, Parthasarathy Ranganathan, David Roberts
  • Patent number: 8935503
    Abstract: The management device includes a storing unit, a determining unit, and a deleting unit. The storing unit stores data in a memory unit. When a retention period the stored data reaches a retention period specified for each data type, the determining unit 22c determines whether a size of the data reaches a threshold specified for each data type. When it is determined that the size of the data reaches the threshold specified for each data type, in order to reduce the size of the data having the data type that reaches the threshold to a size smaller than the threshold, the deleting unit 22d deletes the data having the data type that reaches the threshold from the memory unit 21.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: January 13, 2015
    Assignee: Fujitsu Limited
    Inventor: Fumiyuki Iizuka
  • Patent number: 8930968
    Abstract: A data processing method and driver capable of reducing transactions between operating systems (OS) in a virtualization environment that supports a plurality of operating systems are provided. The data processing driver reads, when reading data, an Inode of next data. Then, the data processing driver determines whether or not to request an Inode to a host OS by comparing the read Inode with a requested Inode.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: January 6, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bo-Seok Moon, Sang-Bum Suh, Sung-Min Lee
  • Patent number: 8924624
    Abstract: An information processing device includes: a data transferring unit configured to directly transfer data to a first memory area allocated to a virtual machine from an input/output device for controlling a data input/output to/from an external device by mutually translating between an address of the first memory area allocated to the virtual machine and an address of a second memory area that is a real memory of the first memory area; a detecting unit configured to detect the data directly transferred from the input/output device to the first memory area allocated to the virtual machine; a registering unit configured to generate update information about the first memory area changed using the detected data and to store the update information in a first storing unit when the detected data satisfies a predetermined condition; and an outputting unit configured to output the update information.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: December 30, 2014
    Assignee: Fujitsu Limited
    Inventor: Takashi Miyoshi
  • Patent number: 8924634
    Abstract: A method for performing host-directed operations is provided, where the method is applied to a controller of a Flash memory that includes a plurality of blocks. The method includes: in a test mode of the controller, when receiving a host command from a host device, extracting at least one portion of associated information of the host command, where the at least one portion of the associated information is an encoded result that is generated by performing encoding on a host-directed operation command; and analyzing the at least one portion of the associated information according to at least one predetermined rule, in order to perform a host-directed operation corresponding to the host-directed operation command. An associated memory device and a controller thereof are also provided.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: December 30, 2014
    Assignee: Silicon Motion Inc.
    Inventors: Ming-Yen Lin, Hsu-Ping Ou
  • Patent number: 8874863
    Abstract: Systems and methods are provided for an asynchronous data replication system in which the remote replication reduces bandwidth requirements by copying deduplicated differences in business data from a local storage site to a remote, backup storage site, the system comprising: a local performance storage pool for storing data; a local deduplicating storage pool for storing deduplicated data, said local deduplicating storage pool further storing metadata about data objects in the system and which has metadata analysis logic for identifying and specifying differences in a data object over time; a remote performance storage pool for storing a copy of said data, available for immediate use as a backup copy of said data to provide business continuity to said data; a remote deduplicating storage pool for storing deduplicated data; and a controller for synchronizing the remote performance storage pool to have the second version of the data object using deduplicated data.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: October 28, 2014
    Assignee: Actifio, Inc.
    Inventors: Madhav Mutalik, Christopher A. Provenzano, Philip J. Abercrombie
  • Patent number: 8874876
    Abstract: A method for performing packet lookups is provided. Packets (which each have a body and a header) are received and parsed to parsing headers. A hash function is applied to each header, and each hashed header is compared with a plurality of binary rules stored within a primary table, where each binary rule is a binary version of at least one ternary rule from a first set of ternary rules. For each match failure with the plurality of rules, a secondary table is searched using the header associated with each match failure, where the secondary table includes a second set of ternary rules.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: October 28, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Sandeep Bhadra, Aman A. Kokrady, Patrick W. Bosshart, Hun-Seok Kim
  • Patent number: 8868868
    Abstract: Method and system for providing information regarding a plurality of storage devices managed by a plurality of storage servers are provided. The storage space at the storage devices is presented to a plurality of computing systems as logical storage space. A plurality of searchable data structures having a plurality of data object types are stored at a temporary memory storage device of a management console that interfaces with the plurality of computing systems and the storage servers. Each data object type stores information regarding the storage device. The searchable data structure includes information regarding the storage devices and the logical storage space presented to the computing systems. A lock data structure for tracking locks that are assigned for accessing information pertaining to a storage server and a data object type is maintained to prevent unauthorized access to at least one of the searchable data structures.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: October 21, 2014
    Assignee: NetApp, Inc.
    Inventors: Nilesh P. Maheshwari, Sreenivasa Potakamuri, Robert M. Armitano, Yinzen Hwang
  • Patent number: 8862860
    Abstract: Methods and apparatus may operate to receive allocation requests from a processor configured to manage memory comprising a non-volatile memory device configurable as a plurality of blocks comprising a plurality of sectors, assign partial page blocks from the plurality of blocks for memory storage, fill some of the sectors by storing data bits associated with the allocation request in the at least one of the plurality of sectors, determine that the sectors are full, assigning a full page block from the plurality of blocks, and transfer the data bits associated with the allocation request from the partial page blocks to the full page block. Other apparatus, systems, and methods are disclosed.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: October 14, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Viet Ly, Michael Murray
  • Patent number: 8856489
    Abstract: A system and method for efficiently performing user storage virtualization for data stored in a storage system including a plurality of solid-state storage devices. A data storage subsystem supports multiple mapping tables. Records within a mapping table are arranged in multiple levels. Each level stores pairs of a key value and a pointer value. The levels are sorted by time. New records are inserted in a created newest (youngest) level. No edits are performed in-place. All levels other than the youngest may be read only. The system may further include an overlay table which identifies those keys within the mapping table that are invalid.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: October 7, 2014
    Assignee: PURE Storage, Inc.
    Inventors: John Colgrove, John Hayes, Ethan Miller, Feng Wang