Patents Examined by H Tsai
  • Patent number: 8766228
    Abstract: An electrically actuated device includes a first electrode, a second electrode, and an active region disposed between the first and second electrodes. The device further includes at least one of dopant initiators or dopants localized at an interface between i) the first electrode and the active region, or ii) the second electrode and the active region, or iii) the active region and each of the first and second electrodes.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: July 1, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jianhua Yang, Duncan Stewart, Philip J. Kuekes, William M. Tong
  • Patent number: 8759176
    Abstract: Methods in accordance with the invention involve patterning and etching very small dimension pillars, such as in formation of a memory array in accordance with the invention. When dimensions of pillars become very small, the photoresist pillars used to pattern them may not have sufficient mechanical strength to survive the photoresist exposure and development process. Using methods according to the present invention, these photoresist pillars are printed and developed larger than their intended final dimension, such that they have increased mechanical strength, then are shrunk to the desired dimension during a preliminary etch performed before the etch of underlying material begins.
    Type: Grant
    Filed: April 10, 2009
    Date of Patent: June 24, 2014
    Assignee: SanDisk 3D LLC
    Inventors: Usha Raghuram, Michael W. Konevecki
  • Patent number: 8757979
    Abstract: A rotor element includes at least one irregularity with regard to rotational properties in its circumferential direction and the irregularity is positioned so as to separate the mechanical natural frequencies of the rotor element.
    Type: Grant
    Filed: October 5, 2006
    Date of Patent: June 24, 2014
    Assignee: Volvo Aero Corporation
    Inventor: Hans Martensson
  • Patent number: 8753900
    Abstract: Methods and apparatus for routing signal paths in an integrated circuit. One or more signal routing paths for transferring signals of the integrated circuit may be determined. A dummy fill pattern for the integrated circuit may be determined based on the one or more metal density specifications and at least one design rule for reducing cross coupling capacitance between the dummy fill pattern and the routing paths. The signal routing paths and/or the dummy fill pattern may be incrementally optimized to meet one or more timing requirements of the integrated circuit.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: June 17, 2014
    Assignee: International Business Machines Corporation
    Inventors: Karan B. Koti, Veena Prabhu
  • Patent number: 8748997
    Abstract: Provided are a contact-force sensor package and a method of fabricating the same. The contact-force sensor package includes an elastic layer comprising a side that contacts a source of a contact-force; and a substrate layer adhered to the opposing side of the elastic layer from the side that contacts the source of the contact-force and comprising a cantilever beam separated from the elastic layer and deformed due to the contact-force, a pillar extending from a free end portion of the cantilever beam to the elastic layer and transferring the contact-force from the elastic layer to the cantilever beam, and a deformation sensing element for generating an electrical signal that is proportional to a degree of deformation of the cantilever beam.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: June 10, 2014
    Assignees: Samsung Electronics Co., Ltd., Center for University-Industry Corporation
    Inventors: Jong-pal Kim, Byeung-leul Lee
  • Patent number: 8748246
    Abstract: A transistor includes a semiconductor substrate includes having a gate hardmask over the gate electrode layer during the formation of transistor source/drain regions. An independent work function adjustment process implants Group IIIa series dopants into a gate polysilicon layer of a PMOS transistor and implants lanthanide series dopants into a gate polysilicon layer of a NMOS transistor.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: June 10, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Manfred Ramin, Michael Pas
  • Patent number: 8749057
    Abstract: Methods for forming structures to use in atomic force probing of a conductive feature embedded in a dielectric layer and structures for use in atomic force probing. An insulator layer is formed on the dielectric layer such that the conductive feature is covered. A contact hole penetrates from a top surface of the insulator layer through the insulator layer to the conductive feature. The contact hole is at least partially filled with a conductive stud that is in electrical contact with the conductive feature and exposed at the top surface of the insulator layer so as to define a structure. A probe tip of an atomic force probe tool is landed on a portion of the structure and used to electrically characterize a device structure connected with the conductive feature.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: June 10, 2014
    Assignee: International Business Machines Corporation
    Inventors: David R. Goulet, Walter V. Lepuschenko
  • Patent number: 8726829
    Abstract: A chemical bath deposition apparatus is presented to prepare different thin films on continuous flexible substrates in roll-to-roll processes. In particular, they are useful to deposit CdS or ZnS buffer layers in manufacture of thin film solar cells. This apparatus deposits thin films onto vertically travelling continuous flexible workpieces delivered by a roll-to-roll system. The thin films are deposited with continuously spraying the reaction solutions from their freshly mixed styles to gradually aged forms until the designed thickness is obtained. The substrates and the solutions are heated to a reaction temperature. During the deposition processes, the front surfaces of the flexible substrates are totally covered with the sprayed solutions but the substrate backsides are remained dry. The reaction ambience inside the reactor can be isolated from the outside atmosphere. The apparatus is designed to generate a minimum amount of waste solutions for chemical treatments.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: May 20, 2014
    Inventor: Jiaxiong Wang
  • Patent number: 8729434
    Abstract: An induction cooking device includes a heating coil performing induction heating of a cooking container placed on a top plate, an inverter circuit supplying high frequency current to the heating coil, an infrared sensor detecting an amount of infrared light radiated from the cooking container and outputting a detection signal based on the detected amount, a temperature sensor detecting a temperature of the cooking container by thermal conduction through the top plate, and a control unit controlling an output of the inverter circuit so that the outputs of the infrared and temperature sensors do not exceed the respective control temperature. The control unit judges whether or not the infrared sensor is normally detecting the temperature of the cooking container, and when it is judged that the infrared sensor is normally detecting the temperature of the cooking container, the control unit raises the control temperature of the temperature sensor.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: May 20, 2014
    Assignee: Panasonic Corporation
    Inventors: Hiroshi Tominaga, Kenji Watanabe, Izuo Hirota, Sadatoshi Tabuchi, Keiko Isoda
  • Patent number: 8729628
    Abstract: Junction field-effect transistors with vertical channels and self-aligned regrown gates and methods of making these devices are described. The methods use techniques to selectively grow and/or selectively remove semiconductor material to form a p-n junction gate along the sides of the channel and on the bottom of trenches separating source fingers. Methods of making bipolar junction transistors with self-aligned regrown base contact regions and methods of making these devices are also described. The semiconductor devices can be made in silicon carbide.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: May 20, 2014
    Assignee: Power Integrations, Inc.
    Inventors: Joseph Neil Merrett, Igor Sankin
  • Patent number: 8729548
    Abstract: The present invention supplies a manufacturing method of a semiconductor device, which includes a non-contact inspection process capable of confirming if a circuit or circuit element formed on an array substrate is normally performed and can decrease a manufacturing cost by eliminating wastes to keep a defective product forming. An electromotive force generated by electromagnetic induction is rectified and shaped by using primary coils formed on a check substrate and secondary coils formed on an array substrate, whereby a power source voltage and a driving signal are supplied to circuits or circuit elements on a TFT substrate so as to be driven.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: May 20, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masaaki Hiroki, Shunpei Yamazaki
  • Patent number: 8729662
    Abstract: A semiconductor integrated circuit is reduced in size by suppressing lateral extension of an isolation region when impurities are thermally diffused in a semiconductor substrate to form the isolation region. Boron ions (B+) are implanted into an epitaxial layer through a third opening K3 to form a P-type impurity region, using a third photoresist as a mask. Then a fourth photoresist is formed on a silicon oxide film to have fourth openings K4 (phosphorus ion implantation regions) that partially overlap the P-type impurity region. Phosphorus ions (P+) are implanted into the surface of the epitaxial layer in etched-off regions using the fourth photoresist as a mask to form N-type impurity regions that are adjacent the P-type impurity region. After that, a P-type upper isolation region is formed in the epitaxial layer by thermal diffusion so that the upper isolation region and a lower isolation region are combined together to make an isolation region.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: May 20, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Keiji Mita
  • Patent number: 8716144
    Abstract: A method for manufacturing a semiconductor device for forming a deep hole in a substrate by using a photoresist film formed on the substrate includes a positioning step of positioning a substrate inside an etching chamber, the substrate having a photoresist film including an opening part formed thereon, a first etching step of performing plasma etching on the substrate positioned inside the etching chamber by using a first mixed gas including at least SiF4 and O2 with the photoresist film as a mask, and a second etching step of forming a hole in the substrate by performing plasma etching on the substrate by using a second mixed gas including at least SF6, O2, and HBr after the first etching step.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: May 6, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Shuichiro Uda, Koji Maruyama, Yusuke Hirayama
  • Patent number: 8627295
    Abstract: Methods and apparatus for testing user interfaces are disclosed herein. An example method includes extracting object data from a file associated with a user interface; storing a plurality of object definitions corresponding to the extracted object data in a computer readable storage medium; and generating, at a computer having a tangible memory, a test script for the user interface using the object definitions, wherein the test script is to be generated based on one or more test definitions defining one or more attributes of the object definitions to be tested in the test script, and wherein the test script is to be generated based on one or more automation rules defining how the object definitions are to be tested.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: January 7, 2014
    Assignee: General Electric Company
    Inventors: Harold Brooks Foley, Christine Peeters
  • Patent number: 8612653
    Abstract: An information processing apparatus includes a plurality of recording media, an operation unit receiving an operation from a user, a communication unit outputting data stored on the recording media to an external device, and a controller displaying, on a display unit, a setting screen for setting a mode for outputting data via the communication unit and to control the apparatus on the basis of information input on the setting screen. The controller displays, as the setting screen, a function selection screen enabling the user to simultaneously select a recording medium serving as a source from which data is output via the communication unit and a function to be executed. On the basis of information input on the function selection screen using the operation unit, the controller performs a setting operation to output data recorded on the selected recording medium in accordance with a communication mode based on the selected function.
    Type: Grant
    Filed: November 2, 2006
    Date of Patent: December 17, 2013
    Assignee: Sony Corporation
    Inventors: Kenichiro Nitta, Tatsuhito Tabuchi
  • Patent number: 8578068
    Abstract: Data communications with reduced latency, including: writing, by a producer, a descriptor and message data into at least two descriptor slots of a descriptor buffer, the descriptor buffer comprising allocated computer memory segmented into descriptor slots, each descriptor slot having a fixed size, the descriptor buffer having a header pointer that identifies a next descriptor slot to be processed by a DMA controller, the descriptor buffer having a tail pointer that identifies a descriptor slot for entry of a next descriptor in the descriptor buffer; recording, by the producer, in the descriptor a value signifying that message data has been written into descriptor slots; and setting, by the producer, in dependence upon the recorded value, a tail pointer to point to a next open descriptor slot.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: November 5, 2013
    Assignee: International Business Machines Corporation
    Inventors: Michael A. Blocksome, Jeffrey J. Parker
  • Patent number: 8495583
    Abstract: A method is implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions. The programming instructions are operable to receive one or more risk factors, receive one or more contexts, identify one or more context relationships and associate the one or more contexts with the one or more risk factors. Additionally, the programming instructions are operable to map the one or more risk factors for an associated context to a software defect related risk consequence to determine a risk model and execute a risk-based testing based on the risk model to determine a defect related risk evaluation for a software development project.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: July 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Kathryn A. Bassin, Howard M. Hess, Sheng Huang, Steven Kagan, Shao C. Li, Zhong J. Li, He H. Liu, Susan E. Skrabanek, Hua F. Tan, Jun Zhu
  • Patent number: 8402172
    Abstract: A method and system for processing an input/output request on a multiprocessor computer system comprises pinning a process down to a processor issuing the input/output request. An identity of the processor is passed to a device driver which selects a device adapter request queue whose interrupt is bound to the identified processor and issues the request on that queue. The device accepts the request from the device adapter, processes the request and raises a completion interrupt to the identified processor. On completion of the input/output request the process is un-pinned from the processor. In an embodiment the device driver associates a vector of the identified processor with the request and the device, on completion of the request, interrupts the processor indicated by the vector.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: March 19, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kishore Kumar Muppirala, Bhanu Gollapudi Venkata Prakash, Narayanan Ananthakrishnan Nellayi
  • Patent number: 8364862
    Abstract: In one embodiment, the present invention includes a method for handling a registration message received from a host processor, where the registration message delegates a poll operation with respect to a device from the host processor to another component. Information from the message may be stored in a poll table, and the component may send a read request to poll the device and report a result of the poll to the host processor based on a state of the device. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: January 29, 2013
    Assignee: Intel Corporation
    Inventors: Michael J. Espig, Zhen Fang, Ravishankar Iyer, David J. Harriman
  • Patent number: 8332544
    Abstract: Systems, methods, and computer program products for assisting play are disclosed. In some examples, the system may include a portable computer including a user interface configured to receive input from a user, and a computer communication mechanism configured to transmit computer data based, at least in part, on the received user input; and a plurality of portable devices each including an enclosure, a device communication mechanism within the enclosure and configured to receive the computer data, a proximity sensor mechanism configured to detect proximity of one or more other portable devices of the plurality of portable devices, and an audiovisual output mechanism configured to generate at least one of an audio output and a visual output based on at least one of (1) the received computer data and (2) the detected proximity of the one or more other portable devices.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: December 11, 2012
    Assignee: Mattel, Inc.
    Inventors: Chaun J. Ralls, Andrew Cheeseman, Michael Young, Paul King, Peter Marx