Abstract: Disclosed here is an apparatus that comprises an amplifier having first and second input nodes, first and second resistors, a first electrostatic discharge protection circuit coupled between the first input node and the first resistor, and a second electrostatic discharge protection circuit coupled between the second input node and the second resistor.

Abstract: A multistage linear power amplifier receiving an input signal. The multistage linear power amplifier comprises a plurality of Class-AB amplifiers connected in a cascade configuration. The plurality of Class-AB amplifiers amplifies the input signal to generate an amplified input signal. At least one of the plurality of Class-AB amplifiers is biased such that the multistage linear power amplifier emulates a Class-C amplifier.

Abstract: A low noise amplifier includes an amplifier transistor having a source, a gate, and a drain. An input node is coupled to the gate. An output node is coupled to the drain. An inductor is coupled between the gate and the drain.

Abstract: A power amplification circuit includes: a first amplifier that is input with a first signal and outputs a second signal; a bias circuit that supplies a bias current or voltage to the first amplifier; and a control voltage generating circuit that generates a control voltage in accordance with the first signal. The bias circuit includes a first transistor that outputs the bias current or voltage, a second transistor provided between the emitter or source of the first transistor and ground, and a third transistor that is supplied with the control voltage and that supplies a first current or voltage to the second transistor. The value of the first current or voltage when the signal level is a first level is larger than the value of the first current or voltage when the signal level is a second level. The first level is higher than the second level.

Abstract: Exemplary embodiments are related to method and devices for calibration a radio-frequency (RF) transceiver. A method may include calibrating an RF device by calculating input voltage values and bias voltage values of a power amplifier for each desired output voltage value of the power amplifier to generate a desired compression point. The method may also include applying digital pre-distortion (DPD) values to the input voltage of the power amplifier, and measuring a value of the output voltage after applying the DPD values.

Abstract: The present disclosure relates to a radio frequency (RF) unit of a base station, and more particularly, to a method of manufacturing an RF power amplifier module, an RF power amplifier module, an RF module, and a base station. The RF power amplifier module includes at least a power device, a power circuit board, a heat-dissipation substrate, and input/output ports. A power device die of the power device and the power circuit board are mounted on the heat-dissipation substrate. The power device die is connected to the power circuit board through packaging lead wires. In one exemplary embodiment, a heat-dissipation effect and manufacturing efficiency of the RF power amplifier module are improved and a cost of the RF power amplifier module is reduced.

Abstract: A power amplification module includes a first transistor which amplifies and outputs a radio frequency signal input to its base; a current source which outputs a control current; a second transistor connected to an output of the current source, a first current from the control current input to its collector, a control voltage generation circuit connected to the output and which generates a control voltage according to a second current from the control current; a first FET, the drain being supplied with a supply voltage, the source being connected to the base of the first transistor, and the gate being supplied with the control voltage; and a second FET, the drain being supplied with the supply voltage, the source being connected to the base of the second transistor, and the gate being supplied with the control voltage.

Abstract: Provided herein are apparatus and methods for compensating an operational amplifier (op-amp). In certain configurations, a compensation network is electrically connected between an output node of the op-amp and an input differential pair coupled source/emitter tail-current node. The compensation network can include a capacitor having a relatively low value of capacitance. In this manner, op-amp bandwidth is improved while power consumption is reduced to meet a “green” standard.

Abstract: Radio frequency power amplifier circuitry includes an amplifier element, power supply modulation circuitry, and bias modulation circuitry. The amplifier element is configured to amplify an RF input signal using a modulated power supply signal and a modulated bias signal to produce an RF output signal. The power supply modulation circuitry is coupled to the amplifier element and configured to provide the modulated power supply signal. The bias modulation circuitry is coupled to the amplifier element and the power supply modulation circuitry and configured to receive the modulated power supply signal and provide the modulated bias signal. Notably, the modulated bias signal is a function of the modulated power supply signal such that the modulated bias signal is configured to maintain a small signal gain of the amplifier element and the phase of the RF input signal at a constant value as the modulated power supply signal changes.

Abstract: A control apparatus is provided that can provide high dynamic resolution and is suitable for inclusion within an integrated circuit. The control apparatus receives a demand signal representing a desired value of a measurand, and a feedback signal representing a present value or a recently acquired value of the measurand. The processing circuit forms a further signal a further signal which is a function of the demand and feedback signals. The further signal is then subjected to at least an integrating function. The demand signal, feedback signal or the further signal is processed or acquired in a sampled manner. The use of such sampled, i.e. discontinuous, processing allows integration time constants to be synthesized which would otherwise require the use of unfeasibly large components within an integrated circuit, or the use of off-chop components. Both of these other options are expensive.

Abstract: Failure in a self-healing array may be handled by: detecting a failing element of the self-healing array by monitoring characteristics of the failing element; auto-correcting a failing element of the self-healing array by adjusting characteristics of the failing element to compensate for a portion of the failing element which is failing; or correcting performance of the self-healing array when one or more elements of the self-healing array fail by detecting and modeling an impact of the one or more elements of the self-healing array which failed on the performance of the self-healing array.

Abstract: A two-way Doherty amplifier for amplifying a modulated or non-modulated carrier signal, said carrier signal having a carrier frequency; wherein the Doherty amplifier comprises a first amplifier having a first amplifier output node, a second amplifier having a second amplifier output node, a combining node connected or connectable to a load, a first amplifier output line connecting the first amplifier output node to the combining node, and a second amplifier output line connecting the second amplifier output node to the combining node, and wherein the first amplifier output line has an electrical length of substantially one quarter wavelength of the carrier signal and the second amplifier output line has an electrical length of substantially one half wavelength of the carrier signal.

Abstract: Cooled electronic circuitry may include multiple and substantially parallel circuitry surfaces, each containing power amplifier circuitry, having a side edge, and includes material between at least a portion of the base plate and the side edge that provides a level of thermal conductivity of at least 167 W/m-k; and a cooling plate having a flat surface attached to each of the side edges of the circuitry surfaces in a thermally-conductive manner.

Abstract: A variable gain transconductance amplifier includes an amplifier transistor connected to an input node, a cascode transistor having a source connected to a drain of the amplifier transistor and having a drain connected to an output node, and a switching circuit connecting or disconnecting a node to which the amplifier transistor and the cascode transistor are connected to or from a fixed potential in a switchable manner. A variable gain circuit may include the variable gain transconductance amplifier.

Abstract: Apparatus and methods for biasing a power amplifier are disclosed. In one embodiment, a method of biasing a power amplifier includes shaping an enable signal using a time-dependent signal generator to generate a control current, amplifying the control current using a current amplifier to generate a correction current, and generating a bias current for a power amplifier using a primary biasing circuit. The primary biasing circuit is configured to use the correction current to correct for a variation in gain of the power amplifier when the power amplifier is enabled.

Abstract: A bias generation method or apparatus defined by any one or any practical combination of numerous features that contribute to low noise and/or high efficiency biasing, including: having a charge pump control clock output with a waveform having limited harmonic content or distortion compared to a sine wave; having a ring oscillator to generating a charge pump clock that includes inverters current limited by cascode devices and achieves substantially rail-to-rail output amplitude; having a differential ring oscillator with optional startup and/or phase locking features to produce two phase outputs suitably matched and in adequate phase opposition; having a ring oscillator of less than five stages generating a charge pump clock; capacitively coupling the clock output(s) to some or all of the charge transfer capacitor switches; biasing an FET, which is capacitively coupled to a drive signal, to a bias voltage via an “active bias resistor” circuit that conducts between output terminals only during portions of a wa

Abstract: A class AB amplifier may include an input stage, a first folded cascode stage, a second folded cascode stage, and a class AB output stage. In some embodiments, the class AB output stage may provide differential output signals. The common-mode voltage of the differential output signals may be controlled via a correction signal coupled to a selected folded cascode stage. The correction signal may control the common-mode voltage of the differential output signals by altering bias currents within the selected folded cascode stage. The other cascode stage may include bias currents controlled by relatively fixed bias voltages.

Abstract: A radio frequency (RF) amplification device comprises an RF amplification circuit, and a dynamic level shifter (DLS) circuit coupled between a supply voltage and the RF amplification circuit. The DLS circuit is configured to provide a first shifted voltage to the RF amplification circuit via a first diode when the supply voltage is above a first threshold voltage level. The DLS circuit is further configured to provide a second shifted voltage to the RF amplification circuit via a first shunt transistor when the supply voltage is below the first threshold voltage level, wherein the supply voltage less the second shifted voltage is less than the supply voltage less the first shifted voltage.

Abstract: A power amplifier module includes a first bipolar transistor configured to amplify a radio frequency signal and output an amplified signal and a second bipolar transistor. A base of the second bipolar transistor is supplied with a control voltage for controlling attenuation of the radio frequency signal, and a collector the second bipolar transistor is supplied with a source voltage. The power amplifier module also includes a first resistor, where one end of the first resistor is connected to a supply path of the radio frequency signal to the first bipolar transistor, and a capacitor, where one end of the capacitor is connected to the other end of the first resistor and the other end of the capacitor is connected to the collector of the second bipolar transistor.

Abstract: A power combining arrangement includes an input divider waveguide and an output combiner waveguide, and a first and second amplifier. The power combining arrangement is configured to amplify RF energy having a characteristic wavelength ?. The first amplifier has a first input electrically coupled with a first output port of the divider waveguide. The second amplifier has a second input electrically coupled with a second output port of the divider waveguide. The first and second output ports are separated by a first distance corresponding to a phase delay Ø1, the first distance being selected substantially independently of the characteristic wavelength. The first amplifier has a first output electrically coupled with a first input port of the combiner waveguide and the second amplifier has a second output electrically coupled with a second input port of the combiner waveguide. The first and second input ports are separated by the first distance.