Abstract: A supply voltage circuit for reducing in-rush battery current in an envelope tracking (ET) integrated circuit (ETIC) is provided. The ETIC includes an ET voltage circuit configured to generate a time-variant ET voltage, which includes an offset voltage, in multiple time intervals based on a supply voltage. In some cases, the offset voltage and the supply voltage may both need to be increased or decreased as the time-variant ET voltage increases or decreases. As the offset voltage and the supply voltage increase or decrease, an excessive in-rush battery current may result in a reduced battery life. In this regard, a supply voltage circuit is configured to help the ETIC to adapt the supply voltage on a per-symbol basis. As a result, it is possible to reduce the in-rush battery current in the ETIC while still allowing the time-variant ET voltage to change in a timely manner.

Abstract: A trans-impedance amplifier (TIA) includes a first circuit, a second circuit, and a third circuit. Both the first circuit and the second circuit are coupled to a current source, an operational amplifier, and the third circuit. The first circuit is configured to receive a first current, provide a third voltage to the third circuit, perform shape filtering on the first current, and convert the shape filtered first current to a first voltage for output. The second circuit is configured to receive a second current, provide a fourth voltage to the third circuit, perform shape filtering on the second current, and convert the shape filtered second current to a second voltage for output. The third circuit is configured to cooperate with the first circuit and the second circuit in performing shape filtering. The operational amplifier is configured to provide a small-signal virtual ground point to the first circuit.

Abstract: A circuit includes a main amplifier having a first input and a first output. A main bias circuit is coupled to the main amplifier, and the main bias circuit configured to operate the main amplifier in a first frequency band. A feedforward cancellation amplifier has a second input and a second output, in which the second input is coupled to the first input, and the second output is coupled to the first output. A filter is coupled between the first input and the second input. A feedforward bias circuit is coupled to the feedforward cancellation amplifier. The feedforward bias circuit is configured to operate the feedforward cancellation amplifier in a second frequency band within and narrower than the first frequency band.

Abstract: A high-linearity amplifier including a main operational amplifier, a feedback circuit, and a compensation circuit is shown. The feedback circuit couples an output signal of the main operational amplifier to an input port of the main operational amplifier. The compensation circuit couples a former-stage circuit of the amplifier to the input port of the main operational amplifier to compensate for the non-linearity of the feedback circuit. The compensation circuit and the feedback circuit form an inverse paralleling linearization architecture. In the inverse paralleling linearization architecture, a resistor in the feedback circuit corresponds to a resistor in the compensation circuit which is biased in an inversed way in comparison with the corresponding resistor in the feedback circuit.

Abstract: A circuit is provided. In some examples, the circuit includes a first transistor having a gate and a drain coupled together and a current source coupled to the drain of the first transistor. A second transistor has a drain coupled to a source of the first transistor. A third transistor has a gate coupled to the gate of the first transistor. A fourth transistor has a drain coupled to a source of the third transistor and a gate of the fourth transistor is coupled to a gate of the second transistor. In some examples, the third transistor is configured to limit a first current between the third transistor and the fourth transistor based on an output voltage.

Abstract: In one example an amplifier includes a bias circuit, an open-loop gain stage including a first PMOS having a gate coupled to a first node, a source coupled to a second node, a drain coupled to a third node, and a bulk coupled to the bias circuit, a second PMOS having a gate coupled to a ground node, a source coupled to the second node, a drain coupled to a fourth node, and a bulk coupled to the bias circuit, a first NMOS having a drain and a gate coupled to the third node and a source coupled to a fifth node, a second NMOS having a drain coupled to the fourth node, a gate coupled to the third node, and a source coupled to the fifth node, an adjustable resistor coupleable between the third and fourth nodes, and a buffer stage coupled to the open-loop gain stage.

Abstract: The present invention provides a circuitry applied to multiple power domains, wherein the circuitry includes a first circuit block and second circuit block, the first circuit block is powered by a first supply voltage of a first power domain, and the second circuit block is powered by a second supply voltage of a second power domain. The first circuit block includes a first amplifier and a switching circuit. The first amplifier is configured to receive an input signal to generate a processed input signal. When the second circuit block is powered by the second supply voltage, the switching circuit is configured to forward the processed input signal to the second circuit block; and when the second circuit block is not powered by the second supply voltage, the switching circuit disconnects a path between the first amplifier and the second circuit block.

Abstract: A dynamic amplifier includes a common-source amplifier configured to receive a gate voltage at a gate node and output a drain current to a drain node; a current mirror configured to mirror the drain current into an output current to an output current; a source capacitor connected to the source node; a load capacitor connected to the output node; a first switch configured to conditionally connect the gate node to an input voltage; a second switch configured to conditionally connect the gate node to a gate-resetting voltage; a third switch configured to conditionally connect the source node to a source-resetting voltage; a fourth switch configured to conditionally connect the drain node to a drain-resetting voltage; and a fifth switch configured to conditionally connect the output node to an output-resetting voltage.

Abstract: A differential operational transconductance amplifier, or DOTA, intended to be used in zero-drift precision operational amplifiers as chopper amplifier stage is disclosed. The DOTA is configured to function with a low-voltage power supply and to have good performance based on circuitry configured to provide a constant gain over a range of common-mode voltages, or VCM. The DOTA further includes bias circuitry configured to respond to the common mode voltage in order to prevent large currents, which can result from the constant gain circuitry, from negatively affecting performance. The DOTA further includes current sources that are configured to prevent temperature variations from negatively affecting performance. The DOTA further includes VCM-driven bias voltages used to optimize the operating point of the differential output stage. The DOTA uses input and input replica transistors having medium threshold voltage, which results in capability to operate at low supply voltages.

Abstract: A semiconductor structure for RF applications comprises: a first ?TP GaN transistor on an SOI wafer or die; and a first resistor connected to the gate of said first transistor.

Abstract: It is described a charge preamplifier device (100) integrated in a chip (200) of semiconductive material comprising: an input (IN) for an input signal (iIN) and an output (OUT) for an output signal (vOUT); a substrate (202) of semiconductive material doped according to a first type of conductivity; an electrically insulating layer (204) placed on said substrate (202); a feedback capacitor (Cf) integrated in the chip (200) and comprising a first electrode (3) connected to the input (IN) and a second electrode (2) connected to the output (OUT). The second electrode (2) is formed by a doped conductive region (205) having a second type of conductivity, opposite to the first type of conductivity, and integrated in the substrate (202) in order to face the first electrode (3).

Abstract: A circuit system for providing thermal stability to a transistor may include: a comparing circuit in electrical communication with the transistor for receiving a present voltage from the transistor and comparing a present voltage to a predetermined bias voltage; a logic gate electronically coupled to an output of the comparing circuit, the logic gate, gate having a high, open position and a low, closed position; and a heating element thermally coupled to the transistor and electrically coupled to the output of the comparing circuit, wherein when the present voltage is lower than the predetermined bias voltage, the gate is in the high, open position providing current to the heating element, and wherein when the present voltage is higher than the predetermine bias voltage the gate is in the low, closed position.

Abstract: A multi-stage amplifier includes a first stage comprising a first common-source amplifier, a first inductive load network comprising a serial connection of a first load resistor and a first load inductor, and a first source network configured to receive a first signal and output a first load signal, and a first inter-stage inductor configured to couple the first load signal to a second signal; and a second stage comprising a second common-source amplifier, a second inductive load network comprising a serial connection of a second load resistor and a second load inductor, and a second source network configured to receive the second signal and output a second load signal, and a second inter-stage inductor configured to couple the second load signal to a third signal, wherein the first load inductor and the second load inductor are laid out to enhance an inter-stage inductive coupling.

Abstract: The present document relates to differential amplifiers. A differential amplifier may comprise a current source, a first transistor, a second transistor, and a compensation circuit. A reference voltage may be applied to a first terminal of the first transistor, and a second terminal of the first transistor may be coupled to an output of the current source. A feedback voltage may be applied to a first terminal of the second transistor, and a second terminal of the second transistor may be coupled to the output of the current source. The compensation circuit may comprise a capacitive element coupled to the first terminal of the first transistor, and the compensation circuit may be configured to reduce a change of the reference voltage at the first terminal of the first transistor.

Abstract: A slewing mitigation technique is presented where just the right amount of charge is provided at the switching instant to a switch capacitor circuit so that operational transconductance amplifier (OTA) does not need to provide high peak current. This eliminates slewing altogether and allows using OTAs with less static current for the same settling accuracy.

Abstract: Class D amplifier circuitry comprising: modulator circuitry; and output stage circuitry, wherein the modulator circuitry is configured to: receive an input signal and first and second carrier signals, wherein the second carrier signal is offset in amplitude with respect to the first carrier signal; generate first and second modulated output signals, each of the first and second modulated output signals being based on the input signal and the first and second carrier signals; and generate a plurality of control signals for the output stage circuitry per signal period of the modulated output signals, wherein the plurality of control signals are based on the first and second modulated output signals, and wherein at least one of the plurality of control signals per signal period comprises a signal level transition.

Abstract: A method for powering an audio amplifier includes receiving an input audio signal in an audio signal processor, delaying the input audio signal in the audio signal processor to generate a delayed audio signal, predicting a power demand estimate by analyzing the input audio signal to calculate the power demand estimate in the audio signal processer, and selecting, by the audio signal processor, power conversion settings for a DC to DC converter on the basis of the power demand estimate. The method further includes supplying power input to the DC to DC converter, converting the power input in accordance with the power conversion settings to provide a power output, powering the audio amplifier using the power output, and supplying the delayed audio signal to the audio amplifier from the audio signal processor to generate an amplified audio signal.

Abstract: An amplifier circuit includes a primary differential amplifier circuit connected to receive a differential input and provide a primary differential output with a first non-linearity. A secondary differential amplifier circuit is connected to receive the differential input. The secondary differential amplifier circuit is configured to generate a secondary differential output with a second non-linearity. The secondary differential output and the primary differential output are coupled together with opposing polarities such that the second non-linearity cancels out at least the first non-linearity.

Abstract: A power control method for a charging system includes: detecting a power signal and an input voltage of the power signal; determining a charging protocol supported by the power signal; and determining whether to conduct a power switching circuit or not according to the input voltage of the power signal and the charging protocol supported by the power signal to provide power for an amplifier chip of the charging system.

Abstract: An audio amplifier that implements current mode control without the use of an explicit or separate current mode sensor is disclosed. The audio amplifier may include a pair of feedback loops that provide current from a node located before an inductor of an output filter and current from a node located after the inductor of the output filter to an integrator circuit. The integrator circuit may be formed from existing circuitry of the audio amplifier controller. Thus, current mode control can be implemented without a separate current mode sensor.