Patents Examined by J. Kerveros
  • Patent number: 6300764
    Abstract: The present invention is directed to a squib fire network including built-in testing which is able to safely and efficiently verify the proper operational status of the squib fire network. All squibs in a given squib fire network of a missile can be tested prior to launch, thereby improving the reliability of weapon deployment.
    Type: Grant
    Filed: August 14, 1998
    Date of Patent: October 9, 2001
    Assignee: Lockheed Martin Corporation
    Inventor: H. Ray Kelley
  • Patent number: 6297661
    Abstract: A system and method for detecting various fault conditions in semiconductor devices. A variable voltage reference is compared to the voltage output of the device during device turn-on to detect circuit fault conditions. The fault condition is then communicated to a controller.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: October 2, 2001
    Assignee: Ford Global Technologies, Inc.
    Inventors: Chingchi Chen, Venkateswara Anand Sankaran
  • Patent number: 6292004
    Abstract: A grid test fixture for electrically testing both bare and loaded printed circuit boards incorporating IC components having high densities and fine pitch electrical test points. The fixture uses a universal grid interface to translate the image pattern associated with selected test points on the board, which are not always in a regular grid array, into the regular grid pattern associated with the test equipment. The universal grid interface is used in combination with standard test fixture components. Test probes arranged in the image pattern of selected test points are oriented in the universal grid interface such that they make electrical contact with associated contact points on a flex, which also are arranged in the image pattern. The flex translates the image pattern into the grid pattern at a location remote from the location of the selected test points on the board.
    Type: Grant
    Filed: April 23, 1999
    Date of Patent: September 18, 2001
    Inventor: Douglas Kocher
  • Patent number: 6291982
    Abstract: The present invention provides a true average wide dynamic range (TA-WDR) power sensor that can be used to make accurate power measurements from −70 dBm to +20 dBm or more (wide dynamic range), regardless of the format of the signal (true average). In one preferred embodiment, the present invention provides a true average wide dynamic range power sensor comprising an input for receiving RF signals having wide dynamic power ranges, a first RF path including a low power diode sensor for measuring RF signals having low power ranges, a second RF path including an attenuator high power sensor for measuring RF signals having high power ranges, and a switch for isolating the first RF path when the high power RF signals exceeds the square law region of the diode sensor.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: September 18, 2001
    Assignee: Agilent Technologies, Inc.
    Inventor: Ajay A. Prabhu
  • Patent number: 6292011
    Abstract: A collector current and a ratio of current amplification which are to measure a punch through breakdown voltage (BVCEO) of a vertical bipolar transistor device are indicated as IC and hFE. A base current IB having 1% of IC/hFE or less is caused to flow to a base of the device. In the state in which the base current IB is injected into a base terminal, a constant voltage (VE) of a ground potential is applied to an emitter terminal and a voltage sweep is performed with a predetermined step width over a collector terminal. When the collector current reaches the current IC to measure the punch through breakdown voltage, the voltage sweep is stopped to measure the punch through breakdown voltage as a collector voltage VC. Consequently, a collector and emitter punch through breakdown voltage of the bipolar device can be accurately measured, and furthermore, the device can be prevented from breaking down when measuring the punch through breakdown voltage.
    Type: Grant
    Filed: July 15, 1999
    Date of Patent: September 18, 2001
    Assignee: NEC Corporation
    Inventor: Masaru Wakabayashi
  • Patent number: 6292009
    Abstract: A semiconductor wafer having dice that include circuitry that is placed into a mode when the circuitry receives an alternating signal having certain characteristics. The alternating signal may be supplied from a system controller through a probe, probe pad, and conductive path on the wafer. In a preferred embodiment, the conductive path simultaneously carries a VCC power signal and the alternating signal to the circuitry. However, the alternating signal may be carried on a conductive path different from the one carrying the VCC signal. A great deal of information may be conveyed through the alternating signal, making other signals unnecessary in controlling, testing, stressing, and repairing dice on the wafer. For example, clocking information may be conveyed through the alternating signal. The circuitry may be placed in different modes in response to different characteristics of the alternating signal. The alternating signal and a VCC power signal are received through a single contact on each die.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: September 18, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Leland R. Nevill, Raymond J. Beffa, Eugene H. Cloud
  • Patent number: 6288555
    Abstract: An electrical parameter of a rod-form conductive element is measured using a measurement fixture which includes an insulating support on which a first conductive element is mounted. A transmission line connector mounted on the insulating support and has a signal conductor connected to a first conductive element mounted on the support member. A holder for removably receiving the rod-form element includes a conductive member which is in electrically conductive contact with the rod-form element when the latter is positioned in the holder. The holder is mounted relative to the support member by a mounting structure such that when the rod-form element is positioned in the holder, an end of the rod-form element can be brought into electrically conductive contact with the first conductive element.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: September 11, 2001
    Assignee: Credence Systems Corporation
    Inventor: Daniel L. Harris
  • Patent number: 6285197
    Abstract: A jitter unit converts a stable input test signal into a jittering output test signal used to test the jitter tolerance of electronic equipment. This jitter device allows any test or sample signal (analog or digital, video or audio) to be used for testing such equipment. Jitter is a type of timing error between the expected or ideal timing of a signal and the actual timing of a signal in which the characteristics of the timing error change with time. The characteristics of jitter include the level of error, the frequency of change in the error and whether the change is periodic or random. The jitter unit uses a variable delay unit to delay the signal and uses a controller to regulate the delay of the delay unit in order to transform the stable signal into a jittering signal.
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: September 4, 2001
    Assignee: Philips Electronics North America Corporation
    Inventor: Marc S. Walker
  • Patent number: 6281673
    Abstract: A low error, switchable measurement lead detect circuit (9) for providing accurate current measurement readings and reducing susceptibility to false measurement lead detections due to leakage current is described. A gate (14) that receives an input select voltage Vs selectively connects either a supply voltage, Vd, or ground to the input of a voltage divider (13). Vd is connected during a measurement lead detection mode of operation or open fuse detection mode of operation, and a ground is connected during a current measurement mode of operation. During the measurement lead detection mode of operation, if the pin of a measurement lead is present in a split jack (12), the voltage divider (13) divides the supply voltage, Vd. Conversely, if no measurement lead pin is present in the split jack (12), the output voltage, Vo, of voltage divider (13) equals the level of Vd.
    Type: Grant
    Filed: March 9, 1999
    Date of Patent: August 28, 2001
    Assignee: Fluke Corporation
    Inventors: Raymond D. Zoellick, Douglas A. Miller
  • Patent number: 6278281
    Abstract: A fluid condition monitor suitable for real time monitoring of a fluid in a fluid system such as on-board vehicle monitoring of engine oil and transmission fluid to determine contamination. A capacitive spaced array electrode probe is immersed in the fluid and an oscillating voltage is applied at a first frequency of at least one hertz and the current IB measured as an analog of the bulk fluid impedance. The voltage is also applied to the probe at a second frequency of less then one hertz and the current Is measured as an analog of the electrode surface impedance. The difference in measured currents &Dgr;I is determined electrically compared with a predetermined threshold value; and, the measured first frequency current IB is compared with an upper and lower limit value for IB determined empirically for the known baseline fluid.
    Type: Grant
    Filed: December 23, 1998
    Date of Patent: August 21, 2001
    Assignee: Eaton Corporation
    Inventors: Robert A. Bauer, Richard W. Hirthe, Mark H. Polczynski, Martin A. Seitz, James E. Hansen
  • Patent number: 6278279
    Abstract: A power supply includes a rectifier which receives alternating current as an input, and which provides an output of direct current pulses at a positive polarity output line thereof with respect to a negative polarity output line thereof. A back-up circuit is coupled between the positive and negative polarity output lines of the rectifier. The back-up circuit includes the series connection of a switching device, a current blocking device, at least one electrical energy source device, and a current measuring device. A circuit protection device may also be provided in the series connection. The back-up circuit can be tested while the rectifier is providing the direct current output pulses by closing the switching device and detecting at least one pulse of a test current flowing through the back-up circuit and/or a terminal voltage of the at least one electrical energy source device during the testing.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: August 21, 2001
    Assignee: International Business Machines Corporation
    Inventors: Timothy C. Daun-Lindberg, Steven W. Steele
  • Patent number: 6275047
    Abstract: An improved capacitance measurement system employs a selectable constant current source which is switched into a capacitor in a charge measurement system. The capacitor produces a linear ramp voltage in response to the constant current. An analog-to-digital converter (ADC) measures the change in voltage along the ramp over a corresponding change in time. These values, together with the value of constant current, are used to calculate the capacitance. In the preferred embodiment, a multi-slope ADC is utilized for the measurement. This system offers a wide range of measurable capacitance, and is fast responding and accurate. In addition, visual feedback to the user on measurement progress can be provided, which is particularly advantageous when measuring large capacitors.
    Type: Grant
    Filed: March 12, 1999
    Date of Patent: August 14, 2001
    Assignee: Fluke Corporation
    Inventors: Raymond D. Zoellick, Douglas A. Miller
  • Patent number: 6265879
    Abstract: An electrical integrity test system for boats provides circuitry for evaluating the integrity of the boat's galvanic isolator. The integrity test system includes two single reference diodes and a circuit for applying DC voltages across said reference diodes and said galvanic isolator. Another micro-controller stores the values of the voltage drops across the galvanic isolator and the voltage drops across each reference diode and subsequently determines if the voltage drop across the galvanic isolator is that to be normally expected. If it is not, then the system informs the operator that the boat's galvanic isolator is not operating properly.
    Type: Grant
    Filed: July 14, 1999
    Date of Patent: July 24, 2001
    Inventor: Keith W. Landreth
  • Patent number: 6262579
    Abstract: A method for testing for open circuits on a common circuit base having pads for making electrical contact to the common circuit base on both the top and bottom of the circuit base. The common circuit base includes a thin film metal interconnect structure formed on its upper surface and the thin film interconnect structure including an upper dielectric layer deposited over a thin film metalization layer that has contact openings etched through the dielectric layer at selected locations for the formation of contact pads.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: July 17, 2001
    Assignee: Kulicke & Soffa Holdings, Inc.
    Inventors: David J. Chazan, James L. Lykins
  • Patent number: 6259259
    Abstract: A method for rectifying a sensor current with a synchronous demodulator, wherein the rectifying factor of the synchronous demodulator can be controlled. A control clock pulse signal of the synchronous demodulator is toggled between at least two different states, with the states corresponding to different rectifying factors. The resulting total rectifying factor of the synchronous demodulator can be selected at will by adjusting the pulse duty factor between the at least two states.
    Type: Grant
    Filed: April 21, 1999
    Date of Patent: July 10, 2001
    Assignee: Vega Grieshaber KG
    Inventors: Felix Raffalt, Siegbert Woehrle
  • Patent number: 6255842
    Abstract: An applied-voltage-based current measuring apparatus in which an operational amplifier is supplied at its non-inverting input terminal with a predetermined voltage and at its inverting input terminal with a voltage to be applied to a load. A current measuring resistor is connected between the output terminal of the operational amplifier and the load and a voltage which is created across the current measuring resistor is measured to thereby measure a current flow to the load in the state of being supplied with a predetermined voltage and in which a plurality of current measuring resistors are connected in series in correspondence to current measuring ranges. Switching elements for current bypass use, each of which turns ON when the voltage created across the corresponding current measuring resistor reaches a predetermined value, are connected in parallel to the current measuring resistors.
    Type: Grant
    Filed: July 20, 1999
    Date of Patent: July 3, 2001
    Assignee: Advantest Corporation
    Inventor: Yoshihiro Hashimoto
  • Patent number: 6255827
    Abstract: A system for locating electrically conductive contact points on an integrated circuit semiconductor substrate utilizes capacitance and line continuity measurements to control and direct the movement of a two-point probe tester in order to locate and precisely align each test probe with designated contact points. The system is capable of testing for continuity conditions or defects and perform other related electrical measurements.
    Type: Grant
    Filed: April 30, 1999
    Date of Patent: July 3, 2001
    Assignee: International Business Machines Corporation
    Inventors: Mukta S. Farooq, Vincent P. Peterson, Kathleen M. Wiley
  • Patent number: 6252410
    Abstract: A pico fuse detector assembly incorporating a probe structure that minimizes short-out of closely adjacent pico fuses during testing has two probe arms, each pivotably connected at one end to a detector body with their free ends adjustably dispaceable from each other and respectively accomodating improved probe elements thereon. Each probe element has a conductive lead disposed inside an insulating housing connected at one end to a set of test contacts extending from the bottom of the housing. The other end of the lead is coupled by a spring to a test circuit. The restricting of the contact area with the isolating housing limits the chance of the contacts accidentally being placed at a location to cause damage to two closely arranged adjacent pico fuses under test and thus obviates the problem of fuse short-out during measuring of the closely arranged fuses. Also, the contacts and lead are axially movable by virtue of the spring-mounting to the test circuit.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: June 26, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd
    Inventor: Chen Mei Fan
  • Patent number: 6249117
    Abstract: A stabilized wafer for monitoring and calibrating oxide charge test equipment. The stabilized wafer comprises; a silicon wafer, a SiO2 layer of at least 100 angstroms upon the silicon wafer, and a phosphosilicate glass layer containing phosphorus formed in the SiO2 layer for providing the stabilized wafer by stabilizing an SiO2 interface and containing oxygen ions. The stabilized wafer is used for monitoring and calibrating oxide charge test equipment.
    Type: Grant
    Filed: March 24, 1999
    Date of Patent: June 19, 2001
    Assignee: Wafer Standards, Inc.
    Inventors: Ronald G. Koelsch, Robert Koelsch
  • Patent number: 6249131
    Abstract: An electronic assembly comprising an electrical device, an array of solder balls connected to the electrical device, and a sheet adjacent the electrical device. The sheet has a plurality of holes formed therethrough and a plurality of electrical lines formed thereon. Each electrical line has a first contact portion on a first surface of the sheet, a probe contact at a location away from the electrical device, and a trace interconnecting the probe contact with the first contact portion. Each ball extends through a respective hole in the sheet. Each ball is also in contact with a respective first contact portion of a respective electrical line.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: June 19, 2001
    Assignee: Intel Corporation
    Inventor: Peter Nangle