Patents Examined by James E. Goodley
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Patent number: 7940132Abstract: A clock system includes a phase locked loop, a phase divider, and a control module. The phase locked loop (PLL) produces a plurality of phase-offset output oscillations. The phase divider generates a clock signal from one or more of the plurality of phase-offset output oscillations based on a phase divider control signal. The control module generates the phase divider control signal based on a desired setting for the clock signal.Type: GrantFiled: September 27, 2007Date of Patent: May 10, 2011Assignee: Freescale Semiconductor, Inc.Inventors: Michael R. May, Raymond L. Vargas
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Patent number: 7940131Abstract: An apparatus for rapidly tracking fundamental frequency information in the signal of an electric grid is a cross-coupled phase-lock loop filter (CCPLL) that includes the use of a phase-lock-loop (PLL) apparatus having a plurality individual filters, wherein an input for a first filter in the plurality of individual filters comprises the signal of the electric grid and an output signal from at least a second filter in the plurality of individual filters. A method for using the CCPLL includes applying a signal to the CCPLL and monitoring the output of the CCPLL. Use of the CCPLL may be accomplished or modeled via computer instructions stored on machine readable media.Type: GrantFiled: August 22, 2008Date of Patent: May 10, 2011Assignee: General Electric CompanyInventors: Haiqing Weng, John D. D'Atre, Robert A. Seymour, Allen M. Ritter, Xiaoming Yuan, Renchang Dai, Robert W. Delmerico
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Patent number: 7936222Abstract: A phase-locked loop circuit. The phase-locked loop circuit comprises a phase detector, a proportional charge pump, a decimator, an integral charge pimp, and a voltage-controlled oscillator. The phase detector obtains an phase error information according to a phase difference between a reference signal and a clock signal input to the phase detector. The proportional charge pump coupled to the phase detector generates a first voltage according to the phase error information. The decimator generates a decimated version of the phase error information by a decimation factor of N. The integral charge pump generates a second voltage according to the decimated version of the phase error information. The voltage-controlled oscillator generating the clock signal according to a combination of the first and second voltages.Type: GrantFiled: July 29, 2009Date of Patent: May 3, 2011Assignee: Mediatek Inc.Inventor: Ping-Ying Wang
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Patent number: 7932789Abstract: A frequency adjustable surface acoustic wave oscillator uses circuitry in which the phase relationship between the corresponding input and output signals and the voltage applied to or received by transducer fingers is controlled in such a manner that the frequency of the surface acoustic wave oscillator is arbitrarily controlled over a wide range by digital means. This provides an oscillator that exhibits a wide tunable frequency range while providing low phase noise.Type: GrantFiled: April 29, 2009Date of Patent: April 26, 2011Inventor: Robert Hay
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Patent number: 7932785Abstract: A circuit includes a phase lock loop circuit and a continuous phase lock loop calibration circuit. The continuous phase lock loop calibration circuit is operatively coupled to the PLL circuit and produces a continuous calibration signal based on a reference voltage from a reference voltage circuit to calibrate the PLL circuit on a continuous basis.Type: GrantFiled: August 23, 2004Date of Patent: April 26, 2011Assignee: ATI Technologies ULCInventors: Oleg Drapkin, Grigori Temkine, Mikhail Rodionov, Michael Foxcroft
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Patent number: 7932787Abstract: A phase-locked loop control system and method are described. Present invention phase-locked loop control systems and methods facilitate control of phase-lock loop operations. In one embodiment, phase-lock loop control systems and methods are utilized in the implementation of a modulated frequency synthesizer for facilitating efficient frequency spreading over a designated spectrum. It is appreciated that present invention embodiments can have a variety of implementations and can be compatible with vector accumulation. For example, a phase-locked loop control system or method can facilitate generation of a variety of modulation patterns, including but not necessarily limited to linear or non-linear modulation, standard or non-standard modulation, etc.Type: GrantFiled: October 30, 2006Date of Patent: April 26, 2011Assignee: Cypress Semiconductor CorporationInventor: Shuliang Li
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Patent number: 7924109Abstract: Provided is a MEMS oscillation circuit which performs temperature compensation of a MEMS resonator with a simple circuit, which is mild so that an output clock does not have jitter, and which makes the range of fluctuations of a reference frequency from a reference value equivalent to a range of digital processing. The MEMS oscillator includes a MEMS resonator, a temperature measurement unit for measuring a temperature and outputting a detected voltage corresponding to the temperature, and a bias voltage control circuit for applying the MEMS resonator with a bias voltage which changes the resonant frequency of the MEMS resonator in a manner opposite to a change of the resonant frequency of the MEMS resonator due to temperature change correspondingly to the detected voltage.Type: GrantFiled: February 20, 2009Date of Patent: April 12, 2011Assignee: Seiko Instruments Inc.Inventor: Kensuke Ogasawara
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Patent number: 7924104Abstract: A method for compensating a clock bias in a Global Navigation Satellite System (GNSS) receiver includes deriving at least one clock drift value comprising a first clock drift value corresponding to a first time point, and calculating the clock bias according to the at least one clock drift value and at least one interval within the time period between the first time point and a specific time point after the first time point. An apparatus for compensating a clock bias in a GNSS receiver is also provided.Type: GrantFiled: August 21, 2008Date of Patent: April 12, 2011Assignee: Mediatek Inc.Inventors: Kung-Shuan Huang, Yu-Chi Yeh
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Patent number: 7907006Abstract: According to one embodiment, a threshold adjusting apparatus for a clocked comparator, the clocked comparator comparing an input signal with a threshold in accordance with a clock, the threshold adjusting apparatus comprises an output detection module configured to detect an output from the clocked comparator with the threshold while changing the threshold and a setting module configured to set the threshold when the output detection module detects a change in the output from the clocked comparator as an adjusted threshold.Type: GrantFiled: March 6, 2009Date of Patent: March 15, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Shigeyasu Iwata, Toshifumi Yamamoto, Takashi Minemura, Toshiyuki Umeda
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Patent number: 7907020Abstract: An oscillating signal of relatively precise frequency can be generated by tuning an oscillator using an external stable oscillating source as a reference. Calibration logic can be included to compare a signal from the local oscillator to the reference signal and vary the local signal to a desired frequency. In one embodiment, the frequency of the local signal can be constantly or periodically compared with a threshold value and if the frequency exceeds the threshold value, the local oscillator can be modified to produce a signal having a frequency that is closer to a desired frequency.Type: GrantFiled: November 29, 2007Date of Patent: March 15, 2011Assignee: Apple Inc.Inventor: Thomas James Wilson
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Patent number: 7907025Abstract: An electromechanical resonator includes a resonator portion which includes a fixed electrode and an oscillator formed separately from the fixed electrode with a gap. The gap has a first gap region and a second gap region which are arranged in a thickness direction of the fixed electrode. The first gap region is different in width from the second gap region.Type: GrantFiled: January 21, 2008Date of Patent: March 15, 2011Assignee: Panasonic CorporationInventor: Akinori Hashimura
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Patent number: 7902928Abstract: A phase-locked loop circuit. The phase-locked loop circuit comprises a phase detector, a proportional charge pump, a decimator, an integral charge pimp, and a voltage-controlled oscillator. The phase detector obtains an phase error information according to a phase difference between a reference signal and a clock signal input to the phase detector. The proportional charge pump coupled to the phase detector generates a first voltage according to the phase error information. The decimator generates a decimated version of the phase error information by a decimation factor of N. The integral charge pump generates a second voltage according to the decimated version of the phase error information. The voltage-controlled oscillator generating the clock signal according to a combination of the first and second voltages.Type: GrantFiled: February 8, 2008Date of Patent: March 8, 2011Assignee: Mediatek Inc.Inventor: Ping-Ying Wang
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Patent number: 7902934Abstract: There are provided a variable inductor with little degradation in quality factor, and an oscillator and a communication system using the variable inductor. An inductance controller comprising a reactance device with a variable device value, such as, for example, a variable capacitor, is connected to a secondary inductor, magnetically coupled to a primary inductor through mutual inductance. The inductance controller is provided with an inductance control terminal for receiving a control signal for controlling capacitance of the variable capacitor. Inductance of the primary inductor is varied by varying the capacitance by the control signal.Type: GrantFiled: November 8, 2005Date of Patent: March 8, 2011Assignee: Renesas Electronics CorporationInventors: Takahiro Nakamura, Toru Masuda
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Patent number: 7902932Abstract: There is provided a frequency-variable oscillator that varies, even when a frequency of an input signal is varied, a frequency of an oscillation signal according to the varied frequency of the input signal. The frequency-variable oscillator includes: a voltage-to-current converter circuit for converting a voltage level of an input signal into a current level within a predetermined range; and an oscillator circuit for varying a frequency according to the current level from the voltage-to-current converter circuit and oscillating the varied frequency.Type: GrantFiled: July 2, 2008Date of Patent: March 8, 2011Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Yu Jin Jang, Byoung Own Min, Seung Kon Kong, Sang Cheol Shin, Jung Chul Gong
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Patent number: 7898347Abstract: In the mass production of dielectric resonator oscillators (DROs), it is necessary to regulate the position where a dielectric resonator is placed with a high degree of accuracy and thus time required for the assembly work increases undesirably. Further, a terminating resistor and earthing means are formed at an end of a transmission line that is electromagnetically coupled to the dielectric resonator and constitutes the resonator on a dielectric substrate, and as a result the production cost increases. The present invention is characterized in that, in the components of a DOR, only a transmission line is formed on a dielectric substrate, and an oscillating active element and a terminating resistor and the earthing means on an MMIC chip are connected to the transmission line with metallic wires, metallic ribbons, or the like. Further, an open stub is formed in the middle of the transmission line on the side close to the oscillating active element when it is viewed from the dielectric resonator.Type: GrantFiled: May 23, 2008Date of Patent: March 1, 2011Assignee: Hitachi, Ltd.Inventors: Naoyuki Kurita, Kazuo Matsuura
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Patent number: 7898350Abstract: A frequency stabilizing device of an oscillator is disclosed. The frequency stabilizing device of an oscillator is used for stabilizing the frequency of an oscillator to keep the frequency in constant when input voltage is changed. The frequency stabilizing device comprises a plurality of transmission gates for receiving an input voltage and generating a current and a plurality of resistors for control the value of the current, wherein the current is positive in relation to the input voltage and the frequency of the oscillator is determined by the current.Type: GrantFiled: June 26, 2008Date of Patent: March 1, 2011Assignee: Princeton Technology CorporationInventor: Shiun-Dian Jan
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Patent number: 7893783Abstract: Disclosed is a resonator including a plurality of resonator elements each including at least oscillation parts and lower electrodes with an intervening space therebetween, in which the plurality of resonator elements are disposed in a closed system and the oscillation parts of the plurality of resonator elements are continuously formed in an integrated manner.Type: GrantFiled: May 20, 2008Date of Patent: February 22, 2011Assignee: Sony CorporationInventors: Shinya Morita, Akira Akiba
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Patent number: 7889014Abstract: One embodiment in accordance with the invention is a method that can include utilizing a ring oscillator module to determine a process corner of an integrated circuit as fabricated that includes the ring oscillator module. The impedance of an output driver of the integrated circuit can be altered based on the process corner of the integrated circuit as fabricated.Type: GrantFiled: November 20, 2007Date of Patent: February 15, 2011Inventors: Steven T. Stoiber, Stuart Siu
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Patent number: 7889017Abstract: A resonator containing a plurality of resonator elements, respectively having an electrode and an oscillating component opposed while having a space in between, arranged so as to form a closed system. The oscillating component of the plurality of resonator elements is continuously formed in an integrated manner.Type: GrantFiled: September 23, 2008Date of Patent: February 15, 2011Assignee: Sony CorporationInventors: Shinya Morita, Akira Akiba
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Patent number: 7876166Abstract: A coupled ring oscillator includes n ring oscillators (20) each including m inverter circuits (10), and a phase-coupling loop (40) in which m×n phase-coupling circuits (30), each of which couples signal phases at two points in a certain phase mode, are connected with each other to form a loop. Connection points at which the inverter circuits (10) are connected with each other and the connection points at which the phase-coupling circuits (30) are connected with each other are connected bijectively; and each of the inverter circuits (10) is connected between two points that divide the phase-coupling circuits (30) into two parts at a certain ratio.Type: GrantFiled: July 7, 2010Date of Patent: January 25, 2011Assignee: Panasonic CorporationInventors: Shiro Dosho, Shiro Sakiyama, Noriaki Takeda