Abstract: A trace-back apparatus to select a most likely path for use in a Viterbi decoder comprises one or more processing elements to carry out tracing-back based on a sequence of decision vectors coupled among themselves in a pipeline fashion. In each processing element, N number of decision vectors are delayed during a predetermined period to generate 1-step to N-step delayed decision vectors; and an input state is stored during the predetermined period to generate an 1-step delayed state; and multiplexing means multiplexs sequentially the 1-step to N-step delayed decision vectors based on the 1-step delayed state to provide an N-step trace-back state to the next processing element.

Abstract: Disclosed is a quantization/inverse quantization circuit including a differential pulse code modulator (DPCM). Video CODEC standards (i.e., JPEG, H.261, H.263, MPEG-1, and MPEG-2) include various functions for an image compression and an image reconstruction. The conventional quantization/inverse quantization circuit has been designed to be fit for only one desired standard, so that the quantization/inverse quantization circuit used for one standard cannot be directly used for another standard. Accordingly, in relation to a difference between standards and required function therebetween in order to use the present invention in all video CODEC standards, the present invention discloses a quantization/inverse quantization circuit which can support all modes (i.e., a quantization mode in coding, an inverse quantization mode in decoding, and a reconstruction mode) by employing one quantization circuit as a quantization/inverse quantization circuit which can be used in all video CODEC standards.

Abstract: An apparatus and a method for detecting a carrier signal of a phase shift keyed modulated signal. A first counter circuit generates a plurality of counts, with each count being a number of cycles of a reference frequency signal occurring between two consecutive rising edges of an intermediate frequency signal. A comparison circuit compares a first count of reference frequency cycles to a second count of reference frequency cycles when a difference between an initial count of reference frequency cycles and a first predetermined number is less than a second predetermined number. The first predetermined number represents a time period of one cycle of the nominal center frequency, and the first count and the second count respectively represent time periods of first and second cycles of a pair of consecutive cycles of the intermediate frequency signal. The comparison circuit generates a difference signal when a difference between the first count and the second count is less than a third predetermined number.

Abstract: A receiver circuit and method wherein an automatic gain control circuit of the receiver is isolated from the input to the receiver in response to the output signal from the receiver in order to suppress the effect of feedback from the output signal to the input of the receiver.

Abstract: A procedure for information transmission utilizing a system for reception of data signals using clock signals in which the phase shift between clock signals and data signals is calculated using a formulation of the gradient t.sub.n+1 =t.sub.n +p/q-.alpha.e.sub.n (t.sub.n)e'.sub.n (t.sub.n). The phase shift signal (t.sub.n+1) is calculated for an (n+1) data signal, the phase shift signal (t.sub.n) is calculated for a (.sub.n) data signal, and (p/q) in the ratio of the clock period to the data period. In addition, e.sub.n (t.sub.n) is the error between a real sample and an assumed theoretical value and e'.sub.n (t.sub.n) is the derivative of e.sub.n (t.sub.n) with respect to (t.sub.n).

Abstract: Apparatus, and an associated method, for a multi-branch receiver. A receive signal is received at various receiver branches of the multi-branch receiver. Subsequent to selected processing stages of processing of the receive signal, determinations are made of the signal quality of the signal in the receiver branches. When determinations are made that the signal quality of the signal of a particular receiver branch is of poor quality, further processing of the signal in the branch is squelched.

Abstract: A time domain aliasing cancellation (TDAC) apparatus and its signal processing method to be used with the AC-3 high-fidelity audio signal compression system of the MPEG-2 international video standard. This invention proposes two preferred embodiments to realize the compression encoding and decoding processes of the TDAC apparatus. The first preferred embodiment employs a data reordering technique to change the TDAC encoding to a discrete cosine transform (DCT), and furthermore, it changes the TDAC decoding to a inverse discrete cosine transform (IDCT). This implementation has the least computational complexity. The second preferred embodiment utilizes data reordering to change the TDAC encoding and decoding into a type IV discrete cosine transformation, and then converts the DCT transformation into a 2nd order infinite impulse filter. The multiplication coefficients in this filter can be fixed to improve the precision and also to reduce the amount of computations.

Abstract: A technique for modulating and demodulating continuous phase modulation (CPM) spread spectrum signals and variations thereof. A transmitter encodes M data bits using a selected spread spectrum code, divides the spread spectrum code into a plurality of chip codes (such as even chips and odd chips), independently modulates the even and odd chips with orthogonal carrier signals using CPM or a related technique, and superposes the plurality of resultants for transmission. A receiver receives the superposed spread spectrum signal, divides the spread spectrum signal into duplicate signals, separately demodulates the duplicate signals into an odd chip signal and an even chip signal, simultaneously attempts to correlate the odd chip signal with a locally generated odd chip sequence and the even chip signal with a locally generated even chip sequence, and interleaves the correlation signals into a unified correlation signal.

Abstract: A method for digital transmission of messages is indicated, in which each digital transmission symbol in a data stream to be transmitted is represented by one of several different possible signal values. The signal values of the transmission symbols are routed to a predistortion system, which counteracts their distortion in the transmission path, and whose output signal is transmitted through a linked transmission path. The transmitted signal is scanned at the end of the transmission path, it is then processed further and routed to a decoder. The maximum amplitude of the signal in the receiving-end decoder is limited by limiting the number of different possible signal values corresponding to each transmission symbol.

Abstract: Methods and apparatus for detecting the presence of a particular signal among all the channels of interest in a cellular or similar type system are disclosed. A first method detects CDPD signals, and a second method detects DQPSK signals used in digital control channels in accordance with the IS-136 standard. These methods include the steps of sampling a received signal in at least one channel to obtain a predetermined number of samples for the at least one channel; computing an error value for each sample; determining a minimum error value; determining a ratio of the minimum error value to a reference value; and making a decision as to whether the received signal is the prescribed signal on the basis of at least the ratio, wherein the decision is made by comparing the ratio to a threshold value.

Abstract: A method and apparatus receives a symbol and subdivides (720) the symbol into a plurality of fragments. The method and apparatus perform (704) for the plurality of fragments a plurality of correlations with at least one possible symbol value, thereby producing a plurality of complex values corresponding to each fragment and further corresponding to the at least one possible symbol value. From the plurality of complex values a plurality of overall Fourier transforms are computed (706) across a frequency range, and a peak value in the plurality of overall Fourier transforms is located (708). The symbol is then determined (710) from the peak value.

Abstract: A system and method for establishing a link layer connection between a calling modem having a plurality of possible first physical layer modulations and one or more possible link layer connections and an answering modem having a plurality of possible second physical layer modulations and one or more possible link layer connections comprising the steps of establishing a physical layer connection between the calling and the answering modems, wherein the physical layer connection is based on a negotiated physical layer modulation chosen from the first and second physical layer modulations, and establishing link layer connection based upon said negotiated physical layer modulation. The link layer connection includes parameters that are preset to default values based upon the negotiated physical layer connection. Thus, the modems are able to avoid the link layer negotiation, thereby providing a faster and more robust connection.

Abstract: A spread spectrum communication receiver includes an inverse spread demodulation circuit and a primary demodulation circuit. The inverse spread demodulation circuit has an image PN code generation circuit for generating an image PN code having an image relationship with a PN code which was used in spread modulation of a spread spectrum signal to be received and demodulated, an SS reference signal generation circuit for generating a spread spectrum reference signal having an image relationship with the spread spectrum signal to be demodulated using the image PN code, and a surface acoustic wave device for taking a correlation between the received spread spectrum signal and the spread spectrum reference signal. The primary demodulation circuit has a detection circuit for generating a convolution output by detecting the correlation output from said inverse spread demodulation circuit, and a waveform shaping circuit for shaping the convolution output.

Abstract: A receiver for soft decision and decoding for deriving an appropriate soft-decision value so as to reduce the error rate at the output of a decoder such as a Viterbi decoder. A length V of transmission sequences that can be generated is set greater than a memory length L of a channel (V>L). By providing as many as 2N (N=2.sup.V) branch metric producing circuits and as many as N add/compare/select apparatus (ACS apparatus) for respective states corresponding to combinations of transmission sequence data of V, the accuracy of a soft-decision value is enhanced. Further, a soft-decision value producing circuit performs a process not based on path metrics but based on survivor metrics. This allows a digital signal processor to easily perform the process.

Abstract: An adaptive trellis decoder seamlessly switches between multiple input signal formats. The trellis decoder employs a code sequence detection system, described in the context of an exemplary Viterbi decoding system, that detects codes in an input interleaved packet data signal. The code sequence detection system also reduces the delay (latency) between the input of encoded data and the output of decoded data. The code sequence detection system provides branch metric values in response to the input interleaved packet data signal which exhibits one of a plurality of signal formats, e.g., partial response and normal formats. A Viterbi decoder decodes the packet data signal to produce a decoded output in response to the branch metric values which include a substantially replicated value associated with one of the formats. The Viterbi decoder includes a comparison network that provides decision data in response to branch metric values associated with the trellis encoded data packets.

Abstract: A trellis code of a special class is encoded by employing a binary convolutional code with a small constraint length, followed by a convolutional processor and a signal mapper. The trellis code is decoded by the trellis of the binary convolutional code.

Abstract: A method and system for demodulating received signals in radio communication systems. Pi/4-DQPSK modulated signals can be demodulated to provide additional quality measurements and to facilitate diversity combination or selection. For example, a carrier is modulated with digital data using Pi/4-DQPSK to convey two bits of data by changing the radio carrier phase from the value at the end of the last symbol through an angle of either .+-.45 degrees or .+-.135 degrees, these four possibilities representing the bit pairs 00, 01, 11 or 10. The transitions of the radio signal are filtered in the complex (I,Q) plane to limit the spectrum. At the receiver, the received signal is downconverted, filtered and amplified using a hard-limiting intermediate frequency (IF) amplifier. The IF amplifier also produces an approximately logarithmic indication of the signal strength before limiting. The hard-limited IF signal containing phase information is fed to a direct phase digitizer.

Abstract: A new improved all monolithic transceiver may be manufactured on a single semiconductor die for operation from a single +5 v power supply. The transceiver includes a transmitter of novel design which provides zero output current for a zero signal input. The transmitter may include a linear feedback operational amplifier driver, wherein the driver bias current is enabled only in the presence of a driver input signal. The transceiver is designed to meet the requirements of both MIL-STD 1553 as well as the McDonnell Douglas(MACAIR) A3818, A4905, A5232 and A5690.

Abstract: A cellular communication system provides for trellis encoding/decoding of a 16 Star QAM signal. The system includes a transmitter circuit and a receiver circuit. The transmitter circuit has a Reed-Solomon encoder, an outer interleaver circuit for spreading burst errors, a cyclic trellis encoder, an inner interleaver circuit for reducing channel memory, a 16 Star QAM mapper and a radio frequency transmitter. The receiver circuit has a radio frequency receiver, equalization and filtering circuitry and timing and synchronization recovery circuitry. The receiver also has an inner deinterleaver, a trellis decoder, an outer deinterleaver, and a Reed-Solomon decoder.

Abstract: A device synchronizes an internal signal with respect to a reference signal, each signal comprising pulses normally occurring at a rated frequency. The device uses a phase comparator to analyze the phase of the internal signal and the reference signal and produce one logic state if the phase of the internal signal is in advance of the phase of the reference signal and a second logic state otherwise. A programmable frequency divider divides an internal clock signal by a first number if the phase comparator signal produces the first logic state or by a second number if the phase comparator produces the second logic state. A multiplexer provides the programmable divider with either the first number or the second number depending on the logic state produced the phase comparator. The device also includes a storage element for sequentially storing a predetermined number of the latest logic states of the phase comparator.