Abstract: Techniques and structures are disclosed for providing interface and radio frequency (RF) network between a microelectronic device and an antenna.

Abstract: A laminated substrate structure composed of a plurality of dielectric layers and a plurality of circuit layers stacked with each other. Each of the dielectric layers has a plurality of via studs, and the circuit layers are electrically coupled with each other through the via studs. The laminated substrate structure of the present invention is characterized by adopting the embedded structure landless design that provides high reliability and better adherence. The present invention also provides a laminated substrate manufacture method. The dielectric layers having the patterned circuit and the dielectric layers having the via holes are formed first, and after the dielectric layers having the patterned circuit and the dielectric layers having the via holes are formed, they are aligned and laminated synchronously to complete the manufacture of the laminated substrate.

Abstract: A backplane has a plurality of interface slots that each couple to a number of buses. Depending upon the embodiment, these buses include a power distribution bus, a digital ground bus, an earth ground bus, a system timing bus, a time division multiplexed bus, a system control bus, a hardware resource bus, a media data bus, and one or more network distribution buses. Various modules can be interfaced with the backplane and function independently and/or dependently upon one another, including shelf controllers, switches, and application boards. In one embodiment, the backplane can include two backplanes, wherein the second backplane further provides connections between such modules and one or more external connectors.

Abstract: A component built-in module includes an insulating layer, wirings integrated with both surfaces of the insulating layer, a via connecting the wirings, and one or more components selected from an electronic component and a semiconductor, which is embedded inside of the insulating layer. In this module, at least one of the wirings is formed on a surface of a wiring board, and the components embedded inside of the insulating layer are mounted on and integrated with the wiring board before embedding. This configuration allows the components such as a semiconductor to undergo a mounting inspection and a property inspection before embedding. As a result, the yields of the module can be improved. In addition, since the components are integrated with the wiring board and embedded, the strength thereof can be enhanced.

Abstract: A high quality factor on-package, off-die inductor assembly is disclosed. The assembly includes a flip-chip, ball-grid array package substrate, an on-package, off-die trace line is coupled to one or more bumps attached to an upper surface of the package substrate. The trace line has a self-inductance and a predetermined length. The quality factor associated with the inductor is a ratio of the trace line's inductance to the trace lines resistance. The package substrate is a low loss laminate.

Abstract: A method 10 for making a multi-layer electronic circuit board 110 having electroplated apertures 18, 20 which may be selectively and electrically isolated from electrically grounded member 12 and further having selectively formed air bridges and/or crossover members 50 which are structurally supported by material 54, and further having certain exposed connection surfaces 112, selectively and electrically connected to certain electrically conductive members 34, 42, and 44.

Abstract: A circuit board permits common use of the same circuit board without separately manufacturing the circuit board per providing destinations when similar circuit boards are manufactured for a plurality of providing destinations in the same factory. The circuit board has at least a first providing destination indicating region on which a first providing destination is indicated and a second providing destination indicating region located adjacent the first providing destination indicating region and having a second providing destination indicated thereon, the providing destination indicating regions other than that indicating an intended providing destination being hidden by mounting parts thereon.

Abstract: A semiconductor device designed to reduce the warp of a substrate due to curing contraction, etc. of an insulation pattern while forming the insulation pattern on the surface of a substrate so that it may be interposed between a semiconductor chip and a conductor pattern by offering a semiconductor chip mounting substrate equipped with a flexible substrate 11 (insulating film 16) having a chip mounting region 19 for mounting a semiconductor chip 13 via an adhesive 12, conductor patterns 20 that are formed on the surface of the above-mentioned substrate 11 and electrically connected to the semiconductor chip 13 in an external region of the above-mentioned chip mounting region 19, and an insulation pattern 21 formed on the surface of the substrate 11 and partially in the chip mounting region 19 so that it may be interposed between the semiconductor chip 13 and the conductor patterns 20.

Abstract: A semiconductor package with solder bumps and a method for making the same are described. One embodiment comprises a flip-chip design with a rectangular semiconductor die with a relatively large aspect ratio bonded to a substantially square substrate through solder bumps. In one embodiment, active bumps are concentrated in an area relatively close to the neutral point of the die, for example, in a substantially square area about the neutral point.

Abstract: In a semiconductor device such as a high-frequency power amplifier module, a plurality of amplifying means are formed on a semiconductor chip which is mounted on a main surface of a wiring substrate, and electrodes of the semiconductor chip are electrically connected by wires to electrodes of the wiring substrate. In order to make the high-frequency power amplifier module small in size, a substrate-side bonding electrode electrically connected to a wire set at a fixed reference electric potential is placed at a location farther from a side of the semiconductor chip than a substrate-side output electrode electrically connected to an output wire. A substrate-side input electrode electrically connected to an input wire is located at a distance from the side of the semiconductor chip about equal to the distance from the side of the semiconductor chip to the substrate-side output electrode, or at a location farther from the side of the semiconductor chip than the substrate-side bonding electrode is.

Abstract: A sensor isolation system including a sensor, a package for the sensor, and a compliant interposer disposed between the sensor and the package and interconnecting the sensor to the package to isolate the sensor from thermal and mechanical stresses and yet at the same time providing a physical interconnect between the sensor and the package.

Abstract: A printed wiring board is provided which can be applied even to circuit boards operating at high speed, and which can suppress electromagnetic wave radiation, and which can suppress a deterioration in density of mounting. At the printed wiring board, a first signal wire layer, a first ground layer having a first power source wire, a second ground layer having a second power source wire, and a second signal wire layer, are laminated. The first ground layer and the second ground layer are interlayer connected by many via holes. Return current, of signal current flowing through a signal wire, flows in the first ground layer, and a path of the return current is cut midway therealong at a position of the first power source wire. However, the return current is detoured by the via hole to the second ground layer, and flows thereat.

Abstract: Disclosed is a system including a circuit board and several pluggable modules coupled to the circuit board. The several pluggable modules are insertable through side-by-side slots in an enclosure in which the circuit board resides. A first pluggable module is coupled to the circuit board via a first connector, while a second pluggable module is coupled to the circuit board via a second connector such that the second pluggable module is laterally offset from the first pluggable module. The first and second connectors are right angle connectors, and the second right angle connector is inverted relative to the first right angle connector. The first and second pluggable modules are I/O modules for transporting high speed differential signals, and wherein the first pluggable module includes several XFP connectors, and wherein the second pluggable module includes several SFP connectors. The second pluggable module includes several SFP connectors arranged on both sides of the pluggable module.

Abstract: The invention herein pertains to improved methods and apparatus for electrically coupling components within a digital data system without the use of ribbon cables and other wires. The disclosed coupling device comprises a body member and at least one finger member. The body member physically and electrically couples with components mounted on a circuit board by mating with component pins extending on a solder side of the circuit board. The finger member is conjoined with the body member, and is a flexible, twistable, thin member containing electrically conductive vias coupled which couple the mounted components with an electrical connected located at the distal end of the finger member. The electrical connector at the distal end of the finger member can be a solder pad, a further member body, or other electrically coupling connector device. The finger member is designed to impact cooling air flow less than the disturbances created by conventional component coupling methods and apparatus, e.g.

Abstract: A circuit board assembly includes a circuit board which defines circuit board pads, a set of surface mount electronic components soldered to a first set of the circuit board pads using a surface mount soldering process, and a set of surface mount coupling devices soldered to a second set of the circuit board pads using the surface mount soldering process. Each surface mount coupling device is configured to couple at least a portion of an object to the circuit board. Each surface mount coupling device includes a set of surface mount pads connected to the second set of the circuit board pads by solder joints resulting from the surface mount soldering process, a set of legs extending from the set of surface mount pads, and a body portion connected to the set of legs, the body portion providing a fixed structure relative to the circuit board for securing the object.

Abstract: Several embodiments of enhanced integrated circuit probe card and package assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates.

Abstract: Disclosed is a device comprising a circuit having an active side and a non-active side, a package enclosing the active side of the circuit and not enclosing a portion of the non-active side of the circuit, and a lead having a first end connected to the active side of the circuit via a lead-over-chip connection, and having a second end extending from the package. Also disclosed is a device comprising a circuit and a lead formed from a flexible conductor, with the lead having a first end connected to the circuit.

Abstract: A device comprising a circuit, a lead having a first end connected to the circuit and having a second end, and a deformable structure connected to the second end of the lead. The invention may be embodied on a circuit board, so that the circuit board includes a substrate and a deformable structure connected to said substrate.

Abstract: A circuit board has a first signal layer having a set of conductors, a second signal layer having a conductive plane and a non-conductive region, and a third signal layer having a conductive region that mirrors the non-conductive region of the second signal layer. The circuit board further includes a first separating layer having non-conductive material which is disposed between the first signal layer and the second signal layer, and a second separating layer having non-conductive material which is disposed between the second signal layer and the third signal layer. Accordingly, traces within the first signal layer and overlying the conductive plane of the second signal layer will have a first impedance, while traces within the first signal layer and overlying the non-conductive region of the second signal layer and the conductive region of the third signal layer will have a second impedance that is different than the first impedance.

Abstract: The present invention discloses a physical shelf architecture for high density metallic cross connect systems. The present invention is intended to overcome the problems associated with the physical interconnections of metallic paths in cross connect switching systems. The physical architecture of the present invention effectively performs physical interconnections required by high density metallic cross connect systems. The physical architecture enables for a scalable design and structure of racks and shelves. In particular, inter-connect levels can be performed with devices-to-devices, boards-to-boards, shelves-to-shelves, and racks-to-racks.