Patents Examined by Joseph O Schell
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Patent number: 11983074Abstract: Example implementations relate to consensus protocols in a stretched network. According to an example, a distributed system includes continuously monitoring network performance and/or network latency among a cluster of a plurality of nodes in a distributed computer system. Leadership priority for each node is set based at least in part on the monitored network performance or network latency. Each node has a vote weight based at least in part on the leadership priority of the node. Each node's vote is biased by the node's vote weight. The node having a number of biased votes higher than a maximum possible number of votes biased by respective vote weights received by any other node in the cluster is selected as a leader node.Type: GrantFiled: February 27, 2023Date of Patent: May 14, 2024Assignee: Hewlett Packard Enterprise Development LPInventors: Diman Zad Tootaghaj, Puneet Sharma, Faraz Ahmed, Michael Zayats
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Patent number: 11968081Abstract: Embodiments of a device and method are disclosed. In an embodiment, a method for network device troubleshooting involves at a cloud server, connecting to a neighboring network device of a faulty network device, where the neighboring network device and the faulty network device are located within a network deployed at a customer site, and where the neighboring network device communicates with the faulty network device according to a short-range wireless communications protocol, and at the cloud server, performing a network device troubleshooting operation on the faulty network device using the neighboring network device as a proxy.Type: GrantFiled: January 19, 2022Date of Patent: April 23, 2024Assignee: NILE GLOBAL, INC.Inventors: Promode Nedungadi, Sumanth Narayana Reddy, Ganesh Sathyanarayanan
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Patent number: 11966300Abstract: Systems, methods, and machine-storage mediums for optimizing snapshot image processing are described. The system receives a first read request to read data from optimized snapshot information including snapshot information and cached snapshot information. The first read request includes a first offset identifying a first storage location and a first length. The snapshot information includes a full snapshot and at least one incremental snapshot. The system identifies a first portion of the data is stored in the snapshot information responsive to identifying the first portion of the data is not stored in the cache snapshot information. The system identifies a second portion of data is stored in the optimized snapshot information, reads the first portion of data and the second portion of data from the optimized snapshot information, and communicates the data, including the first and second portions of the data, to the job.Type: GrantFiled: August 2, 2022Date of Patent: April 23, 2024Assignee: Rubrik, Inc.Inventors: Jonathan Youngha Joo, Adam Gee, Vivek Jain, Junyong Lee, Aravind Menon
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Patent number: 11960357Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.Type: GrantFiled: April 24, 2023Date of Patent: April 16, 2024Assignee: VMware LLCInventors: Sowgandh Sunil Gadi, Rajesh Venkatasubramanian, Venkata Subhash Reddy Peddamallu, Arunachalam Ramanathan, Timothy P. Mann, Frederick Joseph Jacobs
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Patent number: 11947409Abstract: An integrated circuit (IC) device for detecting errors within a register, the IC device includes registers and parity checking circuitry. The parity checking circuitry is coupled to the registers and comprises a first parity circuitry, a second parity circuit, and error detection circuitry. The first parity circuit receives first register values from the registers and determine a first value from the first register values. The second parity circuit is receives second register values from the registers and determines a second value from the second register values. The error detection circuitry compares the first value and the second value to detect a first error within the registers, and output an error signal indicating the first error.Type: GrantFiled: January 12, 2022Date of Patent: April 2, 2024Assignee: XILINX, INC.Inventors: Sarosh I. Azad, Aditi R. Ganesan
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Patent number: 11940890Abstract: The present disclosure discloses a timing index anomaly detection method, device and apparatus. The method includes the following operations. A plurality of pieces of timing index information about a service to be detected is acquired. The plurality of pieces of timing index information is filtered according to a filtering condition, and timing index information satisfying a preset filtering condition is retained. The filtering condition corresponds to an anomaly detection condition. A tag is added to the timing index information satisfying the preset filtering condition to form first timing index information. The tag is used for identifying the anomaly detection condition. The first timing index information is forwarded to a preset working node corresponding to the tag. anomaly detection is performed on the first timing index information on the same preset working node. It is determined whether an anomaly prompt is output.Type: GrantFiled: November 29, 2021Date of Patent: March 26, 2024Assignee: HANGZHOU TUYA INFORMATION TECHNOLOGY CO., LTD.Inventor: Zheng Xiao
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Patent number: 11921598Abstract: Example techniques may be implemented as a method, a system or more non-transitory machine-readable media storing instructions that are executable by one or more processing devices, Operations performed by the example techniques include obtaining data representing results of tests executed by one or more test instruments on an initial set of devices under test (DUTs) in a test system; and using the data to train a machine learning model. The machine learning model is for predicting which of the tests will produce failing results for a different set of DUTs. DUTs in the different set have one or more features in common with DUTs in the initial set.Type: GrantFiled: October 13, 2021Date of Patent: March 5, 2024Assignee: Teradyne, Inc.Inventor: Padmanabha Kannampalli
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Patent number: 11907049Abstract: The present information processing apparatus comprises a non-volatile memory that has a first portion including a code area configured to hold a program and a data area configured to hold data. In addition, the information processing apparatus acquires update data of a first portion, and updates the first portion with the acquired update data. In the updating process, at least a portion of the program held in the code area is deleted before updating the contents of the data area, and after updating the contents of the data area, updating to the code area is completed.Type: GrantFiled: January 12, 2022Date of Patent: February 20, 2024Assignee: Canon Kabushiki KaishaInventor: Hidemi Sasaki
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Patent number: 11907088Abstract: An example system includes a processor that can receive a queue testing package. The processor can divide a hardware (HW) queue system to be tested into different types of queues. The processor can also generate a test using the different types of queues. The processor can further execute multiple instances of the generated test. The processor can also further compare results of the multiple instances of the test to detect a hardware fault in the hardware queue system.Type: GrantFiled: December 15, 2021Date of Patent: February 20, 2024Assignee: Synopsys, Inc.Inventors: Hillel Mendelson, Tom Kolan, Hagai Hadad, Shay Aviv
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Patent number: 11899550Abstract: Presented embodiments facilitate efficient and effective flexible implementation of different types of testing procedures in a test system. Presented embodiments facilitate efficient and effective flexible implementation of different types of testing procedures in a test system. In one embodiment, an enhanced auxiliary interface test system comprises a load board, testing electronics, controller, and memory mapped interface. The load board is configured to couple with a plurality of devices under test (DUTs). The testing electronics is configured to test the plurality of DUTs, wherein the testing electronics are coupled to the load board. The controller is configured to direct testing of the DUTs, wherein the controller is coupled to the testing electronics. The memory mapped interface is configured to implement multiple paths to access a central processing unit (CPU) on the controller and enable testing of multiple DUTs in parallel.Type: GrantFiled: January 28, 2021Date of Patent: February 13, 2024Assignee: Advantest CorporationInventors: Chi Yuan, Srdjan Malisic
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Patent number: 11899527Abstract: A method for identifying a cause of a machine operating anomaly including creating a reduced order model (ROMs) for a digital twin model of a selected machine type and feeding current data from a deployed machine into the ROM. The method can include comparing a current output from the selected ROM with a measured output from the current data and determining that an operating anomaly exists when the difference between the current output and the measured output exceeds a selected anomaly threshold.Type: GrantFiled: November 30, 2021Date of Patent: February 13, 2024Assignee: Caterpillar Inc.Inventors: David J. Lin, Tyler P. Jewell, Daniel J. Organ, Vivek Sundararaj, Vijay K. Yalamanchili, Chanyoung Park, William Kent Rutan, Kaimei Sun
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Patent number: 11874742Abstract: In various embodiments, a software program uses hardware features of a parallel processor to checkpoint a context associated with an execution of a software application on the parallel processor. The software program uses a preemption feature of the parallel processor to cause the parallel processor to stop executing instructions in accordance with the context. The software program then causes the parallel processor to collect state data associated with the context. After generating a checkpoint based on the state data, the software program causes the parallel processor to resume executing instructions in accordance with the context.Type: GrantFiled: April 22, 2021Date of Patent: January 16, 2024Assignee: NVIDIA CORPORATIONInventors: Saurabh Hukerikar, Nirmal Raj Saxena
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Patent number: 11868196Abstract: An image forming apparatus includes a wireless tag communication device to write data to, and read data from, a wireless tag attached to a sheet. An image forming device in the apparatus is configured to form an image on the sheet. A controller in the apparatus is configured to determine whether a writing of data to a wireless tag was successful based on a notification from the wireless tag communication device and generate investigation support information if the writing was not successful and control the image forming device to form an investigation support image corresponding to the investigation support information if the writing was not successful.Type: GrantFiled: October 20, 2022Date of Patent: January 9, 2024Assignee: Toshiba Tec Kabushiki KaishaInventors: Takashi Tomiyama, Sadatoshi Oishi
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Patent number: 11868231Abstract: A technique is described for evaluating code at a local computing device before deploying the code to a cloud computing platform to be compiled. In an example embodiment, class files including the code in a programming language associated with the cloud computing environment are loaded by a local computer system, for example, associated with a software developer. The local computer system then parses the code to identify elements in the code and checks the identified elements. Errors in the code are identified based on the checking and are displayed to a user (e.g., the developer), for example, via a graphical user interface of a code editor application.Type: GrantFiled: October 28, 2021Date of Patent: January 9, 2024Assignee: Certinia Inc.Inventors: Kevin James Jones, Simon Kristiansen Ejsing
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Patent number: 11841763Abstract: A semiconductor memory device includes a buffer die and a plurality of memory dies. Each of the memory dies includes a memory cell array, an error correction code (ECC) engine and a test circuit. The memory cell array includes a plurality of memory cell rows, each including a plurality of volatile memory cells. The test circuit, in a test mode, generates a test syndrome and an expected decoding status flag indicating error status of the test syndrome, receives test parity data generated by the ECC engine based on the test syndrome and a decoding status flag indicating error status of the test parity data, and determines whether the ECC engine has a defect based on comparison of the test syndrome and the test parity data and a comparison of the expected decoding status flag and the decoding status flag.Type: GrantFiled: November 26, 2021Date of Patent: December 12, 2023Inventors: Yeonggeol Song, Sungrae Kim, Kijun Lee, Sunggi Ahn, Yesin Ryu, Sukhan Lee
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Patent number: 11842210Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for high availability (HA) application migration in a virtualized environment. An example apparatus includes at least one memory, instructions in the apparatus, and processor circuitry to at least one of execute or instantiate the instructions to identify an HA slot in a virtual server rack, the HA slot to facilitate a failover of an application executing on a first virtual machine (VM) in the virtual server rack, the first VM identified as a protected VM, deploy a second VM in the HA slot, transfer data from the first VM to the second VM, and, in response to not identifying a failure of at least one of the first or second VMs during the transfer, trigger a shutdown of the first VM, and synchronize migration data associated with the virtual server rack to identify the second VM as the protected VM.Type: GrantFiled: October 25, 2021Date of Patent: December 12, 2023Assignee: VMWARE, INC.Inventors: Ivaylo Radoslavov Radev, Deepak Babarjung, Maarten Wiggers, Rajesh Venkatasubramanian, Sahan Bamunavita Gamage, Tomo Vladimirov Simeonov
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Patent number: 11836045Abstract: An electronic control device includes a nonvolatile memory having allocated two storage areas that are exclusively switchable between an active state and an inactive state, the storage area in the active state being used to store a control program to be executed, and the storage area in the inactive state being used as a reserved area for updating the control program. In the electronic control device, when the control program is not updated, arbitrary data is written in the storage area in the inactive state.Type: GrantFiled: February 4, 2020Date of Patent: December 5, 2023Assignee: Hitachi Astemo, Ltd.Inventors: Takahito Fuju, Kenho Ko, Daisuke Teshima
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Patent number: 11836032Abstract: Techniques for identifying faults in a collaborative computing system including a plurality of disparate, geographically separated computing systems are described herein. An intelligent monitoring (IM) server computing system may receive data from the plurality of computing devices and may monitor the health of the collaborative computing system. The IM server computing system may analyze the data and identify one or more faults associated with a portion of the collaborative system (e.g., an associated computing device, platform, network, etc.). In some examples, the IM server computing system may be configured to identify potential future faults associated with the portion of the collaborative system. Based on the fault, the IM server computing device may determine an action to take to remedy the fault and/or prevent the potential future fault. The IM server computing device may either automatically perform the action or send a notification to the associated computing system to perform the action.Type: GrantFiled: October 14, 2021Date of Patent: December 5, 2023Assignee: State Farm Mutual Automobile Insurance CompanyInventors: Michael Shawn Jacob, Benjamin D. Schappaugh, William Guthrie, Frank Matthew McCully, Timothy J. Nickel, Brian W. Batronis, Robert D. Rariden
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Patent number: 11815991Abstract: A computing device including: more than two Universal Serial Bus (USB) ports configured to be connected respectively to more than two mobile devices simultaneously; at least one processor coupled to the USB ports; and a memory storing instructions configured to instruct the at least one processor to reprogram, through the more than two USB ports, the more than two mobile devices simultaneously.Type: GrantFiled: November 18, 2022Date of Patent: November 14, 2023Assignee: Future Dial, Inc.Inventor: George Huang
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Patent number: 11809276Abstract: Techniques for managing node failures in container environments are disclosed. In one example, a method determines when a first node executing at least one containerized workload has failed. In response to determining the first node has failed, the method marks a configuration object for the first node with an indicator that the first node is not to be used to schedule execution of a subsequent containerized workload, isolates from the first node one or more storage volumes used by the first node, and deletes configuration objects for the one or more storage volumes and for the containerized workload. The method then causes creation of a replacement containerized workload for execution on a second node, removes one or more artifacts associated with the containerized workload from the first node, and removes the indicator from the configuration object for the first node.Type: GrantFiled: February 26, 2021Date of Patent: November 7, 2023Assignee: EMC IP Holding Company LLCInventors: Kumar Prashant, Thomas L Watson